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SoCs.
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the mbuf packet header. Otherwise, stale mbuf state related to the
ARP request packet might affect the fate of the ARP reply packet.
For example, I observed that for an ARP request to a carp IP, where the
underlying carpdev interface is part of a bridge, ARP replies were always
sent out on the carpdev interface, even if the corresponding ARP request
was received not on the carpdev but on a different bridge member interface.
This happened because the M_PROTO1 mbuf flag was set on the ARP request mbuf
when it left the bridge towards carp, and was still set on the ARP reply,
which reused the same mbuf, sent back towards the bridge. The bridge's loop
detection saw the M_PROTO1 flag and prevented the ARP reply from entering
the bridge, so the reply was instead sent out directly on the carpdev...
ok bluhm@ mpi@
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Initial diff by me, later improved by schwarze@; also ok jmc@
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Based on FreeBSD's expr and NetBSD's old regression test suite.
with input by and ok schwarze
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arguments for /sbin/init.
For CPU 0 identifycpu() originally got called twice, once very early
from cpu_startup(), then again from cpu_attach(). Now we call
identifycpu() only from cpu_attach() with CPUF_PRIMARY set. So
make sure, that for CPU 0 nothing is skipped. Otherwise, cpu_info
might have different features set for CPU 0 than for all other CPUs.
This is similar to what amd64 does.
from hshoexer@; reported and fix tested by Emilio Perea; OK mlarkin@
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Switching from per PCB TSS to per CPU TSS broke kvm86 calls to the BIOS.
This change fixes the issues.
from hshoexer@; reported and tested by semarie@; OK deraadt@
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- provide a cpu_softc for cpu_attach() etc.
- replace per PCB TSS with per CPU TSS
The first change prepares for cpu_info being embedded in a
cpu_full_info. Therefore during autoconf/cpu_attach we hand down
a softc.
The second change removes the per PCB TSS. We now have one TSS per
CPU, thus in cpu_switchto() we only have to patch the ring 0 stack
pointer instead of loading a new TSS. This also allows for cleaning
up the GDT, so we only have a single slot for the TSS.
from hshoexer@; OK deraadt@
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ignored.
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* Remove -tls1 option which has no effect.
* For -V, sort the fields in the order they are printed, and do not
talk about key size restrictions, nothing like that is printed.
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alongside 'request'.
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a specific directory on the drupal sites, so add a bit of glue to add
that to homepage, and also add magic to figure out default distfile and
pkgname.
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Add ofw_regulator.c and its dependencies to fix build.
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and are now also built on arm64.
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Some options were missing, some were in the wrong section (CRL-related
or not), and there were some minor errors, typos, and omissions.
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resulting fixes: markup of "command" below SYNOPSIS and links to the
config file formats below SEE ALSO
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better now with the FDT framework when we actually tackle PCIe.
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via OpenSSL commit 3266cf58 Mar 10 13:13:23 2018 -0500
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code in imxgpio(4) with splhigh() and splx() which is MI and should be
good enough for the job.
Discussed with kettenis@
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were not needed anymore since we switched to the FDT-based GPIO code.
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BoringSSL rather than from OpenSSL and that it is not hooked into evp(3).
So delete all text from OpenSSL including the Copyright and license
and replace it by some text assembled from comments in BoringSSL
code and headers and some text written myself, all under ISC license.
In particular, also describe X25519_keypair(3), add SYNOPSIS, RETURN
VALUES, STANDARDS, and a reference to D. J. Bernsteins instructions
on how to use the algorithm. Delete the text related to EVP_PKEY
describing features we do not support.
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OK visa@
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OK visa@
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thus creates an erroneous line break.
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issues with upcoming NFSnode's locks.
ok visa@
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ok kettenis@
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ok kettenis@
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