Age | Commit message (Expand) | Author |
2022-01-11 | spelling | Jonathan Gray |
2022-01-02 | Don't use *ENTRY_NB() with END_BUILTIN(), at least yet | Philip Guenther |
2022-01-01 | Add ENTRY_NB() macro for doing an ASM function entry without setting | Philip Guenther |
2021-12-13 | including sys/cdefs.h manually started as a result of netbsd trying to | Theo de Raadt |
2021-11-27 | Make brk() and sbrk() weak again to fix build with clang 13. | Visa Hankala |
2021-10-25 | Make brk() and sbrk() weak again as intended. | Jeremie Courreges-Anglas |
2021-10-25 | Make brk() and sbrk() weak again as intended. | Mark Kettenis |
2021-09-17 | sys/param.h is not needed in these files | Theo de Raadt |
2021-07-25 | Consistently use __asm instead of asm/__asm__ | Jeremie Courreges-Anglas |
2021-07-24 | riscv64 userland timecounter support | Jeremie Courreges-Anglas |
2021-07-24 | Fix strchr() and strrchr() on mips64 | Visa Hankala |
2021-06-20 | We need to store the flagged passed to sigsetjmp(3) and use it in | Mark Kettenis |
2021-06-19 | C version of fabs(), for now | Theo de Raadt |
2021-05-17 | delete useless blank lines | Theo de Raadt |
2021-05-14 | Fix regression for _setjmp, fucntion does not use stack and adjusting | Dale Rahn |
2021-05-09 | Change offsets to (N * 8) to reduce chance of register clobber and mistakes. | Dale Rahn |
2021-05-04 | sigpending(2) will never fail. Optimize the syscall stub accordingly like | Mark Kettenis |
2021-05-04 | Remove cerror dependancy from riscv64 asm syscalls. | Dale Rahn |
2021-05-04 | riscv64 brk()/sbrk() implementations, | Dale Rahn |
2021-05-02 | riscv64, fix HANDLE_ERROR | Dale Rahn |
2021-04-30 | Fix linkage error due to fp* functions. | Dale Rahn |
2021-04-29 | riscv64 libc | Dale Rahn |
2021-04-29 | riscv64 libc | Dale Rahn |
2021-04-29 | riscv64 libc, more pieces. | Dale Rahn |
2021-04-29 | Clean up <machine/ieeefp.h> and make sure the rounding mode bits match the | Mark Kettenis |
2021-04-28 | Implement __flt_rounds() for RISC-V. RISC-V is "interesting" since it | Mark Kettenis |
2021-04-28 | riscv64 libc setjmp functions, | Dale Rahn |
2021-04-28 | Add signbitl.c that was missed as part of an earlier commit. | Mark Kettenis |
2021-04-28 | RISC-V does not implement trapping of floating point exceptions, so use | Mark Kettenis |
2021-04-28 | riscv64 gdtoa support | Dale Rahn |
2021-04-28 | riscv64 libc string support, | Dale Rahn |
2021-04-27 | riscv64 libc floating point, a portion of the files are ready. | Dale Rahn |
2021-02-03 | Adding a hard-trap instruction after the __threxit syscall instruction | Kurt Miller |
2020-12-13 | Geode CPU does not support SSE, so MXCSR does not exists there. As | Alexander Bluhm |
2020-12-06 | On i386 setjmp(3) should store the FPU state and longjmp(3) restore | Alexander Bluhm |
2020-12-06 | Introduce constants to access the setjmp(3) jmp_buf fields from | Alexander Bluhm |
2020-11-28 | Add retguard to macppc kernel locore.S, ofwreal.S, setjmp.S | gkoehler |
2020-11-07 | Actually m88k assembler can not handle 'nop' mnemonic, use a macro instead. | Kenji Aoyama |
2020-10-26 | Retguard asm macros for powerpc libc, ld.so | gkoehler |
2020-10-21 | Save and restore the MXCSR register and the FPU control word such that | Mark Kettenis |
2020-10-20 | Use a trap instruction that unconditionally terminates the process. | Visa Hankala |
2020-10-19 | Retguard sigsetjmp on powerpc64. | mortimer |
2020-10-19 | replace ad-hoc illegal instruction with the architecturally defined one | Christian Weisgerber |
2020-10-19 | add retguard prologue/epilogue | Theo de Raadt |
2020-10-19 | Save and restore the FPCR register such that floating-point control modes | Mark Kettenis |
2020-10-18 | Add powerpc64 retguard macros for setjmp / longjmp. | mortimer |
2020-10-18 | SYS___threxit cannot fail, but this integration looks like a gadget. | Theo de Raadt |
2020-10-16 | Adapt SYS.h to use retguard macros from asm.h, so that generated system | Theo de Raadt |
2020-10-01 | Mark top-level frame for new thread in both CFI and with zero | Philip Guenther |
2020-08-23 | amd64: TSC timecounter: prefix RDTSC with LFENCE | cheloha |