Age | Commit message (Expand) | Author |
2020-04-08 | vmm(4): add IOCTL handler to sets the access protections of the ept | pd |
2020-04-08 | vmm(4): handle cr0 writes more correctly for vmx | pd |
2020-01-22 | Remove trailing whitespace, no code change. | Mike Larkin |
2019-07-17 | vmm/vmd: Fix migration with pvclock | pd |
2019-05-17 | Mitigate Intel's Microarchitectural Data Sampling vulnerability. | Philip Guenther |
2019-05-13 | vmm: add host side pvclock | pd |
2019-05-12 | vmm: add a x86 page table walker | pd |
2019-04-01 | vmm(4): Don't advertise support for SSBD and related speculative exec | Mike Larkin |
2019-04-01 | vmm(4): Don't advertise support for MCE/MCA since we don't implement | Mike Larkin |
2019-03-02 | Bump VMM_MAX_NAME_LEN to 64 to allow for longer vm names. | Antoine Jacoutot |
2019-02-20 | vmm(4): allow preservation and restoration of guest debug registers | Mike Larkin |
2018-09-20 | vmm(4): Clear the guest MWAITX/MONITORX extended CPUID feature bit, | Bryan Steele |
2018-08-21 | Perform mitigations for Intel L1TF screwup. There are three options: | Theo de Raadt |
2018-07-12 | zap an extra newline | Mike Larkin |
2018-07-12 | vmm(8)/vmm(4): send a copy of the guest register state to vmd on exit, | Mike Larkin |
2018-07-11 | vmm(4): return proper cache topology for cpuid(0x4) | Mike Larkin |
2018-07-05 | forgot to commit vmmvar.h needed by previous two commits, thanks ccardenas | Mike Larkin |
2018-04-27 | vmm(4): pass through ELCRx ports to vmd(8) | Mike Larkin |
2018-04-26 | vmm(4): passthrough port 0x61 to vmd(8) | Mike Larkin |
2018-03-29 | Remove RDTSCP from the CPUID flags reported to the guest VM. The instruction | Mike Larkin |
2017-11-29 | make vmm(4) less responsible for initial register state, preferring to let | Mike Larkin |
2017-11-29 | add some comments. no functional change | Mike Larkin |
2017-11-17 | vmmvar.h changes for upcoming cdrom support in vmd(8). | Mike Larkin |
2017-08-20 | vmd: Allow only upward migration | pd |
2017-08-14 | vmm: add #defines for exception vectors that can be used to inject | Mike Larkin |
2017-08-12 | vmm: handle IA32_MISC_ENABLE MSR. Bits set in this MSR can result in | Mike Larkin |
2017-08-05 | vmm: support more than 3855MB guest memory | Mike Larkin |
2017-07-12 | Make max memory for VMs equal to MAXDSIZ to avoid failing later during | Mike Larkin |
2017-07-06 | vmd: increase the max number of disks from 2 to 4. Requires kernel rebuild | Mike Larkin |
2017-05-30 | event injection framework, will be used for other features coming shortly | Mike Larkin |
2017-05-30 | FPU context save/restore for SVM in vmm(4), matches a previous diff | Mike Larkin |
2017-05-28 | rename some fields | Mike Larkin |
2017-05-19 | Respect max VPID/ASID limits. VMX VPIDs are capped at 4095, for now. | Mike Larkin |
2017-05-05 | Allow setting guest %xcr0 from vmd(8). | Mike Larkin |
2017-05-02 | Allow setting of guest MSRs from vmd(8). This change is the first part of | Mike Larkin |
2017-04-28 | vmm: don't use invvpid if we didn't detect vpid capability during | Mike Larkin |
2017-04-27 | rename a struct that was denoted as "VMX only" to make it more clear | Mike Larkin |
2017-04-27 | vmm(4): proper save/restore of FPU context during entry/exit. | Mike Larkin |
2017-03-23 | Bump the emulated PCI MMIO range end to 0xFFFFFFFF. This slightly | Mike Larkin |
2017-02-20 | SVM: asm support for SVM/RVI | Mike Larkin |
2017-01-24 | SVM: misspelled field name in vmcb struct (renamed to match SVM code I'm | Mike Larkin |
2017-01-19 | forgot this in previous commit (SVM_MSR* macro definitions) | Mike Larkin |
2017-01-19 | rename a couple of macros that are causing me a merge headache with the | Mike Larkin |
2017-01-19 | SVM: vcpu_init_svm - allocate memory for control structures (vmcb, | Mike Larkin |
2017-01-13 | Starting to merge my old AMD SVM/RVI tree, piece by piece. | Mike Larkin |
2017-01-12 | Remove vc_hsa_stack_va, it has not been used in a long time and is no | Mike Larkin |
2017-01-11 | SVM intercept codes (exit reason) defines | Mike Larkin |
2016-10-26 | Don't use a bitfield in the msr store index structure. This may not end up | Mike Larkin |
2016-10-12 | Allow 4 vio(4) interfaces in each VM. Also fix a bad interrupt assignment that | Mike Larkin |
2016-10-06 | add a debug function that was useful in finding the previous | Mike Larkin |