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path: root/sys/arch/amd64/include
AgeCommit message (Expand)Author
2021-11-19Correct the CPUID() and CPUID_LEAF() macros to not include a trailingPhilip Guenther
2021-09-13vmm(4): add limit to number of vcpusDave Voutila
2021-09-04To mitigate against spectre attacks, AMD processors without theAlexander Bluhm
2021-09-01Older AMD CPUs that do not support IBRS need an lfence after retAlexander Bluhm
2021-08-31vmm(4): add ipi for vmclear, unlock kernelDave Voutila
2021-08-30Remove typedef of db_addr_t; mpi converted the users of it to vaddr_t alreadyJasper Lievisse Adriaanse
2021-07-06Introduce CPU_IS_RUNNING() and us it in scheduler-related code to preventMark Kettenis
2021-06-18The pmap needs to know which CPUs to send IPIs when TLB entriesPhilip Guenther
2021-06-02kernel: introduce per-CPU panic(9) message bufferscheloha
2021-05-20vmm(4): don't advertise cpu support for TSC_ADJUST msrdv
2021-05-16remove prototype for cpu_adjust_tsc_freq()Jonathan Gray
2021-05-14amd64: specialreg.h: add MSR_TSC_ADJUSTcheloha
2021-04-05Improve rdmsr/wrmsr exit handling for both AMD SVM and Intel VMX.dv
2021-03-29Fix IA32_EPT_VPID_CAP_XO_TRANSLATIONS specificationdv
2021-03-11spellingJonathan Gray
2020-12-22stop showing amd l3 cache informationJonathan Gray
2020-11-13Delete unused #defines: T_USER hasn't been used since July 2018Philip Guenther
2020-11-12Simplify interrupt entry stubs to not push around bogus trapno+errPhilip Guenther
2020-11-09Give sizes and types to more functions and objects.Philip Guenther
2020-11-02Restore abstraction of register saving into macros in frameasm.hPhilip Guenther
2020-10-28Use "memory" on inline fence instructions to suggest to the compilerJonathan Gray
2020-10-27Adding IOMMU support for AMD Vi and Intel VTD (disabled)Jordan Hargrave
2020-10-21Save and restore the MXCSR register and the FPU control word such thatMark Kettenis
2020-09-13add an ipi for wbinvd and a linux style wbinvd_on_all_cpus() functionJonathan Gray
2020-09-13add SRBDS cpuid bitsJonathan Gray
2020-07-08Clean up the amd64 userland timecounter implementation a bit:Mark Kettenis
2020-07-06Add support for timeconting in userland.Paul Irofti
2020-07-03Use an LFENCE instruction everywhere where we use RDTSC when we areMark Kettenis
2020-06-30Remove obsolete <machine/stdarg.h> header. Nowadays the varargVisa Hankala
2020-06-17pci_intr_establish_cpu() for establishing an interrupt no a specific cpu.David Gwynne
2020-06-03let the random subsystem read the tsc for event "timestamps".David Gwynne
2020-05-31introduce "cpu_rnd_messybits" for use instead of nanotime in dev/rnd.c.David Gwynne
2020-05-13Kill biospoll/pctrpoll defines and use `seltrue' directly in cdev_*_init().Martin Pieuchot
2020-04-28Use the same inittodr()/resettodr() implementation as on arm64/armv7/sparc64Mark Kettenis
2020-04-15Remove unused protoype.Mark Kettenis
2020-04-08vmm(4): add IOCTL handler to sets the access protections of the eptpd
2020-04-08vmm(4): handle cr0 writes more correctly for vmxpd
2020-03-11Take a swing at blocking Load-Value-Injection attacks against thePhilip Guenther
2020-02-28oops some snapshot tests fell inTheo de Raadt
2020-02-28syncTheo de Raadt
2020-02-20controler -> controllerJonathan Gray
2020-01-24Machines have started to appear that have the framebuffer at an address > 4GB.Mark Kettenis
2020-01-22Remove trailing whitespace, no code change.Mike Larkin
2019-12-23Machines with many CPUs and long feature lists fill up the dmesg(8)Alexander Bluhm
2019-12-20Disable TSX when MSR_ARCH_CAPABILITIES sets TSX_CTRL.Jonathan Gray
2019-12-19Convert boolean_t/TRUE/FALSE to int/1/0 for coherency with the rest ofMartin Pieuchot
2019-11-29Fix size of reserved bytes section in xsave header.mortimer
2019-11-29Pass the EFI memory map to the kernel.Mark Kettenis
2019-11-07Convert db_addr_t -> vaddr_t but leave the typedef for now.Martin Pieuchot
2019-08-26Remove rdtsc macro.Paul Irofti