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path: root/sys/arch/amd64
AgeCommit message (Expand)Author
2018-08-25As Intel(TM) cpus are discovered to have more bugs, more workaround MSRsTheo de Raadt
2018-08-24print cpu family/model/stepping in dmesgJonathan Gray
2018-08-24Don't treat UnicodeChar == 0 as a keyboard input.YASUOKA Masahiko
2018-08-22Enable uscom(4) where uslcom(4) is already present.Martin Pieuchot
2018-08-21Perform mitigations for Intel L1TF screwup. There are three options:Theo de Raadt
2018-08-21Rework kcov kernel config. Instead of treating kcov as both an option and aanton
2018-08-21If a kernel thread was created by a user land system call, the userAlexander Bluhm
2018-08-20Remove unused spllock().Visa Hankala
2018-08-19delete blank line not found in other archTheo de Raadt
2018-08-19pseudo-device must be file-flagged otherwise ramdisks cannot link.Theo de Raadt
2018-08-19Add kcov(4), a kernel code coverage tracing driver. It's used in conjunctionanton
2018-08-19Add support for multiple PCI segments. Only really implemented for arm64Mark Kettenis
2018-08-15add cpuid and msr bits fromJonathan Gray
2018-08-14spelling errorTheo de Raadt
2018-08-10Bump boot loader versions for softraid passphrase handling change.Joel Sing
2018-08-10Retry on incorrect passphrase for softraid crypto boot.Joel Sing
2018-08-08Recognise 'Speculative Store Bypass Disable' support cpuid bit.Jonathan Gray
2018-08-03Add mue(4), a driver for Microchip LAN75xx/LAN78xx 10/100/1000 USB EthernetKevin Lo
2018-08-01On AMD CPUs, If the LFENCE serialization MSR bit is already set, thenBryan Steele
2018-07-30When converting the bios memory map to memory clusters, clip segments atJonathan Matthew
2018-07-27Use the MI interrupt enable/distable API instead of the MD one on amd64 andMark Kettenis
2018-07-26Remove CPUID insn_length checkjob
2018-07-24Fix previous commit: the RSB refill bits change %rcx so it needed to bePhilip Guenther
2018-07-24Also do RSB refilling when context switching, after vmexits, andPhilip Guenther
2018-07-23Add "Mitigation G-2" per AMD's Whitepaper "Software Techniques forBryan Steele
2018-07-23Do "Return stack refilling", based on the "Return stack underflow" discussionPhilip Guenther
2018-07-21Remove the "got meltdown?" conditional from INTRENTRY by doing itPhilip Guenther
2018-07-13Disable codepatching infrastructure after bootStefan Fritsch
2018-07-13repair inconsistanciesTheo de Raadt
2018-07-13zap some garbage that snuck in.Theo Buehler
2018-07-12we will be toggling witness on/off a few times. when it is on, it raisesTheo de Raadt
2018-07-12zap an extra newlineMike Larkin
2018-07-12Unbreak the nmi handler (again): I placed INTR_CLEAR_GPRS in the wrongPhilip Guenther
2018-07-12Reorganize the Meltdown entry and exit trampolines for syscall andPhilip Guenther
2018-07-12Remove cases for 1-bit and 4-bit color depths in efifb_ioctl(), as weFrederic Cambus
2018-07-12Stop building rasops4 on amd64.Frederic Cambus
2018-07-12zap a blank lineMike Larkin
2018-07-12vmm(8)/vmm(4): send a copy of the guest register state to vmd on exit,Mike Larkin
2018-07-11Declare cpu_meltdown in <machine/cpu.h>Philip Guenther
2018-07-11adding __func__ identifier to panic() calls in vmm.c for amd64 and i386Nayden Markatchev
2018-07-11Detect vmm(4) in the bootloader and automatically switch to the serialMike Larkin
2018-07-11vmm(4): return proper cache topology for cpuid(0x4)Mike Larkin
2018-07-11vmm(4): respect argument size when reading from undefined ports.Mike Larkin
2018-07-11vmm(4): small cleanup in vm_rwregs.Mike Larkin
2018-07-10In asm.h ensure NENTRY uses the old-school nop-sled align, but change standardTheo de Raadt
2018-07-10vmm(4): remove a wrong commentMike Larkin
2018-07-10Drop the ignored selectors (tf_[defg]s) from the trap and interrupt frames.Philip Guenther
2018-07-10Move from sendsig() to its callers the initsiginfo() calls andPhilip Guenther
2018-07-09vmm(4): prohibit setting/clearing invalid bits in %cr0/%cr4. This wasMike Larkin
2018-07-09Mark the i8254 clock interrupt MPSAFE. It isn't, but it doesn't matterMark Kettenis