Age | Commit message (Collapse) | Author |
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- provide proper dtoa locks
- use the real strtof implementation
- add strtold, __hdtoa, __hldtoa
- add %a/%A support
- don't lose precision in printf, don't round to double anymore
- implement extended-precision versions of libc functions: fpclassify,
isnan, isinf, signbit, isnormal, isfinite, now that the ieee.h is
fixed
- separate vax versions of strtof, and __hdtoa
- add complex math support. added functions: cacos, casin, catan,
ccos, csin, ctan, cacosh, casinh, catanh, ccosh, csinh, ctanh, cexp,
clog, cabs, cpow, csqrt, carg, cimag, conj, cproj, creal, cacosf,
casinf, catanf, ccosf, csinf, ctanf, cacoshf, casinhf, catanhf,
ccoshf, csinhf, ctanhf, cexpf, clogf, cabsf, cpowf, csqrtf, cargf,
cimagf, conjf, cprojf, crealf
- add fdim, fmax, fmin
- add log2. (adapted implementation e_log.c. could be more acruate
& faster, but it's good enough for now)
- remove wrappers & cruft in libm, supposed to work-around mistakes
in SVID, etc.; use ieee versions. fixes issues in python 2.6 for
djm@
- make _digittoint static
- proper definitions for i386, and amd64 in ieee.h
- sh, powerpc don't really have extended-precision
- add missing definitions for mips64 (quad), m{6,8}k (96-bit) float.h
for LDBL_*
- merge lead to frac for m{6,8}k, for gdtoa to work properly
- add FRAC*BITS & EXT_TO_ARRAY32 definitions in ieee.h, for hdtoa&ldtoa
to use
- add EXT_IMPLICIT_NBIT definition, which indicates implicit
normalization bit
- add regression tests for libc: fpclassify and printf
- arith.h & gd_qnan.h definitions
- update ieee.h: hppa doesn't have quad-precision, hppa64 does
- add missing prototypes to gdtoaimp
- on 64-bit platforms make sure gdtoa doesn't use a long when it
really wants an int
- etc., what i may have forgotten...
- bump libm major, due to removed&changed symbols
- no libc bump, since this is riding on djm's libc major crank from
a day ago
discussed with / requested by / testing theo, sthen@, djm@, jsg@,
merdely@, jsing@, tedu@, brad@, jakemsr@, and others.
looks good to millert@
parts of the diff ok kettenis@
this commit does not include:
- man page changes
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address space. The space between PAGE_SIZE and the non-pie fixed link
address creates no mmap pressure so use that space for PIE. However on
hppa the non-pie fixed link address is PAGE_SIZE so just use a small range
for PIE to minimize mmap pressure.
okay miod@
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in the MI code.
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process_write_regs().
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- math.h shouldn't define FLT_EVAL_METHOD, but float.h should (per
C99). remove from math.h, and add proper definitions in float.h
ok millert@
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Right now when mi_switch picks up the same proc, we didn't clear the
flag which would mean that every time we service an AST we would attempt
a context switch. For some architectures, amd64 being probably the
most extreme, that meant attempting to context switch for every
trap and interrupt.
Now we clear_resched explicitly after every context switch, even if it
didn't do anything. Which also allows us to remove some more code
in cpu_switchto (not done yet).
miod@ ok
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and can not work from a stack address only. Mention this and abort instead of
printing a wrong trace. (prefer kern.splassert=3 to =2 on these platforms)
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conversions that should shave a few bytes off the kernel.
ok henning, krw, jsing, oga, miod, and thib (``even though i usually prefer
FOO|BAR''; thanks for looking.
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tested by maja@
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available memory regions will be reported to be in VM_FREELIST_DEFAULT.
Add a few quirks to cope with (some) IP27 and IP30 weirdness.
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code soon. Similar to what ddb does, but does not need ddb to be compiled in.
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and a time-of-day chip (wherever it gets found).
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Define a symbolic ``cached'' attribute, to be used for cached mappings
regardless of the system's cache coherency.
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segments and the number of freelists.
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reason this would have been blatant on sparc on motorola, one more proof
mips is the ante${DEITY} yet fun to live with.
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different now.
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inherited from OpenBSD/arc machines with ISA bus; mainbus children match on
device name and other hierarchies match on simplified locators.
As a bonus, attachment lines in dmesg will now print their locators.
ok jsing@
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handle XKPHYS addresses correctly.
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as the Octane; joint work with jsing@
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RM7000 machines.
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- evict the memory from cache in pmap_page_free().
- make sure to sync cache in pmap_protect() if it marks a modified cacheable
page as read-only.
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instead of when removing the last page. It looked correct, but is defeated
by ``index'' cache invalidates.
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when machdep.kbdreset is set, and the correct interrupt is fired,
the machine gets shut down.
with help from and ok jsing@, ok miod@
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ok miod@
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it later on.
ok miod@
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ok jsing@ a while ago (and this diff is much much older)
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the break.
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pmap_update() to return with this value in v0. A void function. Bwahahaha.
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ok miod@
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tested by deraadt@ jsing@
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pmap.h now includes pte.h.
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- Move the functionality of choosing a process from cpu_switch into
a much simpler function: cpu_switchto. Instead of having the locore
code walk the run queues, let the MI code choose the process we
want to run and only implement the context switching itself in MD
code.
- Let MD context switching run without worrying about spls or locks.
- Instead of having the idle loop implemented with special contexts
in MD code, implement one idle proc for each cpu. make the idle
loop MI with MD hooks.
- Change the proc lists from the old style vax queues to TAILQs.
- Change the sleep queue from vax queues to TAILQs. This makes
wakeup() go from O(n^2) to O(n)
there will be some MD fallout, but it will be fixed shortly.
There's also a few cleanups to be done after this.
deraadt@, kettenis@ ok
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ok art@
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