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path: root/sys/arch/mips64
AgeCommit message (Expand)Author
2017-01-03Remove #define __SWAP_BROKEN from mips64. The architecture nowVisa Hankala
2017-01-02Allow freeing of newly empty directory pages.Visa Hankala
2016-12-30Ansify pmap_copy().Visa Hankala
2016-12-30When entering a mapping on write access, compute the PTE after makingVisa Hankala
2016-12-23Tweaks suggested by miod@Visa Hankala
2016-12-22Extend the size of user virtual address space from 2GB to 1TB on mips64Visa Hankala
2016-12-21Add a driver for OCTEON MMC host controller.Visa Hankala
2016-12-17Make Octeon model strings a bit more specific. While there,Visa Hankala
2016-12-16Provide the "machdep.lidsuspend" sysctl on Loongson.Frederic Cambus
2016-12-12Tweak IPI register definitions.Visa Hankala
2016-12-06Get PTE shift using PTE_LOG.Visa Hankala
2016-11-21Enabling Loongson 3A bits turned on a code path that uses a MIPS64r2Visa Hankala
2016-11-06Add interrupt handling routines for Loongson 3A.Visa Hankala
2016-10-27Revert previous `ncpus' change because the percpu code now worksVisa Hankala
2016-10-26Increment `ncpus' to its final value already during autoconfiguration soVisa Hankala
2016-10-19Change pmap_proc_iflush() to take a process instead of a procPhilip Guenther
2016-10-19The first argument to process_domem() and its uio_procp should be curprocPhilip Guenther
2016-10-09Do not use MIPS64r2 instructions on Loongson 2. Now, a generic loongsonVisa Hankala
2016-10-08Various printf claim to report the PID, so actually report that and not the TIDPhilip Guenther
2016-09-25Make a move towards ending 4 decades of kernel snooping.Theo de Raadt
2016-09-19fix whitespace at EOLJasper Lievisse Adriaanse
2016-09-15all pools have their ipl set via pool_setipl, so fold it into pool_init.David Gwynne
2016-09-06Define PTE_* macros in one place. Use the lwu instruction for 32-bit PTEVisa Hankala
2016-09-03Increase the number of mbufs on most architectures. This is basedAlexander Bluhm
2016-08-16Remove RM7000/RM9000-specific performance counter code. It originatesVisa Hankala
2016-08-14Utilize the TLB Execute-Inhibit bit with non-executable mappings on CPUsVisa Hankala
2016-08-06Add PageGrain bits.Visa Hankala
2016-08-01bring the light of ansi to a few more filesTed Unangst
2016-05-23Place a cpu-dependent trap/illegal instruction over the remainder of theTheo de Raadt
2016-05-21hand-massage sendsig() and sys_sigreturn() to be much more similar.Theo de Raadt
2016-05-11Another attempt to make the mips64 pmap MP-safe. Now at leastVisa Hankala
2016-05-10SROP mitigation. sendsig() stores a (per-process ^ &sigcontext) cookieTheo de Raadt
2016-04-27G/C DDB_REGS.Martin Pieuchot
2016-04-24Make pmap_invalidate_*_page() and pmap_update_*_page() operate only onVisa Hankala
2016-04-24Keep pmap_update_{kernel,user}_page() inside pmap.c.Visa Hankala
2016-04-23Sync dcaches and invalidate icaches of all active CPUs of a pmap whenVisa Hankala
2016-03-19Reduces the noise around the global ``ticks'' variable by renamingMartin Pieuchot
2016-03-06Rename mips64's trap_frame into trapframe.Martin Pieuchot
2016-03-01guard macro args with parensmmcc
2016-03-01DB_SYM_NULL -> NULL.Martin Pieuchot
2016-02-27Rename kdb_trap() into db_ktrap().Martin Pieuchot
2016-02-01Zap stray pmap_kenter_cache() prototype.Visa Hankala
2016-02-01Move modify bit emulation into pmap.c to gather pmap C code in one place.Visa Hankala
2016-01-10Back out the MP pmap diff for rework. The code does not work onVisa Hankala
2016-01-08Make sure the new rendezvous state is visible to other CPUs beforeVisa Hankala
2016-01-05Remove PTE locking from pmap_extract() because it does not add any MPVisa Hankala
2016-01-05Some implementations of HitSyncDCache() call pmap_extract() for va->paVisa Hankala
2015-12-31Protect mips64 pmap and pvlist structs with a mutex to make pmapVisa Hankala
2015-12-25Make interrupt masking MP-aware. Linux IP27 and IP35 ports served as aVisa Hankala
2015-11-02Only define KERNBASE if defined(_KERNEL), for nothing in userland needs it,Miod Vallat
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