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path: root/sys/arch/riscv64
AgeCommit message (Expand)Author
2021-08-30Remove typedef of db_addr_t; mpi converted the users of it to vaddr_t alreadyJasper Lievisse Adriaanse
2021-08-02Add memory barrier (data FENCE) before making the SBI call to issue aMark Kettenis
2021-07-30Use inline function for SFENCE.VMA instruction. Fixes missing "memory"Mark Kettenis
2021-07-30Cleanup ptrace-related code; still untested.Mark Kettenis
2021-07-26Print a few more registers in dump_regs().Mark Kettenis
2021-07-25enable iwm(4)Jonathan Gray
2021-07-25enable ix(4)Jonathan Gray
2021-07-24riscv64 userland timecounter supportJeremie Courreges-Anglas
2021-07-24Implement a workaround for the SiFive FU740 CIP-1200 errata.Mark Kettenis
2021-07-23Use 8/4/1 bytes loads/stores for copyin/copyout/kcopyJeremie Courreges-Anglas
2021-07-12Add uaudio(4) and umidi(4). ok kettenis@, mlarkin@Matthieu Herrb
2021-07-11convert db_addr_t to vaddr_tJasper Lievisse Adriaanse
2021-07-10tweak indentation of conditional in db_validate_address().Jasper Lievisse Adriaanse
2021-07-09use vaddr_t as type for frames as is commonly used elsewhere tooJasper Lievisse Adriaanse
2021-07-06Shifts (<<) of more than 32 bits must be done on 64-bit values.Patrick Wildt
2021-07-02Remove bogus comments.Mark Kettenis
2021-07-02Remove a few pointless comments.Mark Kettenis
2021-07-02Cleanup early bootstrap code. This mostly realigns the code with theMark Kettenis
2021-07-02Only do TLB shootdown on CPUs where a pmap is active. Only make SBI callsMark Kettenis
2021-07-02Run SBI calls to to get mvendorid/marchid/mimplid on the actual CPU we'reMark Kettenis
2021-06-30Simplify the way we track the FPU state, using powerpc64 as a model.Mark Kettenis
2021-06-30add missing call to sbi_remote_fence_i()Jonathan Gray
2021-06-30MULTIPTOCESSOR -> MULTIPROCESSORJonathan Gray
2021-06-29SMP support. Mostly works, but occasionally craps out during boot.Mark Kettenis
2021-06-29delete pre-EFI boot kernel location scriptingTheo de Raadt
2021-06-29sync maxusers with other 64bits architectures. ok kettenis@, deraadt@.Matthieu Herrb
2021-06-29The way we boot OpenBSD, there is no need to play the hart lottery.Mark Kettenis
2021-06-28do not need .align 2 or 4 after .text, the ABI's .text will decide whatTheo de Raadt
2021-06-28whitespaceTheo de Raadt
2021-06-28Fix assembly in #ifdef MULTIPROCESSOR case.Mark Kettenis
2021-06-28delete .align inside sigtramp stubs, as the stack alignment requirementTheo de Raadt
2021-06-28Implement copyin32().Mark Kettenis
2021-06-27Make sure __bss_start is aligned on an 8-byte boundary. This makes sureMark Kettenis
2021-06-27Using the MI mplock should be fine on riscv64.Mark Kettenis
2021-06-27Add Hart State Management functions. These will be needed to spin upMark Kettenis
2021-06-26For some reason the riscv64 locore.S ended up with the copyright licenseMark Kettenis
2021-06-25Move unused eficall.h files to the Attic.Kenneth R Westerback
2021-06-25basic radeondrm / X support for riscv64. Ok kettenis@Matthieu Herrb
2021-06-25add SIZE_MAX. ok kettenis@Matthieu Herrb
2021-06-251) Finish eliminating all uses of EFI_CALL() used in the tree, allowing for theKenneth R Westerback
2021-06-25use weaker fences for riscv64 membarJonathan Gray
2021-06-23Enable titmp(4).Mark Kettenis
2021-06-21Change tb_freq to uint64_t. This prevents an overflow in the riscv64Mark Kettenis
2021-06-21Change tb_freq to uint64_t. This prevents an overflow in the riscv64Mark Kettenis
2021-06-21code is obvious, comments not requiredTheo de Raadt
2021-06-21delete old debugging codeTheo de Raadt
2021-06-20Mystery bag of cleanups -- mostly removing old debug code, or movingTheo de Raadt
2021-06-20Make sure we program the baud rate divisor register. Without this,Mark Kettenis
2021-06-20Skip disabled cpus (usually service cpus without full functionality).Theo de Raadt
2021-06-19Assert that fpu_load() only gets called with the FPU "off".Mark Kettenis