| Age | Commit message (Expand) | Author |
|---|
| 2014-03-29 | It's been a quarter century: we can assume volatile is present with that name. | Philip Guenther |
| 2014-03-27 | {fix,add} comments. | Miod Vallat |
| 2014-03-09 | Rework the per-cpu cache information. Use a common struct to store the line | Miod Vallat |
| 2013-12-11 | Better bus error diagnostics (this really only affects IP28). Also, do what | Miod Vallat |
| 2012-10-17 | Swap arguments to wdog_register() since it is nicer, and prepare | Theo de Raadt |
| 2012-10-03 | Don't include <mips64/archtype.h> unless you really need it. | Miod Vallat |
| 2012-10-03 | Split ever-growing mips <machine/cpu.h> into what 99% of the kernel needs, | Miod Vallat |
| 2012-09-29 | Work in progress support for the Power Indigo2 R8000 system (IP26). This is | Miod Vallat |
| 2012-09-29 | Handle the coprocessor 0 cause and status registers as a 64 bit value now, | Miod Vallat |
| 2012-09-29 | Proide a mips_sync() macro to wrap asm("sync"), and replace gazillions of | Miod Vallat |
| 2012-07-18 | According to Linux, and just verified the hard way, the 8254 timer does not | Miod Vallat |
| 2012-07-14 | A known errata of R4000 and R4400 processors, is that reading the internal | Miod Vallat |
| 2012-05-27 | Proper support for the so-called `fast mode' of the Indigo2 ECC memory | Miod Vallat |
| 2012-05-27 | Decide once for all whether IP22/IP28 systems are running with the ECC memory | Miod Vallat |
| 2012-05-25 | On IP28, silently acknowledge bus errors which can be attributed to | Miod Vallat |
| 2012-05-25 | Support for the POWER Indigo2 R10000 systems (IP28). Currently running with | Miod Vallat |
| 2012-04-21 | Remove long dead prototypes. | Miod Vallat |
| 2012-04-18 | Driver for the GR2 family of frame buffers (Elan, XZ...). Based upon the | Miod Vallat |
| 2012-04-18 | Reading the IMC bus arbitration register is not reliable, at least on IP20, | Miod Vallat |
| 2012-04-17 | Infrastructure to allow an interrupt handler to request its interrupt to be | Miod Vallat |
| 2012-04-15 | Define symbolic constants for the interrupt controller pin assignments on | Miod Vallat |
| 2012-04-15 | Declare most imc bus_space(9) methods in a visible header; this will be used | Miod Vallat |
| 2012-04-15 | Tell Indy and Challenge S apart. | Miod Vallat |
| 2012-04-09 | Attach eisa devices after all the onboard devices have attached rather than | Miod Vallat |
| 2012-04-02 | EISA bus attachment glue for Indigo 2 systems. Currently only tested with | Miod Vallat |
| 2012-03-28 | Work in progress support for the SGI Indigo, Indigo 2 and Indy systems | Miod Vallat |
| 2012-03-15 | No longer allow bus_space_barrier() to be a NULL pointer on a given | Miod Vallat |
| 2010-09-20 | Get rid of evcount's support for arranging counters in a tree | Matthew Dempsky |
| 2010-08-23 | Implement bus_space_barrier() on sgi; on xbridge, this will also flush | Miod Vallat |
| 2009-11-25 | IP30 IPI implementation. | Takuya ASADA |
| 2009-11-12 | Oops, I can't even spell `spurious' correctly. | Miod Vallat |
| 2009-11-12 | Only read mace interrupt registers once in the interrupt handler; and fix | Miod Vallat |
| 2009-11-12 | Move the interrupt makemasks() code to the interrupt template; no functional | Miod Vallat |
| 2009-10-26 | Oops; forgot to add this file in previous commit (overhaul of macebus | Miod Vallat |
| 2009-10-26 | Better crime/mace interrupt handling; interrupt information is no longer | Miod Vallat |
| 2009-10-22 | Completely overhaul interrupt handling on sgi. Cpu state now only stores a | Miod Vallat |
| 2009-10-22 | With the splx() changes, it is no longer necessary to remember which interrupt | Miod Vallat |
| 2009-10-22 | Make macebus_intr_disestablish() signature sane, and update its caller. | Miod Vallat |
| 2009-10-22 | The recent cleanups make blatantly visible that the pending_int handler | Miod Vallat |
| 2009-10-22 | unifdef -DIMASK_EXTERNAL to the mips code. Support for interrupt masking at | Miod Vallat |
| 2009-10-22 | Replace intrmask_t with uint32_t. This types only describes interrupt masks | Miod Vallat |
| 2009-10-21 | Replace IP32 hw_setintrmask() .S routine with a two line C routine. | Miod Vallat |
| 2009-10-16 | Honour serial console speed on O2 too. | Miod Vallat |
| 2009-10-07 | ipending, cpl moved into cpu_info | Takuya ASADA |
| 2009-08-22 | Constify the what/name parameter of pci_intr_establish(). | Michael Knudsen |
| 2009-07-22 | Get rid of bus_space_tag_t now unused bus_extent and bus_reverse fields. | Miod Vallat |
| 2009-07-22 | Use direct mappings in XKPHYS for bus_space, instead of extent and TLB | Miod Vallat |
| 2009-07-22 | Make sure the irq numbers for the O2 event counters match the interrupt lines | Miod Vallat |
| 2009-07-17 | Update bus_dma to the better codebase found on almost all other platforms, | Miod Vallat |
| 2009-05-22 | Drop almost unused <machine/psl.h> on sgi; move USERMODE() definition from | Miod Vallat |
