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AgeCommit message (Expand)Author
2023-08-14Skip leading dash in kernel boot options instead of complaining it is anMiod Vallat
2023-08-14Add a copyin32() implementation.Miod Vallat
2023-08-12Fix comments regarding pcb_onfault maintainence. No code change.Miod Vallat
2023-08-11agtimer(4/arm64): call CPU_BUSY_CYCLE() during spin-loopScott Soule Cheloha
2023-08-10agtimer(4/arm64): agtimer_delay: compute cycle count with 64-bit arithmeticScott Soule Cheloha
2023-08-10Take advantage of the fact that the WFI instruction does continueMark Kettenis
2023-08-10The Lenovo X13s has broken firmware that makes it impossible to use PAC.Mark Kettenis
2023-08-09correct platform id mask, it is 3 bits 52:50Jonathan Gray
2023-08-09show x86 cpu patch level in dmesgJonathan Gray
2023-08-07Revert 1.43 and always make our own mapping of the Mostek chip. Trying toMiod Vallat
2023-08-05cpu_idle_{enter,leave} are no-ops on mips64, so just #definePhilip Guenther
2023-08-05cpu_idle_{enter,leave} are no-ops on riscv64, so just #definePhilip Guenther
2023-08-05Inform 8bpp capability on 8bpp framebuffer inKenji Aoyama
2023-08-02Revert r1.31 - contrary to what I wrote, scaled versions of ld.d and st.dMiod Vallat
2023-08-01Add (limited) support for setting PPL0 on JH7110.Mark Kettenis
2023-07-31Mark code parameter of codepatch_replace() constant also on i386.Alexander Bluhm
2023-07-31Implement audio input source selection.Tobias Heider
2023-07-31On CPUs with eIBRS ("enhanced Indirect Branch Restricted Speculation")Philip Guenther
2023-07-31The replacement code passed to codepatch_replace() can usefully bePhilip Guenther
2023-07-30Add JH7110 I2C clocks.Mark Kettenis
2023-07-28Include a newline in a DPRINTF()Philip Guenther
2023-07-28Add CODEPATCH_CODE() macro to simplify defining a symbol for a chunkPhilip Guenther
2023-07-28Fix off-by-one: SEFF0ECX_WAITPKG is bit 5, not bit 4.Jonathan Gray
2023-07-27Fix off-by-one: SEFF0ECX_WAITPKG is bit 5, not bit 4.Philip Guenther
2023-07-27Report speculation control bits in dmesg cpu lines.Philip Guenther
2023-07-27The interrupt resume (Xdoreti) and recurse (Xspllower) paths arePhilip Guenther
2023-07-27Follow the lead of mips64 and make cpu_idle_cycle() just call thePhilip Guenther
2023-07-26Shutd down the power domains suring suspend.Mark Kettenis
2023-07-25statclock: move profil(2), GPROF code to profclock(), gmonclock()Scott Soule Cheloha
2023-07-25Extend the PCKBC_CANT_TRANSLATE feature, specific to Tadpole/RDI hardware,Miod Vallat
2023-07-25cpu_idle_{enter,leave} are no-ops on amd64 now, so just #definePhilip Guenther
2023-07-25Some hypervisors (such as Hertzner) allow msr read of DE_CFG (which doesTheo de Raadt
2023-07-24Set DE_CFG[9] -- a chickenbit which stops Zenbleed. The chickenbit mayTheo de Raadt
2023-07-24after the boot block changes on i386, sthen noticed a dmesg changeJonathan Gray
2023-07-23Implement suspend/resume support. This will turn off the power domainMark Kettenis
2023-07-23Enable power domain.Mark Kettenis
2023-07-23update AMD CPU microcode if a newer patch is availableJonathan Gray
2023-07-23update AMD CPU microcode if a newer patch is availableJonathan Gray
2023-07-22Add qcsdam(4), a driver for the PMIC Shared Direct Access Memory found onPatrick Wildt
2023-07-22BOOTARG_UCODE for AMDJonathan Gray
2023-07-21Rename ARCH_CAPABILITIES_* #defined to ARCH_CAP_*Philip Guenther
2023-07-20Remove unused function prototype.Mark Kettenis
2023-07-20Assign wsdisplay0 to the glass console always. The same change isYASUOKA Masahiko
2023-07-19Reset sc->sc_early to 0 to make sure the framebuffer attaches.Mark Kettenis
2023-07-19Use "early 2" to attach aplpngr(4) to make sure it attaches before otherMark Kettenis
2023-07-19Implement "early 2" locator for mainbus(4) and simplebus(4) to makeMark Kettenis
2023-07-16Remove debug printfs that print the number of wakeups seen by theMark Kettenis
2023-07-16Read out the system power consumption immediately after wakeup and printMark Kettenis
2023-07-15Remove stray argument name in function prototype.Mark Kettenis
2023-07-13Use the deep idle state available on Apple M1/M2 cores in the idle loop andMark Kettenis