| Age | Commit message (Expand) | Author |
|---|---|---|
| 2010-07-15 | sync initialization values for AR9160 and AR9280 with ath9k. | Damien Bergamini |
| 2010-07-15 | Remove initialization values for chips that never made it into production: | Damien Bergamini |
| 2010-05-11 | enable fast PLL clock for 5GHz on AR9280 >=2.0 (unless EEPROM says the | Damien Bergamini |
| 2009-11-14 | athn(4), a driver for Atheros 802.11a/g/n devices. | Damien Bergamini |
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index : src | |
| OpenBSD base system |
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