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AgeCommit message (Expand)Author
2016-05-04Use BUS_DMA_OVERRUN to cope with the broken DMA engine of the Davicom DM9102Mark Kettenis
2016-05-01Add support for changing the bus width to the sdmmc subsystem and the sdhc(4)Mark Kettenis
2016-04-20If RTL8111E on PC Engines APU is detected, configure NIC LEDs to display link.Stuart Henderson
2016-04-18allocate an array of entries, not pointers for the queuesDavid Gwynne
2016-04-14shorten the io path slightlyDavid Gwynne
2016-04-14apparently it's spelled NVMe, not NVMEDavid Gwynne
2016-04-14provide a shutdown hook that follows the procedure in the docsDavid Gwynne
2016-04-14implement translation of scsi SYNC CACHE to nvme FLUSHDavid Gwynne
2016-04-14bump openings to 64 to match the number of ccbs.David Gwynne
2016-04-14if io needs more than two prpe slots, overflow into the ccb prplDavid Gwynne
2016-04-14reallocate the ccbs after we figure out how big the sgls can beDavid Gwynne
2016-04-14set the scsi status to SCSI_OKDavid Gwynne
2016-04-14allocate dma memory for ccbs to use as prpe listsDavid Gwynne
2016-04-14dont attach if the min nvme page size is bigger than the cpu page sizeDavid Gwynne
2016-04-14dont complete scsi writes twiceDavid Gwynne
2016-04-14WAITOK for the dmamap create for ccbs tooDavid Gwynne
2016-04-14cut the memory for io buffers up into page sized chunksDavid Gwynne
2016-04-14check both the admin and io queue for completions in the interrupt handlerDavid Gwynne
2016-04-14dont put names in arguments.David Gwynne
2016-04-14tabs, not spacesDavid Gwynne
2016-04-13implement handling of scsi reads and writesDavid Gwynne
2016-04-13enable interrupts before attaching the scsibusDavid Gwynne
2016-04-13allocate a queue for io commands and tell the chip about it.David Gwynne
2016-04-13nvme_q_create() issues the commands to tell the chip about io queuesDavid Gwynne
2016-04-13stub out handling of TEST_UNIT_READY, PREVENT_ALLOW, and START_STOPDavid Gwynne
2016-04-13implement handling of scsi read capacity commandsDavid Gwynne
2016-04-13implement basic scsi inquiry handlingDavid Gwynne
2016-04-13provide variants of the sqe struct for q creation and io operationsDavid Gwynne
2016-04-13implement the guts of the scsi probe and free functionDavid Gwynne
2016-04-13implement the namespace identify structureDavid Gwynne
2016-04-13the io command setDavid Gwynne
2016-04-13wire up the scsi midlayer. scsibus should appear after this.David Gwynne
2016-04-13allocate an array of things to hold info about namespacesDavid Gwynne
2016-04-13stash the controller identify and number of namespaces in the softc.David Gwynne
2016-04-13make a place for q_id to goDavid Gwynne
2016-04-13provide an scsi_adapter and stub functions for emulation to sit inDavid Gwynne
2016-04-13nvme_sqe_fill will post a copy of an sqe from a callerDavid Gwynne
2016-04-13poll for command completion on the cqe itll be of calling nvme_intrDavid Gwynne
2016-04-13make nvme_poll return the flags from the completion queue entryDavid Gwynne
2016-04-13keep track of the queue id in nvme_queue.David Gwynne
2016-04-13rename idx to id in nvme_q_allocDavid Gwynne
2016-04-13nvme_dmamem_alloc runs in autoconf or process context, so it can sleepDavid Gwynne
2016-04-13G/C IFQ_SET_READY().Martin Pieuchot
2016-04-12shuffle attach so we read chip capabilities before operating on itDavid Gwynne
2016-04-01Remove outdated unused compat define. mono_time no longer exists andJonathan Gray
2016-03-27Kill async code commented out for more than 10 years.Martin Pieuchot
2016-03-21In ral(4) RT2860 code, replace custom defrag with m_defrag().Stefan Sperling
2016-03-21Fix watchdog timeouts and dropped frames under load with RT2860 ral(4).Stefan Sperling
2016-03-21The common part of rtwn(4) needs help from attachment drivers to determineStefan Sperling
2016-03-19Reduces the noise around the global ``ticks'' variable by renamingMartin Pieuchot
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