Age | Commit message (Expand) | Author |
2016-05-20 | check we allocated the cq, not the sq, after trying to allocate the cq | David Gwynne |
2016-05-10 | make qla_iocb_seg structs 4 byte aligned and use htolem32 to set it. | David Gwynne |
2016-05-06 | Make sure we always update both bits that control the bus width. Also make | Mark Kettenis |
2016-05-06 | Round the requested clock frequency down to a support value instead of | Mark Kettenis |
2016-05-06 | Fix the DMA transfer code to repect the block size in the sdmmc command. | Mark Kettenis |
2016-05-05 | Add Dual Data Rate support for eMMC at 52MHz. | Mark Kettenis |
2016-05-04 | Use BUS_DMA_OVERRUN to cope with the broken DMA engine of the Davicom DM9102 | Mark Kettenis |
2016-05-01 | Add support for changing the bus width to the sdmmc subsystem and the sdhc(4) | Mark Kettenis |
2016-04-20 | If RTL8111E on PC Engines APU is detected, configure NIC LEDs to display link. | Stuart Henderson |
2016-04-18 | allocate an array of entries, not pointers for the queues | David Gwynne |
2016-04-14 | shorten the io path slightly | David Gwynne |
2016-04-14 | apparently it's spelled NVMe, not NVME | David Gwynne |
2016-04-14 | provide a shutdown hook that follows the procedure in the docs | David Gwynne |
2016-04-14 | implement translation of scsi SYNC CACHE to nvme FLUSH | David Gwynne |
2016-04-14 | bump openings to 64 to match the number of ccbs. | David Gwynne |
2016-04-14 | if io needs more than two prpe slots, overflow into the ccb prpl | David Gwynne |
2016-04-14 | reallocate the ccbs after we figure out how big the sgls can be | David Gwynne |
2016-04-14 | set the scsi status to SCSI_OK | David Gwynne |
2016-04-14 | allocate dma memory for ccbs to use as prpe lists | David Gwynne |
2016-04-14 | dont attach if the min nvme page size is bigger than the cpu page size | David Gwynne |
2016-04-14 | dont complete scsi writes twice | David Gwynne |
2016-04-14 | WAITOK for the dmamap create for ccbs too | David Gwynne |
2016-04-14 | cut the memory for io buffers up into page sized chunks | David Gwynne |
2016-04-14 | check both the admin and io queue for completions in the interrupt handler | David Gwynne |
2016-04-14 | dont put names in arguments. | David Gwynne |
2016-04-14 | tabs, not spaces | David Gwynne |
2016-04-13 | implement handling of scsi reads and writes | David Gwynne |
2016-04-13 | enable interrupts before attaching the scsibus | David Gwynne |
2016-04-13 | allocate a queue for io commands and tell the chip about it. | David Gwynne |
2016-04-13 | nvme_q_create() issues the commands to tell the chip about io queues | David Gwynne |
2016-04-13 | stub out handling of TEST_UNIT_READY, PREVENT_ALLOW, and START_STOP | David Gwynne |
2016-04-13 | implement handling of scsi read capacity commands | David Gwynne |
2016-04-13 | implement basic scsi inquiry handling | David Gwynne |
2016-04-13 | provide variants of the sqe struct for q creation and io operations | David Gwynne |
2016-04-13 | implement the guts of the scsi probe and free function | David Gwynne |
2016-04-13 | implement the namespace identify structure | David Gwynne |
2016-04-13 | the io command set | David Gwynne |
2016-04-13 | wire up the scsi midlayer. scsibus should appear after this. | David Gwynne |
2016-04-13 | allocate an array of things to hold info about namespaces | David Gwynne |
2016-04-13 | stash the controller identify and number of namespaces in the softc. | David Gwynne |
2016-04-13 | make a place for q_id to go | David Gwynne |
2016-04-13 | provide an scsi_adapter and stub functions for emulation to sit in | David Gwynne |
2016-04-13 | nvme_sqe_fill will post a copy of an sqe from a caller | David Gwynne |
2016-04-13 | poll for command completion on the cqe itll be of calling nvme_intr | David Gwynne |
2016-04-13 | make nvme_poll return the flags from the completion queue entry | David Gwynne |
2016-04-13 | keep track of the queue id in nvme_queue. | David Gwynne |
2016-04-13 | rename idx to id in nvme_q_alloc | David Gwynne |
2016-04-13 | nvme_dmamem_alloc runs in autoconf or process context, so it can sleep | David Gwynne |
2016-04-13 | G/C IFQ_SET_READY(). | Martin Pieuchot |
2016-04-12 | shuffle attach so we read chip capabilities before operating on it | David Gwynne |