Age | Commit message (Expand) | Author |
---|---|---|
2019-12-21 | Fix DDR4 DIMM size calculation. | Mark Kettenis |
2019-12-17 | Add code to parse DDR4 and LPDDR3/4 SPD memories. | Claudio Jeker |
2015-01-25 | Correct a bit test for DDR2 CAS Latency and recognise CL7 and CL6. | Jonathan Gray |
2015-01-19 | Remove dead store causing clang to warn; dhill | Miod Vallat |
2011-04-19 | Remove dead assignments and newly created unused variables. | Charles Longeau |
2010-06-29 | fix a logic error found by lint | Jonathan Gray |
2010-03-22 | Split existing spdmem@i2c code into bus-agnostic spd record decoding code, | Miod Vallat |