1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
162
163
164
165
166
167
168
169
170
171
172
173
174
175
|
/* $OpenBSD: intr.h,v 1.19 2002/07/23 17:53:25 drahn Exp $ */
/*
* Copyright (c) 1997 Per Fogelstrom, Opsycon AB and RTMX Inc, USA.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* 3. All advertising materials mentioning features or use of this software
* must display the following acknowledgement:
* This product includes software developed under OpenBSD by
* Per Fogelstrom, Opsycon AB, Sweden for RTMX Inc, North Carolina USA.
* 4. The name of the author may not be used to endorse or promote products
* derived from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS
* OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY
* DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
* SUCH DAMAGE.
*
*/
#ifndef _POWERPC_INTR_H_
#define _POWERPC_INTR_H_
#define IPL_BIO 0
#define IPL_AUDIO IPL_BIO /* XXX - was defined this val in audio_if.h */
#define IPL_NET 1
#define IPL_TTY 2
#define IPL_IMP 3
#define IPL_CLOCK 4
#define IPL_NONE 5
#define IPL_HIGH 6
#define IST_NONE 0
#define IST_PULSE 1
#define IST_EDGE 2
#define IST_LEVEL 3
#ifndef _LOCORE
#define PPC_NIRQ 65
#define PPC_CLK_IRQ 64
extern int intrcnt[PPC_NIRQ];
void setsoftclock(void);
void clearsoftclock(void);
int splsoftclock(void);
void setsoftnet(void);
void clearsoftnet(void);
int splsoftnet(void);
void do_pending_int(void);
volatile extern int cpl, ipending, astpending, tickspending;
extern int imask[7];
/* SPL asserts */
#define splassert(wantipl) /* nothing */
/*
* Reorder protection in the following inline functions is
* achived with an empty asm volatile statement. the compiler
* will not move instructions past asm volatiles.
*/
volatile static __inline int
splraise(int newcpl)
{
int oldcpl;
__asm__ volatile("":::"memory"); /* don't reorder.... */
oldcpl = cpl;
cpl = oldcpl | newcpl;
__asm__ volatile("":::"memory"); /* don't reorder.... */
return(oldcpl);
}
volatile static __inline void
splx(int newcpl)
{
__asm__ volatile("":::"memory"); /* reorder protect */
cpl = newcpl;
if(ipending & ~newcpl)
do_pending_int();
__asm__ volatile("":::"memory"); /* reorder protect */
}
volatile static __inline int
spllower(int newcpl)
{
int oldcpl;
__asm__ volatile("":::"memory"); /* reorder protect */
oldcpl = cpl;
cpl = newcpl;
if(ipending & ~newcpl)
do_pending_int();
__asm__ volatile("":::"memory"); /* reorder protect */
return(oldcpl);
}
/* Following code should be implemented with lwarx/stwcx to avoid
* the disable/enable. i need to read the manual once more.... */
static __inline void
set_sint(int pending)
{
int msrsave;
__asm__ ("mfmsr %0" : "=r"(msrsave));
__asm__ volatile ("mtmsr %0" :: "r"(msrsave & ~PSL_EE));
ipending |= pending;
__asm__ volatile ("mtmsr %0" :: "r"(msrsave));
}
#define SINT_CLOCK 0x10000000
#define SINT_NET 0x20000000
#define SINT_TTY 0x40000000
#define SPL_CLOCK 0x80000000
#define SINT_MASK (SINT_CLOCK|SINT_NET|SINT_TTY)
#define splbio() splraise(imask[IPL_BIO])
#define splnet() splraise(imask[IPL_NET])
#define spltty() splraise(imask[IPL_TTY])
#define splimp() splraise(imask[IPL_IMP])
#define splaudio() splraise(imask[IPL_AUDIO])
#define splclock() splraise(imask[IPL_CLOCK])
#define splvm() splraise(imask[IPL_IMP])
#define splstatclock() splhigh()
#define spllowersoftclock() spllower(SINT_CLOCK)
#define splsoftclock() splraise(SINT_CLOCK)
#define splsoftnet() splraise(SINT_NET)
#define splsofttty() splraise(SINT_TTY)
#define setsoftclock() set_sint(SINT_CLOCK);
#define setsoftnet() set_sint(SINT_NET);
#define setsofttty() set_sint(SINT_TTY);
#define splhigh() splraise(0xffffffff)
#define spl0() spllower(0)
/*
* Interrupt control struct used to control the ICU setup.
*/
struct intrhand {
struct intrhand *ih_next;
int (*ih_fun)(void *);
void *ih_arg;
u_long ih_count;
int ih_level;
int ih_irq;
char *ih_what;
};
extern int ppc_configed_intr_cnt;
#define MAX_PRECONF_INTR 16
extern struct intrhand ppc_configed_intr[MAX_PRECONF_INTR];
void softnet(int isr);
#endif /* _LOCORE */
#endif /* _POWERPC_INTR_H_ */
|
