1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
162
163
164
165
166
167
168
169
170
171
172
173
174
175
176
177
178
179
180
181
182
183
184
185
186
187
188
189
190
191
192
193
194
195
196
|
/* $OpenBSD: mvgicp.c,v 1.5 2021/10/24 17:52:26 mpi Exp $ */
/*
* Copyright (c) 2019 Patrick Wildt <patrick@blueri.se>
*
* Permission to use, copy, modify, and distribute this software for any
* purpose with or without fee is hereby granted, provided that the above
* copyright notice and this permission notice appear in all copies.
*
* THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
* WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
* MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
* ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
* WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
* ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
* OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
*/
#include <sys/param.h>
#include <sys/systm.h>
#include <sys/device.h>
#include <sys/malloc.h>
#include <uvm/uvm_extern.h>
#include <machine/intr.h>
#include <machine/bus.h>
#include <machine/fdt.h>
#include <dev/ofw/openfirm.h>
#include <dev/ofw/ofw_misc.h>
#include <dev/ofw/fdt.h>
struct mvgicp_softc {
struct device sc_dev;
bus_space_tag_t sc_iot;
bus_space_handle_t sc_ioh;
paddr_t sc_addr;
uint32_t sc_spi_ranges[4];
void **sc_spi;
uint32_t sc_nspi;
struct interrupt_controller sc_ic;
struct interrupt_controller *sc_parent_ic;
};
int mvgicp_match(struct device *, void *, void *);
void mvgicp_attach(struct device *, struct device *, void *);
void * mvgicp_intr_establish(void *, uint64_t *, uint64_t *,
int, struct cpu_info *, int (*)(void *), void *, char *);
void mvgicp_intr_disestablish(void *);
void mvgicp_intr_barrier(void *);
const struct cfattach mvgicp_ca = {
sizeof(struct mvgicp_softc), mvgicp_match, mvgicp_attach
};
struct cfdriver mvgicp_cd = {
NULL, "mvgicp", DV_DULL
};
int
mvgicp_match(struct device *parent, void *match, void *aux)
{
struct fdt_attach_args *faa = aux;
return OF_is_compatible(faa->fa_node, "marvell,ap806-gicp");
}
void
mvgicp_attach(struct device *parent, struct device *self, void *aux)
{
struct mvgicp_softc *sc = (struct mvgicp_softc *)self;
struct fdt_attach_args *faa = aux;
struct interrupt_controller *ic;
uint32_t phandle;
if (faa->fa_nreg < 1) {
printf(": no registers\n");
return;
}
OF_getpropintarray(faa->fa_node, "marvell,spi-ranges",
sc->sc_spi_ranges, sizeof(sc->sc_spi_ranges));
sc->sc_nspi = sc->sc_spi_ranges[1] + sc->sc_spi_ranges[3];
sc->sc_spi = mallocarray(sc->sc_nspi, sizeof(void *),
M_DEVBUF, M_WAITOK | M_ZERO);
sc->sc_iot = faa->fa_iot;
if (bus_space_map(sc->sc_iot, faa->fa_reg[0].addr,
faa->fa_reg[0].size, 0, &sc->sc_ioh)) {
printf(": can't map registers\n");
return;
}
/* XXX: Hack to retrieve the physical address (from a CPU PoV). */
if (!pmap_extract(pmap_kernel(), sc->sc_ioh, &sc->sc_addr)) {
printf(": cannot retrieve msi addr\n");
return;
}
extern uint32_t fdt_intr_get_parent(int);
phandle = fdt_intr_get_parent(faa->fa_node);
extern LIST_HEAD(, interrupt_controller) interrupt_controllers;
LIST_FOREACH(ic, &interrupt_controllers, ic_list) {
if (ic->ic_phandle == phandle)
break;
}
sc->sc_parent_ic = ic;
sc->sc_ic.ic_node = faa->fa_node;
sc->sc_ic.ic_cookie = sc;
sc->sc_ic.ic_establish_msi = mvgicp_intr_establish;
sc->sc_ic.ic_disestablish = mvgicp_intr_disestablish;
sc->sc_ic.ic_barrier = mvgicp_intr_barrier;
fdt_intr_register(&sc->sc_ic);
printf("\n");
}
void *
mvgicp_intr_establish(void *self, uint64_t *addr, uint64_t *data,
int level, struct cpu_info *ci, int (*func)(void *), void *arg, char *name)
{
struct mvgicp_softc *sc = (struct mvgicp_softc *)self;
struct interrupt_controller *ic = sc->sc_parent_ic;
struct machine_intr_handle *ih;
uint32_t interrupt[3];
uint32_t flags;
void *cookie;
int i, spi;
if (ic == NULL)
return NULL;
for (i = 0; i < sc->sc_nspi; i++) {
if (sc->sc_spi[i] == NULL) {
spi = i;
break;
}
}
if (i == sc->sc_nspi)
return NULL;
flags = *data;
*addr = sc->sc_addr;
*data = spi;
/* Convert to GIC interrupt source. */
for (i = 0; i < nitems(sc->sc_spi_ranges); i += 2) {
if (spi < sc->sc_spi_ranges[i + 1]) {
spi += sc->sc_spi_ranges[i];
break;
}
spi -= sc->sc_spi_ranges[i + 1];
}
if (i == nitems(sc->sc_spi_ranges))
return NULL;
interrupt[0] = 0;
interrupt[1] = spi - 32;
interrupt[2] = flags;
cookie = ic->ic_establish(ic->ic_cookie, interrupt, level,
ci, func, arg, name);
if (cookie == NULL)
return NULL;
ih = malloc(sizeof(*ih), M_DEVBUF, M_WAITOK);
ih->ih_ic = ic;
ih->ih_ih = cookie;
sc->sc_spi[*data] = ih;
return &sc->sc_spi[*data];
}
void
mvgicp_intr_disestablish(void *cookie)
{
struct machine_intr_handle *ih = *(void **)cookie;
struct interrupt_controller *ic = ih->ih_ic;
ic->ic_disestablish(ih->ih_ih);
free(ih, M_DEVBUF, sizeof(*ih));
*(void **)cookie = NULL;
}
void
mvgicp_intr_barrier(void *cookie)
{
struct machine_intr_handle *ih = *(void **)cookie;
struct interrupt_controller *ic = ih->ih_ic;
ic->ic_barrier(ih->ih_ih);
}
|
