1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
162
163
164
165
166
167
168
169
170
171
172
173
174
175
176
177
178
179
180
181
182
183
184
185
186
187
188
189
190
191
192
193
194
195
196
197
198
199
200
201
202
203
204
205
206
207
208
209
210
211
212
213
214
215
216
217
218
219
220
221
222
223
224
225
226
227
228
229
230
231
232
233
234
235
236
237
238
239
240
241
242
243
244
245
246
247
248
249
250
251
252
253
254
255
256
257
258
259
260
261
262
263
264
265
266
267
268
269
270
271
272
273
274
275
276
277
278
279
280
281
282
283
284
285
286
287
288
289
290
291
292
293
294
295
296
297
298
299
300
301
302
303
304
305
306
307
308
309
310
311
312
313
314
315
316
317
318
319
320
321
322
323
324
325
326
327
328
329
330
331
332
333
334
335
336
337
338
339
340
341
342
343
344
345
346
347
348
349
350
351
352
353
354
355
356
357
358
359
360
361
362
363
364
365
366
367
368
369
370
371
372
373
374
375
376
377
378
379
380
381
382
383
384
385
386
387
388
389
390
391
392
393
394
395
396
397
398
399
400
401
402
403
404
405
406
407
408
409
410
411
412
413
414
415
416
417
418
419
420
421
422
423
424
425
426
427
428
429
430
431
432
433
434
435
436
437
438
439
440
441
442
443
444
445
446
447
448
449
450
451
452
453
454
455
456
457
458
459
460
461
462
463
464
465
466
467
468
469
470
471
472
473
474
475
476
477
478
479
480
481
482
483
484
485
486
487
488
489
490
491
492
493
494
495
496
497
498
499
500
501
502
503
504
505
506
507
508
509
510
511
512
513
514
515
516
517
518
519
520
521
522
523
524
525
526
527
528
529
530
531
532
533
534
535
536
537
538
539
540
541
542
543
544
545
546
547
548
549
550
551
552
553
554
555
556
557
558
559
560
561
562
563
564
565
566
567
568
569
570
571
572
573
574
575
576
577
578
579
580
581
582
583
584
585
586
587
588
589
590
591
592
593
594
595
596
597
598
599
600
601
602
603
604
605
606
607
608
609
610
611
612
613
614
615
616
617
618
619
620
621
622
623
624
625
626
627
628
629
630
631
632
633
634
635
636
637
638
639
640
641
642
643
644
645
646
647
648
649
650
651
652
653
654
655
656
657
658
659
660
661
662
663
664
665
666
667
668
669
670
671
672
673
674
675
676
677
678
679
680
681
682
683
684
685
686
687
688
689
690
691
692
693
694
695
696
697
698
699
700
701
702
703
704
705
706
707
708
709
710
711
712
713
714
715
716
717
718
719
720
721
722
723
724
725
726
727
728
729
730
731
732
733
734
735
736
737
738
739
740
741
742
743
744
745
746
747
748
749
750
751
752
753
754
755
756
757
758
759
760
761
762
763
764
765
766
767
768
769
770
771
772
773
774
775
776
777
778
779
780
781
782
783
784
785
786
787
788
789
790
791
792
793
794
795
796
797
798
799
800
801
802
803
804
805
806
807
808
809
810
811
812
813
814
815
816
817
818
819
820
821
822
823
824
825
826
827
828
829
830
831
832
833
834
835
836
837
838
839
840
841
842
843
844
845
846
847
848
849
850
851
852
853
854
855
856
857
858
859
860
861
862
863
864
865
866
867
868
869
870
871
872
873
874
875
876
877
878
879
880
881
882
883
884
885
886
887
888
889
890
891
892
893
894
895
896
897
898
899
900
901
902
903
904
905
906
907
908
909
910
911
912
913
914
915
916
917
918
919
920
921
922
923
924
925
926
927
928
929
930
931
932
933
934
935
936
937
938
939
940
941
942
943
944
945
946
947
948
949
950
951
952
953
954
955
956
957
958
959
960
961
962
963
964
965
966
967
968
969
970
971
972
973
974
975
976
977
978
979
980
981
982
983
984
985
986
987
988
989
990
991
992
993
994
995
996
997
998
999
1000
1001
1002
1003
1004
1005
1006
1007
1008
1009
1010
1011
1012
1013
1014
1015
1016
1017
1018
1019
1020
1021
1022
1023
1024
1025
1026
1027
1028
1029
1030
1031
1032
1033
1034
1035
1036
1037
1038
1039
1040
1041
1042
1043
1044
1045
1046
1047
1048
1049
1050
1051
1052
1053
1054
1055
1056
1057
1058
1059
1060
1061
1062
1063
1064
1065
1066
1067
1068
1069
1070
1071
1072
1073
1074
1075
1076
1077
1078
1079
1080
1081
1082
1083
1084
1085
1086
1087
1088
1089
1090
1091
1092
1093
1094
1095
1096
1097
1098
1099
1100
1101
1102
1103
1104
1105
1106
1107
1108
1109
1110
1111
1112
1113
1114
1115
1116
1117
1118
1119
1120
1121
1122
1123
1124
1125
1126
1127
1128
1129
1130
1131
1132
1133
1134
1135
1136
1137
1138
1139
1140
1141
1142
1143
1144
1145
1146
1147
1148
1149
1150
1151
1152
1153
1154
1155
1156
1157
1158
1159
1160
1161
1162
1163
1164
1165
1166
1167
1168
1169
1170
1171
1172
1173
1174
1175
1176
1177
1178
1179
1180
1181
1182
1183
1184
1185
1186
1187
1188
1189
1190
1191
1192
1193
1194
1195
1196
1197
1198
1199
1200
1201
1202
1203
1204
1205
1206
1207
1208
1209
1210
1211
1212
1213
1214
1215
1216
1217
1218
1219
1220
1221
1222
1223
1224
1225
1226
1227
1228
1229
1230
1231
1232
1233
1234
1235
1236
1237
1238
1239
1240
1241
1242
1243
1244
1245
1246
1247
1248
1249
1250
1251
1252
1253
1254
1255
1256
1257
1258
1259
1260
1261
1262
1263
1264
1265
1266
1267
1268
1269
1270
1271
1272
1273
1274
1275
1276
1277
1278
1279
1280
1281
1282
1283
1284
1285
1286
1287
1288
1289
1290
1291
1292
1293
1294
1295
1296
1297
1298
1299
1300
1301
|
/* $OpenBSD: drm_linux.c,v 1.34 2019/04/23 11:38:55 jsg Exp $ */
/*
* Copyright (c) 2013 Jonathan Gray <jsg@openbsd.org>
* Copyright (c) 2015, 2016 Mark Kettenis <kettenis@openbsd.org>
*
* Permission to use, copy, modify, and distribute this software for any
* purpose with or without fee is hereby granted, provided that the above
* copyright notice and this permission notice appear in all copies.
*
* THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
* WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
* MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
* ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
* WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
* ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
* OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
*/
#include <drm/drmP.h>
#include <dev/pci/ppbreg.h>
#include <sys/event.h>
#include <sys/filedesc.h>
#include <sys/stat.h>
#include <sys/unistd.h>
#include <linux/dma-buf.h>
#include <linux/mod_devicetable.h>
#include <linux/acpi.h>
#include <linux/pagevec.h>
void
tasklet_run(void *arg)
{
struct tasklet_struct *ts = arg;
clear_bit(TASKLET_STATE_SCHED, &ts->state);
if (tasklet_trylock(ts)) {
if (!atomic_read(&ts->count))
ts->func(ts->data);
tasklet_unlock(ts);
}
}
struct mutex sch_mtx = MUTEX_INITIALIZER(IPL_SCHED);
volatile struct proc *sch_proc;
volatile void *sch_ident;
int sch_priority;
void
set_current_state(int state)
{
if (sch_ident != curproc)
mtx_enter(&sch_mtx);
MUTEX_ASSERT_LOCKED(&sch_mtx);
sch_ident = sch_proc = curproc;
sch_priority = state;
}
void
__set_current_state(int state)
{
KASSERT(state == TASK_RUNNING);
if (sch_ident == curproc) {
MUTEX_ASSERT_LOCKED(&sch_mtx);
sch_ident = NULL;
mtx_leave(&sch_mtx);
}
}
void
schedule(void)
{
schedule_timeout(MAX_SCHEDULE_TIMEOUT);
}
long
schedule_timeout(long timeout)
{
struct sleep_state sls;
long deadline;
int wait, spl;
MUTEX_ASSERT_LOCKED(&sch_mtx);
KASSERT(!cold);
sleep_setup(&sls, sch_ident, sch_priority, "schto");
if (timeout != MAX_SCHEDULE_TIMEOUT)
sleep_setup_timeout(&sls, timeout);
sleep_setup_signal(&sls, sch_priority);
wait = (sch_proc == curproc && timeout > 0);
spl = MUTEX_OLDIPL(&sch_mtx);
MUTEX_OLDIPL(&sch_mtx) = splsched();
mtx_leave(&sch_mtx);
if (timeout != MAX_SCHEDULE_TIMEOUT)
deadline = ticks + timeout;
sleep_finish_all(&sls, wait);
if (timeout != MAX_SCHEDULE_TIMEOUT)
timeout = deadline - ticks;
mtx_enter(&sch_mtx);
MUTEX_OLDIPL(&sch_mtx) = spl;
sch_ident = curproc;
return timeout > 0 ? timeout : 0;
}
int
wake_up_process(struct proc *p)
{
int s, r = 0;
SCHED_LOCK(s);
atomic_cas_ptr(&sch_proc, p, NULL);
if (p->p_wchan) {
if (p->p_stat == SSLEEP) {
setrunnable(p);
r = 1;
} else
unsleep(p);
}
SCHED_UNLOCK(s);
return r;
}
void
flush_workqueue(struct workqueue_struct *wq)
{
if (cold)
return;
taskq_barrier((struct taskq *)wq);
}
bool
flush_work(struct work_struct *work)
{
if (cold)
return false;
taskq_barrier(work->tq);
return false;
}
bool
flush_delayed_work(struct delayed_work *dwork)
{
bool ret = false;
if (cold)
return false;
while (timeout_pending(&dwork->to)) {
tsleep(dwork, PWAIT, "fldwto", 1);
ret = true;
}
taskq_barrier(dwork->tq ? dwork->tq : (struct taskq *)system_wq);
return ret;
}
struct timespec
ns_to_timespec(const int64_t nsec)
{
struct timespec ts;
int32_t rem;
if (nsec == 0) {
ts.tv_sec = 0;
ts.tv_nsec = 0;
return (ts);
}
ts.tv_sec = nsec / NSEC_PER_SEC;
rem = nsec % NSEC_PER_SEC;
if (rem < 0) {
ts.tv_sec--;
rem += NSEC_PER_SEC;
}
ts.tv_nsec = rem;
return (ts);
}
int64_t
timeval_to_ns(const struct timeval *tv)
{
return ((int64_t)tv->tv_sec * NSEC_PER_SEC) +
tv->tv_usec * NSEC_PER_USEC;
}
struct timeval
ns_to_timeval(const int64_t nsec)
{
struct timeval tv;
int32_t rem;
if (nsec == 0) {
tv.tv_sec = 0;
tv.tv_usec = 0;
return (tv);
}
tv.tv_sec = nsec / NSEC_PER_SEC;
rem = nsec % NSEC_PER_SEC;
if (rem < 0) {
tv.tv_sec--;
rem += NSEC_PER_SEC;
}
tv.tv_usec = rem / 1000;
return (tv);
}
int64_t
timeval_to_ms(const struct timeval *tv)
{
return ((int64_t)tv->tv_sec * 1000) + (tv->tv_usec / 1000);
}
int64_t
timeval_to_us(const struct timeval *tv)
{
return ((int64_t)tv->tv_sec * 1000000) + tv->tv_usec;
}
extern char *hw_vendor, *hw_prod, *hw_ver;
bool
dmi_match(int slot, const char *str)
{
switch (slot) {
case DMI_SYS_VENDOR:
case DMI_BOARD_VENDOR:
if (hw_vendor != NULL &&
!strcmp(hw_vendor, str))
return true;
break;
case DMI_PRODUCT_NAME:
case DMI_BOARD_NAME:
if (hw_prod != NULL &&
!strcmp(hw_prod, str))
return true;
break;
case DMI_PRODUCT_VERSION:
case DMI_BOARD_VERSION:
if (hw_ver != NULL &&
!strcmp(hw_ver, str))
return true;
break;
case DMI_NONE:
default:
return false;
}
return false;
}
static bool
dmi_found(const struct dmi_system_id *dsi)
{
int i, slot;
for (i = 0; i < nitems(dsi->matches); i++) {
slot = dsi->matches[i].slot;
if (slot == DMI_NONE)
break;
if (!dmi_match(slot, dsi->matches[i].substr))
return false;
}
return true;
}
int
dmi_check_system(const struct dmi_system_id *sysid)
{
const struct dmi_system_id *dsi;
int num = 0;
for (dsi = sysid; dsi->matches[0].slot != 0 ; dsi++) {
if (dmi_found(dsi)) {
num++;
if (dsi->callback && dsi->callback(dsi))
break;
}
}
return (num);
}
struct vm_page *
alloc_pages(unsigned int gfp_mask, unsigned int order)
{
int flags = (gfp_mask & M_NOWAIT) ? UVM_PLA_NOWAIT : UVM_PLA_WAITOK;
struct pglist mlist;
if (gfp_mask & M_CANFAIL)
flags |= UVM_PLA_FAILOK;
if (gfp_mask & M_ZERO)
flags |= UVM_PLA_ZERO;
TAILQ_INIT(&mlist);
if (uvm_pglistalloc(PAGE_SIZE << order, dma_constraint.ucr_low,
dma_constraint.ucr_high, PAGE_SIZE, 0, &mlist, 1, flags))
return NULL;
return TAILQ_FIRST(&mlist);
}
void
__free_pages(struct vm_page *page, unsigned int order)
{
struct pglist mlist;
int i;
TAILQ_INIT(&mlist);
for (i = 0; i < (1 << order); i++)
TAILQ_INSERT_TAIL(&mlist, &page[i], pageq);
uvm_pglistfree(&mlist);
}
void
__pagevec_release(struct pagevec *pvec)
{
struct pglist mlist;
int i;
TAILQ_INIT(&mlist);
for (i = 0; i < pvec->nr; i++)
TAILQ_INSERT_TAIL(&mlist, pvec->pages[i], pageq);
uvm_pglistfree(&mlist);
pagevec_reinit(pvec);
}
void *
kmap(struct vm_page *pg)
{
vaddr_t va;
#if defined (__HAVE_PMAP_DIRECT)
va = pmap_map_direct(pg);
#else
va = uvm_km_valloc_wait(phys_map, PAGE_SIZE);
pmap_kenter_pa(va, VM_PAGE_TO_PHYS(pg), PROT_READ | PROT_WRITE);
pmap_update(pmap_kernel());
#endif
return (void *)va;
}
void
kunmap(void *addr)
{
vaddr_t va = (vaddr_t)addr;
#if defined (__HAVE_PMAP_DIRECT)
pmap_unmap_direct(va);
#else
pmap_kremove(va, PAGE_SIZE);
pmap_update(pmap_kernel());
uvm_km_free_wakeup(phys_map, va, PAGE_SIZE);
#endif
}
void *
vmap(struct vm_page **pages, unsigned int npages, unsigned long flags,
pgprot_t prot)
{
vaddr_t va;
paddr_t pa;
int i;
va = uvm_km_valloc(kernel_map, PAGE_SIZE * npages);
if (va == 0)
return NULL;
for (i = 0; i < npages; i++) {
pa = VM_PAGE_TO_PHYS(pages[i]) | prot;
pmap_enter(pmap_kernel(), va + (i * PAGE_SIZE), pa,
PROT_READ | PROT_WRITE,
PROT_READ | PROT_WRITE | PMAP_WIRED);
pmap_update(pmap_kernel());
}
return (void *)va;
}
void
vunmap(void *addr, size_t size)
{
vaddr_t va = (vaddr_t)addr;
pmap_remove(pmap_kernel(), va, va + size);
pmap_update(pmap_kernel());
uvm_km_free(kernel_map, va, size);
}
void
print_hex_dump(const char *level, const char *prefix_str, int prefix_type,
int rowsize, int groupsize, const void *buf, size_t len, bool ascii)
{
const uint8_t *cbuf = buf;
int i;
for (i = 0; i < len; i++) {
if ((i % rowsize) == 0)
printf("%s", prefix_str);
printf("%02x", cbuf[i]);
if ((i % rowsize) == (rowsize - 1))
printf("\n");
else
printf(" ");
}
}
void *
memchr_inv(const void *s, int c, size_t n)
{
if (n != 0) {
const unsigned char *p = s;
do {
if (*p++ != (unsigned char)c)
return ((void *)(p - 1));
}while (--n != 0);
}
return (NULL);
}
int
panic_cmp(struct rb_node *a, struct rb_node *b)
{
panic(__func__);
}
#undef RB_ROOT
#define RB_ROOT(head) (head)->rbh_root
RB_GENERATE(linux_root, rb_node, __entry, panic_cmp);
/*
* This is a fairly minimal implementation of the Linux "idr" API. It
* probably isn't very efficient, and defenitely isn't RCU safe. The
* pre-load buffer is global instead of per-cpu; we rely on the kernel
* lock to make this work. We do randomize our IDs in order to make
* them harder to guess.
*/
int idr_cmp(struct idr_entry *, struct idr_entry *);
SPLAY_PROTOTYPE(idr_tree, idr_entry, entry, idr_cmp);
struct pool idr_pool;
struct idr_entry *idr_entry_cache;
void
idr_init(struct idr *idr)
{
static int initialized;
if (!initialized) {
pool_init(&idr_pool, sizeof(struct idr_entry), 0, IPL_TTY, 0,
"idrpl", NULL);
initialized = 1;
}
SPLAY_INIT(&idr->tree);
}
void
idr_destroy(struct idr *idr)
{
struct idr_entry *id;
while ((id = SPLAY_MIN(idr_tree, &idr->tree))) {
SPLAY_REMOVE(idr_tree, &idr->tree, id);
pool_put(&idr_pool, id);
}
}
void
idr_preload(unsigned int gfp_mask)
{
int flags = (gfp_mask & GFP_NOWAIT) ? PR_NOWAIT : PR_WAITOK;
KERNEL_ASSERT_LOCKED();
if (idr_entry_cache == NULL)
idr_entry_cache = pool_get(&idr_pool, flags);
}
int
idr_alloc(struct idr *idr, void *ptr, int start, int end,
unsigned int gfp_mask)
{
int flags = (gfp_mask & GFP_NOWAIT) ? PR_NOWAIT : PR_WAITOK;
struct idr_entry *id;
int begin;
KERNEL_ASSERT_LOCKED();
if (idr_entry_cache) {
id = idr_entry_cache;
idr_entry_cache = NULL;
} else {
id = pool_get(&idr_pool, flags);
if (id == NULL)
return -ENOMEM;
}
if (end <= 0)
end = INT_MAX;
#ifdef notyet
id->id = begin = start + arc4random_uniform(end - start);
#else
id->id = begin = start;
#endif
while (SPLAY_INSERT(idr_tree, &idr->tree, id)) {
if (++id->id == end)
id->id = start;
if (id->id == begin) {
pool_put(&idr_pool, id);
return -ENOSPC;
}
}
id->ptr = ptr;
return id->id;
}
void *
idr_replace(struct idr *idr, void *ptr, int id)
{
struct idr_entry find, *res;
void *old;
find.id = id;
res = SPLAY_FIND(idr_tree, &idr->tree, &find);
if (res == NULL)
return ERR_PTR(-ENOENT);
old = res->ptr;
res->ptr = ptr;
return old;
}
void *
idr_remove(struct idr *idr, int id)
{
struct idr_entry find, *res;
void *ptr = NULL;
find.id = id;
res = SPLAY_FIND(idr_tree, &idr->tree, &find);
if (res) {
SPLAY_REMOVE(idr_tree, &idr->tree, res);
ptr = res->ptr;
pool_put(&idr_pool, res);
}
return ptr;
}
void *
idr_find(struct idr *idr, int id)
{
struct idr_entry find, *res;
find.id = id;
res = SPLAY_FIND(idr_tree, &idr->tree, &find);
if (res == NULL)
return NULL;
return res->ptr;
}
void *
idr_get_next(struct idr *idr, int *id)
{
struct idr_entry *res;
res = idr_find(idr, *id);
if (res == NULL)
res = SPLAY_MIN(idr_tree, &idr->tree);
else
res = SPLAY_NEXT(idr_tree, &idr->tree, res);
if (res == NULL)
return NULL;
*id = res->id;
return res->ptr;
}
int
idr_for_each(struct idr *idr, int (*func)(int, void *, void *), void *data)
{
struct idr_entry *id;
int ret;
SPLAY_FOREACH(id, idr_tree, &idr->tree) {
ret = func(id->id, id->ptr, data);
if (ret)
return ret;
}
return 0;
}
int
idr_cmp(struct idr_entry *a, struct idr_entry *b)
{
return (a->id < b->id ? -1 : a->id > b->id);
}
SPLAY_GENERATE(idr_tree, idr_entry, entry, idr_cmp);
void
ida_init(struct ida *ida)
{
ida->counter = 0;
}
void
ida_destroy(struct ida *ida)
{
}
void
ida_remove(struct ida *ida, int id)
{
}
int
ida_simple_get(struct ida *ida, unsigned int start, unsigned int end,
int flags)
{
if (end <= 0)
end = INT_MAX;
if (start > ida->counter)
ida->counter = start;
if (ida->counter >= end)
return -ENOSPC;
return ida->counter++;
}
void
ida_simple_remove(struct ida *ida, int id)
{
}
int
sg_alloc_table(struct sg_table *table, unsigned int nents, gfp_t gfp_mask)
{
table->sgl = mallocarray(nents, sizeof(struct scatterlist),
M_DRM, gfp_mask);
if (table->sgl == NULL)
return -ENOMEM;
table->nents = table->orig_nents = nents;
return 0;
}
void
sg_free_table(struct sg_table *table)
{
free(table->sgl, M_DRM,
table->orig_nents * sizeof(struct scatterlist));
}
size_t
sg_copy_from_buffer(struct scatterlist *sgl, unsigned int nents,
const void *buf, size_t buflen)
{
panic("%s", __func__);
}
int
i2c_master_xfer(struct i2c_adapter *adap, struct i2c_msg *msgs, int num)
{
void *cmd = NULL;
int cmdlen = 0;
int err, ret = 0;
int op;
iic_acquire_bus(&adap->ic, 0);
while (num > 2) {
op = (msgs->flags & I2C_M_RD) ? I2C_OP_READ : I2C_OP_WRITE;
err = iic_exec(&adap->ic, op, msgs->addr, NULL, 0,
msgs->buf, msgs->len, 0);
if (err) {
ret = -err;
goto fail;
}
msgs++;
num--;
ret++;
}
if (num > 1) {
cmd = msgs->buf;
cmdlen = msgs->len;
msgs++;
num--;
ret++;
}
op = (msgs->flags & I2C_M_RD) ?
I2C_OP_READ_WITH_STOP : I2C_OP_WRITE_WITH_STOP;
err = iic_exec(&adap->ic, op, msgs->addr, cmd, cmdlen,
msgs->buf, msgs->len, 0);
if (err) {
ret = -err;
goto fail;
}
msgs++;
ret++;
fail:
iic_release_bus(&adap->ic, 0);
return ret;
}
int
i2c_transfer(struct i2c_adapter *adap, struct i2c_msg *msgs, int num)
{
if (adap->algo)
return adap->algo->master_xfer(adap, msgs, num);
return i2c_master_xfer(adap, msgs, num);
}
int
i2c_bb_master_xfer(struct i2c_adapter *adap, struct i2c_msg *msgs, int num)
{
struct i2c_algo_bit_data *algo = adap->algo_data;
struct i2c_adapter bb;
memset(&bb, 0, sizeof(bb));
bb.ic = algo->ic;
bb.retries = adap->retries;
return i2c_master_xfer(&bb, msgs, num);
}
uint32_t
i2c_bb_functionality(struct i2c_adapter *adap)
{
return I2C_FUNC_I2C | I2C_FUNC_SMBUS_EMUL;
}
struct i2c_algorithm i2c_bit_algo = {
.master_xfer = i2c_bb_master_xfer,
.functionality = i2c_bb_functionality
};
int
i2c_bit_add_bus(struct i2c_adapter *adap)
{
adap->algo = &i2c_bit_algo;
adap->retries = 3;
return 0;
}
#if defined(__amd64__) || defined(__i386__)
/*
* This is a minimal implementation of the Linux vga_get/vga_put
* interface. In all likelyhood, it will only work for inteldrm(4) as
* it assumes that if there is another active VGA device in the
* system, it is sitting behind a PCI bridge.
*/
extern int pci_enumerate_bus(struct pci_softc *,
int (*)(struct pci_attach_args *), struct pci_attach_args *);
pcitag_t vga_bridge_tag;
int vga_bridge_disabled;
int
vga_disable_bridge(struct pci_attach_args *pa)
{
pcireg_t bhlc, bc;
if (pa->pa_domain != 0)
return 0;
bhlc = pci_conf_read(pa->pa_pc, pa->pa_tag, PCI_BHLC_REG);
if (PCI_HDRTYPE_TYPE(bhlc) != 1)
return 0;
bc = pci_conf_read(pa->pa_pc, pa->pa_tag, PPB_REG_BRIDGECONTROL);
if ((bc & PPB_BC_VGA_ENABLE) == 0)
return 0;
bc &= ~PPB_BC_VGA_ENABLE;
pci_conf_write(pa->pa_pc, pa->pa_tag, PPB_REG_BRIDGECONTROL, bc);
vga_bridge_tag = pa->pa_tag;
vga_bridge_disabled = 1;
return 1;
}
void
vga_get_uninterruptible(struct pci_dev *pdev, int rsrc)
{
KASSERT(pdev->pci->sc_bridgetag == NULL);
pci_enumerate_bus(pdev->pci, vga_disable_bridge, NULL);
}
void
vga_put(struct pci_dev *pdev, int rsrc)
{
pcireg_t bc;
if (!vga_bridge_disabled)
return;
bc = pci_conf_read(pdev->pc, vga_bridge_tag, PPB_REG_BRIDGECONTROL);
bc |= PPB_BC_VGA_ENABLE;
pci_conf_write(pdev->pc, vga_bridge_tag, PPB_REG_BRIDGECONTROL, bc);
vga_bridge_disabled = 0;
}
#endif
/*
* ACPI types and interfaces.
*/
#ifdef __HAVE_ACPI
#include "acpi.h"
#endif
#if NACPI > 0
#include <dev/acpi/acpireg.h>
#include <dev/acpi/acpivar.h>
acpi_status
acpi_get_table(const char *sig, int instance,
struct acpi_table_header **hdr)
{
struct acpi_softc *sc = acpi_softc;
struct acpi_q *entry;
KASSERT(instance == 1);
if (sc == NULL)
return AE_NOT_FOUND;
SIMPLEQ_FOREACH(entry, &sc->sc_tables, q_next) {
if (memcmp(entry->q_table, sig, strlen(sig)) == 0) {
*hdr = entry->q_table;
return 0;
}
}
return AE_NOT_FOUND;
}
#endif
void
backlight_do_update_status(void *arg)
{
backlight_update_status(arg);
}
struct backlight_device *
backlight_device_register(const char *name, void *kdev, void *data,
const struct backlight_ops *ops, struct backlight_properties *props)
{
struct backlight_device *bd;
bd = malloc(sizeof(*bd), M_DRM, M_WAITOK);
bd->ops = ops;
bd->props = *props;
bd->data = data;
task_set(&bd->task, backlight_do_update_status, bd);
return bd;
}
void
backlight_device_unregister(struct backlight_device *bd)
{
free(bd, M_DRM, sizeof(*bd));
}
void
backlight_schedule_update_status(struct backlight_device *bd)
{
task_add(systq, &bd->task);
}
void
drm_sysfs_hotplug_event(struct drm_device *dev)
{
KNOTE(&dev->note, NOTE_CHANGE);
}
unsigned int drm_fence_count;
unsigned int
dma_fence_context_alloc(unsigned int num)
{
return __sync_add_and_fetch(&drm_fence_count, num) - num;
}
int
dmabuf_read(struct file *fp, struct uio *uio, int fflags)
{
return (ENXIO);
}
int
dmabuf_write(struct file *fp, struct uio *uio, int fflags)
{
return (ENXIO);
}
int
dmabuf_ioctl(struct file *fp, u_long com, caddr_t data, struct proc *p)
{
return (ENOTTY);
}
int
dmabuf_poll(struct file *fp, int events, struct proc *p)
{
return (0);
}
int
dmabuf_kqfilter(struct file *fp, struct knote *kn)
{
return (EINVAL);
}
int
dmabuf_stat(struct file *fp, struct stat *st, struct proc *p)
{
struct dma_buf *dmabuf = fp->f_data;
memset(st, 0, sizeof(*st));
st->st_size = dmabuf->size;
st->st_mode = S_IFIFO; /* XXX */
return (0);
}
int
dmabuf_close(struct file *fp, struct proc *p)
{
struct dma_buf *dmabuf = fp->f_data;
fp->f_data = NULL;
KERNEL_LOCK();
dmabuf->ops->release(dmabuf);
KERNEL_UNLOCK();
free(dmabuf, M_DRM, sizeof(struct dma_buf));
return (0);
}
int
dmabuf_seek(struct file *fp, off_t *offset, int whence, struct proc *p)
{
struct dma_buf *dmabuf = fp->f_data;
off_t newoff;
if (*offset != 0)
return (EINVAL);
switch (whence) {
case SEEK_SET:
newoff = 0;
break;
case SEEK_END:
newoff = dmabuf->size;
break;
default:
return (EINVAL);
}
fp->f_offset = *offset = newoff;
return (0);
}
struct fileops dmabufops = {
.fo_read = dmabuf_read,
.fo_write = dmabuf_write,
.fo_ioctl = dmabuf_ioctl,
.fo_poll = dmabuf_poll,
.fo_kqfilter = dmabuf_kqfilter,
.fo_stat = dmabuf_stat,
.fo_close = dmabuf_close,
.fo_seek = dmabuf_seek,
};
struct dma_buf *
dma_buf_export(const struct dma_buf_export_info *info)
{
struct proc *p = curproc;
struct dma_buf *dmabuf;
struct file *fp;
fp = fnew(p);
if (fp == NULL)
return ERR_PTR(-ENFILE);
fp->f_type = DTYPE_DMABUF;
fp->f_ops = &dmabufops;
dmabuf = malloc(sizeof(struct dma_buf), M_DRM, M_WAITOK | M_ZERO);
dmabuf->priv = info->priv;
dmabuf->ops = info->ops;
dmabuf->size = info->size;
dmabuf->file = fp;
fp->f_data = dmabuf;
return dmabuf;
}
struct dma_buf *
dma_buf_get(int fd)
{
struct proc *p = curproc;
struct filedesc *fdp = p->p_fd;
struct file *fp;
if ((fp = fd_getfile(fdp, fd)) == NULL)
return ERR_PTR(-EBADF);
if (fp->f_type != DTYPE_DMABUF) {
FRELE(fp, p);
return ERR_PTR(-EINVAL);
}
return fp->f_data;
}
void
dma_buf_put(struct dma_buf *dmabuf)
{
KASSERT(dmabuf);
KASSERT(dmabuf->file);
FRELE(dmabuf->file, curproc);
}
int
dma_buf_fd(struct dma_buf *dmabuf, int flags)
{
struct proc *p = curproc;
struct filedesc *fdp = p->p_fd;
struct file *fp = dmabuf->file;
int fd, cloexec, error;
cloexec = (flags & O_CLOEXEC) ? UF_EXCLOSE : 0;
fdplock(fdp);
restart:
if ((error = fdalloc(p, 0, &fd)) != 0) {
if (error == ENOSPC) {
fdexpand(p);
goto restart;
}
fdpunlock(fdp);
return -error;
}
fdinsert(fdp, fd, cloexec, fp);
fdpunlock(fdp);
return fd;
}
void
get_dma_buf(struct dma_buf *dmabuf)
{
FREF(dmabuf->file);
}
enum pci_bus_speed
pcie_get_speed_cap(struct pci_dev *pdev)
{
pci_chipset_tag_t pc = pdev->pc;
pcitag_t tag = pdev->tag;
int pos ;
pcireg_t xcap, lnkcap = 0, lnkcap2 = 0;
pcireg_t id;
enum pci_bus_speed cap = PCI_SPEED_UNKNOWN;
int bus, device, function;
if (!pci_get_capability(pc, tag, PCI_CAP_PCIEXPRESS,
&pos, NULL))
return PCI_SPEED_UNKNOWN;
id = pci_conf_read(pc, tag, PCI_ID_REG);
pci_decompose_tag(pc, tag, &bus, &device, &function);
/* we've been informed via and serverworks don't make the cut */
if (PCI_VENDOR(id) == PCI_VENDOR_VIATECH ||
PCI_VENDOR(id) == PCI_VENDOR_RCC)
return PCI_SPEED_UNKNOWN;
lnkcap = pci_conf_read(pc, tag, pos + PCI_PCIE_LCAP);
xcap = pci_conf_read(pc, tag, pos + PCI_PCIE_XCAP);
if (PCI_PCIE_XCAP_VER(xcap) >= 2)
lnkcap2 = pci_conf_read(pc, tag, pos + PCI_PCIE_LCAP2);
lnkcap &= 0x0f;
lnkcap2 &= 0xfe;
if (lnkcap2) { /* PCIE GEN 3.0 */
if (lnkcap2 & 0x02)
cap = PCIE_SPEED_2_5GT;
if (lnkcap2 & 0x04)
cap = PCIE_SPEED_5_0GT;
if (lnkcap2 & 0x08)
cap = PCIE_SPEED_8_0GT;
if (lnkcap2 & 0x10)
cap = PCIE_SPEED_16_0GT;
} else {
if (lnkcap & 0x01)
cap = PCIE_SPEED_2_5GT;
if (lnkcap & 0x02)
cap = PCIE_SPEED_5_0GT;
}
DRM_INFO("probing pcie caps for device %d:%d:%d 0x%04x:0x%04x = %x/%x\n",
bus, device, function, PCI_VENDOR(id), PCI_PRODUCT(id), lnkcap,
lnkcap2);
return cap;
}
enum pcie_link_width
pcie_get_width_cap(struct pci_dev *pdev)
{
pci_chipset_tag_t pc = pdev->pc;
pcitag_t tag = pdev->tag;
int pos ;
pcireg_t lnkcap = 0;
pcireg_t id;
int bus, device, function;
if (!pci_get_capability(pc, tag, PCI_CAP_PCIEXPRESS,
&pos, NULL))
return PCIE_LNK_WIDTH_UNKNOWN;
id = pci_conf_read(pc, tag, PCI_ID_REG);
pci_decompose_tag(pc, tag, &bus, &device, &function);
lnkcap = pci_conf_read(pc, tag, pos + PCI_PCIE_LCAP);
DRM_INFO("probing pcie width for device %d:%d:%d 0x%04x:0x%04x = %x\n",
bus, device, function, PCI_VENDOR(id), PCI_PRODUCT(id), lnkcap);
if (lnkcap)
return (lnkcap & 0x3f0) >> 4;
return PCIE_LNK_WIDTH_UNKNOWN;
}
int
default_wake_function(struct wait_queue_entry *wqe, unsigned int mode,
int sync, void *key)
{
wakeup(wqe);
if (wqe->proc)
wake_up_process(wqe->proc);
return 0;
}
int
autoremove_wake_function(struct wait_queue_entry *wqe, unsigned int mode,
int sync, void *key)
{
default_wake_function(wqe, mode, sync, key);
list_del_init(&wqe->entry);
return 0;
}
struct mutex wait_bit_mtx = MUTEX_INITIALIZER(IPL_TTY);
int
wait_on_bit(unsigned long *word, int bit, unsigned mode)
{
int err;
if (!test_bit(bit, word))
return 0;
mtx_enter(&wait_bit_mtx);
while (test_bit(bit, word)) {
err = msleep(word, &wait_bit_mtx, PWAIT | mode, "wtb", 0);
if (err) {
mtx_leave(&wait_bit_mtx);
return 1;
}
}
mtx_leave(&wait_bit_mtx);
return 0;
}
int
wait_on_bit_timeout(unsigned long *word, int bit, unsigned mode, int timo)
{
int err;
if (!test_bit(bit, word))
return 0;
mtx_enter(&wait_bit_mtx);
while (test_bit(bit, word)) {
err = msleep(word, &wait_bit_mtx, PWAIT | mode, "wtb", timo);
if (err) {
mtx_leave(&wait_bit_mtx);
return 1;
}
}
mtx_leave(&wait_bit_mtx);
return 0;
}
void
wake_up_bit(void *word, int bit)
{
mtx_enter(&wait_bit_mtx);
wakeup(word);
mtx_leave(&wait_bit_mtx);
}
struct workqueue_struct *system_wq;
struct workqueue_struct *system_unbound_wq;
struct workqueue_struct *system_long_wq;
struct taskq *taskletq;
void
drm_linux_init(void)
{
if (system_wq == NULL) {
system_wq = (struct workqueue_struct *)
taskq_create("drmwq", 1, IPL_HIGH, 0);
}
if (system_unbound_wq == NULL) {
system_unbound_wq = (struct workqueue_struct *)
taskq_create("drmubwq", 1, IPL_HIGH, 0);
}
if (system_long_wq == NULL) {
system_long_wq = (struct workqueue_struct *)
taskq_create("drmlwq", 1, IPL_HIGH, 0);
}
if (taskletq == NULL)
taskletq = taskq_create("drmtskl", 1, IPL_HIGH, 0);
}
#define PCIE_ECAP_RESIZE_BAR 0x15
#define RBCAP0 0x04
#define RBCTRL0 0x08
#define RBCTRL_BARINDEX_MASK 0x07
#define RBCTRL_BARSIZE_MASK 0x1f00
#define RBCTRL_BARSIZE_SHIFT 8
/* size in MB is 1 << nsize */
int
pci_resize_resource(struct pci_dev *pdev, int bar, int nsize)
{
pcireg_t reg;
uint32_t offset, capid;
KASSERT(bar == 0);
offset = PCI_PCIE_ECAP;
/* search PCI Express Extended Capabilities */
do {
reg = pci_conf_read(pdev->pc, pdev->tag, offset);
capid = PCI_PCIE_ECAP_ID(reg);
if (capid == PCIE_ECAP_RESIZE_BAR)
break;
offset = PCI_PCIE_ECAP_NEXT(reg);
} while (capid != 0);
if (capid == 0) {
printf("%s: could not find resize bar cap!\n", __func__);
return -ENOTSUP;
}
reg = pci_conf_read(pdev->pc, pdev->tag, offset + RBCAP0);
if ((reg & (1 << (nsize + 4))) == 0) {
printf("%s size not supported\n", __func__);
return -ENOTSUP;
}
reg = pci_conf_read(pdev->pc, pdev->tag, offset + RBCTRL0);
if ((reg & RBCTRL_BARINDEX_MASK) != 0) {
printf("%s BAR index not 0\n", __func__);
return -EINVAL;
}
reg &= ~RBCTRL_BARSIZE_MASK;
reg |= (nsize << RBCTRL_BARSIZE_SHIFT) & RBCTRL_BARSIZE_MASK;
pci_conf_write(pdev->pc, pdev->tag, offset + RBCTRL0, reg);
return 0;
}
|