1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
162
163
164
165
166
167
168
169
170
171
172
173
174
175
176
177
178
179
180
181
182
183
184
185
186
187
188
189
190
191
192
193
194
195
196
197
198
199
200
201
202
203
204
205
206
207
208
209
210
211
212
213
214
215
216
217
218
|
/* $OpenBSD: safevar.h,v 1.5 2003/08/20 16:28:35 jason Exp $ */
/*-
* Copyright (c) 2003 Sam Leffler, Errno Consulting
* Copyright (c) 2003 Global Technology Associates, Inc.
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
*
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
* SUCH DAMAGE.
*
* $FreeBSD: /repoman/r/ncvs/src/sys/dev/safe/safevar.h,v 1.1 2003/07/21 21:46:07 sam Exp $
*/
#ifndef _SAFE_SAFEVAR_H_
#define _SAFE_SAFEVAR_H_
/* public key parameter locations */
#define SAFE_CRK_PARAM_BASE 0
#define SAFE_CRK_PARAM_EXP 1
#define SAFE_CRK_PARAM_MOD 2
/* Maximum queue length */
#ifndef SAFE_MAX_NQUEUE
#define SAFE_MAX_NQUEUE 60
#endif
#define SAFE_MAX_PART 64 /* Maximum scatter/gather depth */
#define SAFE_DMA_BOUNDARY 0 /* No boundary for source DMA ops */
#define SAFE_MAX_DSIZE MCLBYTES /* Fixed scatter particle size */
#define SAFE_MAX_SSIZE 0x0ffff /* Maximum gather particle size */
#define SAFE_MAX_DMA 0xfffff /* Maximum PE operand size (20 bits) */
/* total src+dst particle descriptors */
#define SAFE_TOTAL_DPART (SAFE_MAX_NQUEUE * SAFE_MAX_PART)
#define SAFE_TOTAL_SPART (SAFE_MAX_NQUEUE * SAFE_MAX_PART)
#define SAFE_RNG_MAXBUFSIZ 128 /* 32-bit words */
#define SAFE_CARD(sid) (((sid) & 0xf0000000) >> 28)
#define SAFE_SESSION(sid) ( (sid) & 0x0fffffff)
#define SAFE_SID(crd, sesn) (((crd) << 28) | ((sesn) & 0x0fffffff))
#ifdef _KERNEL
/*
* State associated with the allocation of each chunk
* of memory setup for DMA.
*/
struct safe_dma_alloc {
u_int32_t dma_paddr; /* physical address */
caddr_t dma_vaddr; /* virtual address */
bus_dmamap_t dma_map; /* associated map */
bus_dma_segment_t dma_seg;
bus_size_t dma_size; /* mapped memory size (bytes) */
int dma_nseg; /* number of segments */
};
/*
* Cryptographic operand state. One of these exists for each
* source and destination operand passed in from the crypto
* subsystem. When possible source and destination operands
* refer to the same memory. More often they are distinct.
* We track the virtual address of each operand as well as
* where each is mapped for DMA.
*/
struct safe_operand {
union {
struct mbuf *m;
struct uio *io;
} u;
bus_dmamap_t map;
};
/*
* Packet engine ring entry and cryptographic operation state.
* The packet engine requires a ring of descriptors that contain
* pointers to various cryptographic state. However the ring
* configuration register allows you to specify an arbitrary size
* for ring entries. We use this feature to collect most of the
* state for each cryptographic request into one spot. Other than
* ring entries only the ``particle descriptors'' (scatter/gather
* lists) and the actual operand data are kept separate. The
* particle descriptors must also be organized in rings. The
* operand data can be located aribtrarily (modulo alignment constraints).
*
* Note that the descriptor ring is mapped onto the PCI bus so
* the hardware can DMA data. This means the entire ring must be
* contiguous.
*/
struct safe_ringentry {
struct safe_desc re_desc; /* command descriptor */
struct safe_sarec re_sa; /* SA record */
struct safe_sastate re_sastate; /* SA state record */
struct cryptop *re_crp; /* crypto operation */
struct safe_operand re_src; /* source operand */
struct safe_operand re_dst; /* destination operand */
int re_sesn; /* crypto session ID */
int re_flags;
#define SAFE_QFLAGS_COPYOUTIV 0x1 /* copy back on completion */
#define SAFE_QFLAGS_COPYOUTICV 0x2 /* copy back on completion */
};
#define re_src_m re_src.u.m
#define re_src_io re_src.u.io
#define re_src_map re_src.map
#define re_src_nsegs re_src.map->dm_nsegs
#define re_src_segs re_src.map->dm_segs
#define re_src_mapsize re_src.map->dm_mapsize
#define re_dst_m re_dst.u.m
#define re_dst_io re_dst.u.io
#define re_dst_map re_dst.map
#define re_dst_nsegs re_dst.map->dm_nsegs
#define re_dst_segs re_dst.map->dm_segs
#define re_dst_mapsize re_dst.map->dm_mapsize
struct rndstate_test;
struct safe_session {
u_int32_t ses_used;
u_int32_t ses_klen; /* key length in bits */
u_int32_t ses_key[8]; /* DES/3DES/AES key */
u_int32_t ses_hminner[5]; /* hmac inner state */
u_int32_t ses_hmouter[5]; /* hmac outer state */
u_int32_t ses_iv[4]; /* DES/3DES/AES iv */
};
struct safe_pkq {
SIMPLEQ_ENTRY(safe_pkq) pkq_next;
struct cryptkop *pkq_krp;
};
struct safe_softc {
struct device sc_dev; /* device backpointer */
struct resource *sc_irq;
void *sc_ih; /* interrupt handler cookie */
bus_space_handle_t sc_sh; /* memory handle */
bus_space_tag_t sc_st; /* memory tag */
struct resource *sc_sr; /* memory resource */
bus_dma_tag_t sc_dmat;
u_int sc_chiprev; /* major/minor chip revision */
int sc_suspended;
int sc_needwakeup; /* notify crypto layer */
int32_t sc_cid; /* crypto tag */
struct safe_dma_alloc sc_ringalloc; /* PE ring allocation state */
struct safe_ringentry *sc_ring; /* PE ring */
struct safe_ringentry *sc_ringtop; /* PE ring top */
struct safe_ringentry *sc_front; /* next free entry */
struct safe_ringentry *sc_back; /* next pending entry */
int sc_nqchip; /* # passed to chip */
struct safe_pdesc *sc_spring; /* src particle ring */
struct safe_pdesc *sc_springtop; /* src particle ring top */
struct safe_pdesc *sc_spfree; /* next free src particle */
struct safe_dma_alloc sc_spalloc; /* src particle ring state */
struct safe_pdesc *sc_dpring; /* dest particle ring */
struct safe_pdesc *sc_dpringtop; /* dest particle ring top */
struct safe_pdesc *sc_dpfree; /* next free dest particle */
struct safe_dma_alloc sc_dpalloc; /* dst particle ring state */
int sc_nsessions; /* # of sessions */
struct safe_session *sc_sessions; /* sessions */
struct timeout sc_rngto; /* rng timeout */
struct timeout sc_pkto; /* pk timeout */
SIMPLEQ_HEAD(, safe_pkq) sc_pkq;
struct safe_pkq *sc_pkq_cur;
u_int32_t sc_pk_reslen, sc_pk_resoff;
};
#endif /* _KERNEL */
struct safe_stats {
u_int64_t st_ibytes;
u_int64_t st_obytes;
u_int32_t st_ipackets;
u_int32_t st_opackets;
u_int32_t st_invalid; /* invalid argument */
u_int32_t st_badsession; /* invalid session id */
u_int32_t st_badflags; /* flags indicate !(mbuf | uio) */
u_int32_t st_nodesc; /* op submitted w/o descriptors */
u_int32_t st_badalg; /* unsupported algorithm */
u_int32_t st_ringfull; /* PE descriptor ring full */
u_int32_t st_peoperr; /* PE marked error */
u_int32_t st_dmaerr; /* PE DMA error */
u_int32_t st_bypasstoobig; /* bypass > 96 bytes */
u_int32_t st_skipmismatch; /* enc part begins before auth part */
u_int32_t st_lenmismatch; /* enc length different auth length */
u_int32_t st_coffmisaligned; /* crypto offset not 32-bit aligned */
u_int32_t st_cofftoobig; /* crypto offset > 255 words */
u_int32_t st_iovmisaligned; /* iov op not aligned */
u_int32_t st_iovnotuniform; /* iov op not suitable */
u_int32_t st_unaligned; /* unaligned src caused copy */
u_int32_t st_notuniform; /* non-uniform src caused copy */
u_int32_t st_nomap; /* bus_dmamap_create failed */
u_int32_t st_noload; /* bus_dmamap_load_* failed */
u_int32_t st_nombuf; /* MGET* failed */
u_int32_t st_nomcl; /* MCLGET* failed */
u_int32_t st_maxqchip; /* max mcr1 ops out for processing */
u_int32_t st_rng; /* RNG requests */
u_int32_t st_rngalarm; /* RNG alarm requests */
u_int32_t st_noicvcopy; /* ICV data copies suppressed */
};
#endif /* _SAFE_SAFEVAR_H_ */
|
