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authorJonathan Gray <jsg@cvs.openbsd.org>2020-09-03 06:45:04 +0000
committerJonathan Gray <jsg@cvs.openbsd.org>2020-09-03 06:45:04 +0000
commit503988bc5f236336c432bb16698c4687e482ce16 (patch)
tree23734db9fb1a7017821b1491d76138b635687252
parent526c85132de0a63a11dddc6e59ac67c94d2e0959 (diff)
Import Mesa 20.1.7
-rw-r--r--lib/mesa/.pick_status.json4773
-rw-r--r--lib/mesa/docs/relnotes/20.1.6.html2
-rw-r--r--lib/mesa/docs/relnotes/20.1.7.html169
-rw-r--r--lib/mesa/src/amd/llvm/ac_nir_to_llvm.c8
-rw-r--r--lib/mesa/src/amd/llvm/ac_shader_abi.h3
-rw-r--r--lib/mesa/src/amd/vulkan/meson.build13
-rw-r--r--lib/mesa/src/amd/vulkan/vulkan.sym11
-rw-r--r--lib/mesa/src/broadcom/cle/v3d_packet_v33.xml4
-rw-r--r--lib/mesa/src/compiler/glsl/lower_vector_derefs.cpp32
-rw-r--r--lib/mesa/src/compiler/glsl/lower_vector_insert.cpp33
-rw-r--r--lib/mesa/src/gallium/auxiliary/util/u_screen.c3
-rw-r--r--lib/mesa/src/gallium/drivers/panfrost/pan_blend_cso.c2
-rw-r--r--lib/mesa/src/gallium/drivers/panfrost/pan_job.c2
-rw-r--r--lib/mesa/src/gallium/drivers/radeonsi/si_debug_options.h1
-rw-r--r--lib/mesa/src/gallium/drivers/radeonsi/si_get.c1
-rw-r--r--lib/mesa/src/gallium/drivers/radeonsi/si_shader_llvm.c1
-rw-r--r--lib/mesa/src/gallium/drivers/radeonsi/si_shader_llvm_tess.c8
-rw-r--r--lib/mesa/src/gallium/drivers/v3d/v3dx_rcl.c7
-rw-r--r--lib/mesa/src/gallium/state_trackers/clover/spirv/invocation.cpp1
-rw-r--r--lib/mesa/src/intel/compiler/brw_nir_lower_alpha_to_coverage.c204
-rw-r--r--lib/mesa/src/intel/perf/gen_perf.c13
-rw-r--r--lib/mesa/src/intel/perf/gen_perf.h6
-rw-r--r--lib/mesa/src/intel/perf/gen_perf.py1
-rw-r--r--lib/mesa/src/intel/perf/gen_perf_query.c2
24 files changed, 5184 insertions, 116 deletions
diff --git a/lib/mesa/.pick_status.json b/lib/mesa/.pick_status.json
index b8d3c95f6..867eb75d5 100644
--- a/lib/mesa/.pick_status.json
+++ b/lib/mesa/.pick_status.json
@@ -1,5 +1,4766 @@
[
{
+ "sha": "e94c22429b64f419d9a66f04fa5ecdad33f7f5ef",
+ "description": "anv: refresh cached current batch bo after emitting some commands",
+ "nominated": false,
+ "nomination_type": 1,
+ "resolution": 4,
+ "master_sha": null,
+ "because_sha": "34a0ce58c7f85ea3ec3f1026469ce06602f38a5b"
+ },
+ {
+ "sha": "a1c2bd6ce8981b34c0cf9333699b0ce75be6cb55",
+ "description": "radeonsi: use radeonsi_clamp_div_by_zero for SPECviewperf13, Road Redemption",
+ "nominated": true,
+ "nomination_type": 0,
+ "resolution": 1,
+ "master_sha": null,
+ "because_sha": null
+ },
+ {
+ "sha": "b8445520cba818dbc53db95ce99e2beb00d8884e",
+ "description": "radeonsi,driconf: add clamp_div_by_zero option",
+ "nominated": true,
+ "nomination_type": 0,
+ "resolution": 1,
+ "master_sha": null,
+ "because_sha": null
+ },
+ {
+ "sha": "32f46a55c8229b2a8d67d895be18651a81f8e6ff",
+ "description": "ac/llvm: add option to clamp division by zero",
+ "nominated": true,
+ "nomination_type": 0,
+ "resolution": 1,
+ "master_sha": null,
+ "because_sha": null
+ },
+ {
+ "sha": "f8c0e20152b7f3f0b8d881648083a271ca528c28",
+ "description": "radeonsi: enable PIPE_CAP_NO_CLIP_ON_COPY_TEX",
+ "nominated": true,
+ "nomination_type": 0,
+ "resolution": 1,
+ "master_sha": null,
+ "because_sha": null
+ },
+ {
+ "sha": "d94bec5c49d926069f97a4b12fb2532611a9080c",
+ "description": "mesa/st: introduce PIPE_CAP_NO_CLIP_ON_COPY_TEX",
+ "nominated": true,
+ "nomination_type": 0,
+ "resolution": 1,
+ "master_sha": null,
+ "because_sha": null
+ },
+ {
+ "sha": "54fed1cf95ea8cbbdc18c6c82e8f766444a12ac3",
+ "description": "gallium/swr: Fix compilation TCS/TES compilation issues",
+ "nominated": false,
+ "nomination_type": null,
+ "resolution": 4,
+ "master_sha": null,
+ "because_sha": null
+ },
+ {
+ "sha": "639605e5ba947bb947313a6584ef7fbb8619e9c2",
+ "description": "gallium/swr: Fix compilation with LLVM 12",
+ "nominated": false,
+ "nomination_type": null,
+ "resolution": 4,
+ "master_sha": null,
+ "because_sha": null
+ },
+ {
+ "sha": "abbfc5b8db7412fa2e6f8c1b66ff97b886c4ac70",
+ "description": "spirv: fix retrieving dest type for OpFragmentMaskFetchAMD",
+ "nominated": false,
+ "nomination_type": 1,
+ "resolution": 4,
+ "master_sha": null,
+ "because_sha": "a196f05fc22620be5809f7b28ce7f2671b1ef32c"
+ },
+ {
+ "sha": "4500e6e460dca068157862b95c7534d7d163c42c",
+ "description": "vulkan: make VK_TIME_DOMAIN_CLOCK_MONOTONIC_RAW_EXT conditional",
+ "nominated": true,
+ "nomination_type": 1,
+ "resolution": 1,
+ "master_sha": null,
+ "because_sha": "67a2c1493c068281936fecba9fa6784becf08f8e"
+ },
+ {
+ "sha": "7fbeb2623f309c9966945a104f35b5c9f2034092",
+ "description": "radv: remove seccomp includes",
+ "nominated": false,
+ "nomination_type": 1,
+ "resolution": 4,
+ "master_sha": null,
+ "because_sha": "7324977e420260cea0627e3381a9f3ae4e62af0f"
+ },
+ {
+ "sha": "b30bd6fe5f254d895c1dec780f24518b3e880ed4",
+ "description": "util/os_misc: os_get_available_system_memory() for OpenBSD",
+ "nominated": true,
+ "nomination_type": 1,
+ "resolution": 1,
+ "master_sha": null,
+ "because_sha": "b80930a6fea075d2ef283ceac5a2a64e65fd7bc4"
+ },
+ {
+ "sha": "5b1ed09ff023ff98fed0c78a5ea609821cb92a8c",
+ "description": "anv: use os_get_available_system_memory()",
+ "nominated": true,
+ "nomination_type": 1,
+ "resolution": 1,
+ "master_sha": null,
+ "because_sha": "b80930a6fea075d2ef283ceac5a2a64e65fd7bc4"
+ },
+ {
+ "sha": "033dcb2978c6d95d42da944b8147228d239d32f4",
+ "description": "util/os_misc: add os_get_available_system_memory()",
+ "nominated": true,
+ "nomination_type": 1,
+ "resolution": 1,
+ "master_sha": null,
+ "because_sha": "b80930a6fea075d2ef283ceac5a2a64e65fd7bc4"
+ },
+ {
+ "sha": "81b163fb73ae73709d257badf4f5aaf3b63fca4a",
+ "description": "anv: use os_get_total_physical_memory()",
+ "nominated": true,
+ "nomination_type": 1,
+ "resolution": 1,
+ "master_sha": null,
+ "because_sha": "060a6434eca9fb05ca2dfd612f8abd4786ee4549"
+ },
+ {
+ "sha": "0369dd907778d8636e2b074717846bb658d76d90",
+ "description": "freedreno/a6xx: Add ARB_depth_clamp and separate clamp support.",
+ "nominated": false,
+ "nomination_type": null,
+ "resolution": 4,
+ "master_sha": null,
+ "because_sha": null
+ },
+ {
+ "sha": "5c0d34cee45f77ebfbe374fc565e53497a290177",
+ "description": "ci: Enable KHR-GL30 CTS testing on freedreno a630.",
+ "nominated": false,
+ "nomination_type": null,
+ "resolution": 4,
+ "master_sha": null,
+ "because_sha": null
+ },
+ {
+ "sha": "ef807a52f132d789063ba3d5b8b090c6816c4915",
+ "description": "ci: Use the same VK-GL-CTS tree for GL/GLES as VK.",
+ "nominated": false,
+ "nomination_type": null,
+ "resolution": 4,
+ "master_sha": null,
+ "because_sha": null
+ },
+ {
+ "sha": "eb02b311234b71b155496681f294954f3de61823",
+ "description": "ci: Bump vulkan CTS version to 1.2.3.2, and keep the GL CTS around.",
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+ "master_sha": null,
+ "because_sha": null
+ },
+ {
+ "sha": "b9df3fef4d5a25ae040a7d784fe0578788f71252",
+ "description": "panfrost: Drop PIPE_CAP_MAX_COMBINED_HW_ATOMIC_COUNTER/BUFFERS",
+ "nominated": false,
+ "nomination_type": null,
+ "resolution": 4,
+ "master_sha": null,
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+ },
+ {
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+ },
+ {
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+ },
+ {
+ "sha": "703b03bd452bab26406077cf553508a0d80c8e92",
+ "description": "panfrost: add support for src[3] in LOAD_STORE ops",
+ "nominated": false,
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+ "resolution": 4,
+ "master_sha": null,
+ "because_sha": null
+ },
+ {
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+ "description": "panfrost: introduce LDST_ATOMIC property",
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+ "nomination_type": null,
+ "resolution": 4,
+ "master_sha": null,
+ "because_sha": null
+ },
+ {
+ "sha": "16664fc641801225878589f72ee3ae6f0cb28bac",
+ "description": "panfrost: add LDST_ADDRESS property to atomic ops",
+ "nominated": false,
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+ "master_sha": null,
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+ },
+ {
+ "sha": "8e8805b212dd7e21b1ec28888ef7fbf477c5213f",
+ "description": "panfrost: add atomic_cmpxchg opcode",
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+ "master_sha": null,
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+ },
+ {
+ "sha": "11012611d7fb6b26e0959bc462d47131699be6e2",
+ "description": "panfrost: fix undefined value access on mir_set_intr_mask()",
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+ "because_sha": null
+ },
+ {
+ "sha": "526f3566332e6fdf3bc413471a1a6e5ad091f0c5",
+ "description": "clover: Use 64-bit offsets for shader_in on 64-bit GPUs",
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+ },
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+ },
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+ "because_sha": null
+ },
+ {
+ "sha": "ef142c68e1161bfa1fbe1ff19419a54cb1e8ea73",
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+ {
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+ {
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+ },
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+ },
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+ },
+ {
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+ },
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+ {
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+ },
+ {
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+ },
+ {
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+ },
+ {
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+ },
+ {
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+ },
+ {
+ "sha": "83b5c1abc6ccaa5807f931e914842d181ab2410a",
+ "description": "egl/android: simplify dri2_initialize_android()",
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+ "nomination_type": null,
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+ "master_sha": null,
+ "because_sha": null
+ },
+ {
+ "sha": "cccb497d3c3bbc8f615fe79d774eb42a48e5a95c",
+ "description": "intel/fs: Fix MOV_INDIRECT and BROADCAST of Q types on Gen11+",
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+ },
+ {
+ "sha": "70cbddc4a7967c8889f8b10d8a31d7b8bdbde2fb",
+ "description": "nir: use enum operator helper for nir_variable_mode and nir_metadata",
+ "nominated": false,
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+ "resolution": 4,
+ "master_sha": null,
+ "because_sha": null
+ },
+ {
+ "sha": "76a1fb3b42c245a425fde55b97a393d3e1984112",
+ "description": "util: add helpers to define bitwise operators on enums for C++",
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+ "master_sha": null,
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+ },
+ {
+ "sha": "24dfd798d6205fd545dd988eb6c9dd2eae5b7929",
+ "description": "nir: use nir_var_all to get rid of casting",
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+ "master_sha": null,
+ "because_sha": null
+ },
+ {
+ "sha": "15da98365388983eb9ef1a65c2e7da6ef2ab89e0",
+ "description": "nir: Improve the comment on num_inputs and friends",
+ "nominated": false,
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+ "resolution": 4,
+ "master_sha": null,
+ "because_sha": null
+ },
+ {
+ "sha": "4d18e71fea908ca64b23ee28d36fec780970e9b2",
+ "description": "nir: Rename num_shared to shared_size",
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+ },
+ {
+ "sha": "471f260ef361282d01f15d9462933a3f3f6af4af",
+ "description": "spirv: Delete some dead workgroup variable handling code",
+ "nominated": false,
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+ "resolution": 4,
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+ "because_sha": null
+ },
+ {
+ "sha": "1459cce7ec739717eed7c23aed641100ac6cb3fc",
+ "description": "spirv: add some tests for volatile/available/visible",
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+ },
+ {
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+ "description": "spirv: Support big-endian strings",
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+ "nomination_type": null,
+ "resolution": 4,
+ "master_sha": null,
+ "because_sha": null
+ },
+ {
+ "sha": "b50ae770144ef6622591c7cc23aa96e45933cf37",
+ "description": "radv: align pipeline cache entry and header sizes",
+ "nominated": false,
+ "nomination_type": null,
+ "resolution": 4,
+ "master_sha": null,
+ "because_sha": null
+ },
+ {
+ "sha": "4f08af6766c23295922a08a95d0183820f7bc702",
+ "description": "radv: don't pass null to _mesa_sha1_update",
+ "nominated": false,
+ "nomination_type": null,
+ "resolution": 4,
+ "master_sha": null,
+ "because_sha": null
+ },
+ {
+ "sha": "30fca3b2e65c6125c24894ed11b15e09a52b42e6",
+ "description": "nir: fix memory leak in nir_cf_list_clone",
+ "nominated": false,
+ "nomination_type": null,
+ "resolution": 4,
+ "master_sha": null,
+ "because_sha": null
+ },
+ {
+ "sha": "27ec38d746824046f780efa934d4f25c1c8b32a8",
+ "description": "nir: fix potential left shift of a negative value",
+ "nominated": false,
+ "nomination_type": null,
+ "resolution": 4,
+ "master_sha": null,
+ "because_sha": null
+ },
+ {
+ "sha": "391eeb744356353e96ce34f23b8b16b718a02d61",
+ "description": "util: add a alignof() macro",
+ "nominated": false,
+ "nomination_type": null,
+ "resolution": 4,
+ "master_sha": null,
+ "because_sha": null
+ },
+ {
+ "sha": "721cb6cc07978259e055c5c7ff7093819b18e8b5",
+ "description": "gitlab: ask inxi output to be in code blocks",
+ "nominated": false,
+ "nomination_type": null,
+ "resolution": 4,
+ "master_sha": null,
+ "because_sha": null
+ },
+ {
+ "sha": "e901b901cb61519514271ffc76a8c784c5e37d2a",
+ "description": "radv,aco: report ACO errors/warnings back via VK_EXT_debug_report",
+ "nominated": false,
+ "nomination_type": null,
+ "resolution": 4,
+ "master_sha": null,
+ "because_sha": null
+ },
+ {
+ "sha": "c2b1978aa47c5b8876a589aa035a670d55e87c2e",
+ "description": "aco: rework the way various compilation/validation errors are reported",
+ "nominated": false,
+ "nomination_type": null,
+ "resolution": 4,
+ "master_sha": null,
+ "because_sha": null
+ },
+ {
+ "sha": "bc723dfda7b3e6b4671b068785c50bd49aa27ee8",
+ "description": "aco: rename DEBUG_VALIDATE to DEBUG_VALIDATE_IR",
+ "nominated": false,
+ "nomination_type": null,
+ "resolution": 4,
+ "master_sha": null,
+ "because_sha": null
+ },
+ {
+ "sha": "709dffa856682b706e516dd324e2f5129a127e8e",
+ "description": "anv: null check for buffer before reading size",
+ "nominated": false,
+ "nomination_type": 1,
+ "resolution": 4,
+ "master_sha": null,
+ "because_sha": "b9a05447a1976101c04a02f5588c51de0b0f6573"
+ },
+ {
+ "sha": "8d38b25788c9f9bcc1c8bf2a422162328ac663d1",
+ "description": "util: Explicitly call the unpack functions from inside bptc pack/unpack.",
+ "nominated": false,
+ "nomination_type": null,
+ "resolution": 4,
+ "master_sha": null,
+ "because_sha": null
+ },
+ {
+ "sha": "edf0aeb3cd264a431cd9d6bf7a758fe37bfbef04",
+ "description": "util: Expose rgba unpack/fetch functions as external functions as well.",
+ "nominated": false,
+ "nomination_type": null,
+ "resolution": 4,
+ "master_sha": null,
+ "because_sha": null
+ },
+ {
+ "sha": "9d503b36ca24e1747e99a034e05700ad80c0682c",
+ "description": "iris: Drop buffer support in resource_from_handle",
+ "nominated": false,
+ "nomination_type": null,
+ "resolution": 4,
+ "master_sha": null,
+ "because_sha": null
+ },
+ {
+ "sha": "c54bb23967b3cbd0954adac9e6155d3a56812900",
+ "description": "iris: Add and use iris_resource_configure_main",
+ "nominated": false,
+ "nomination_type": null,
+ "resolution": 4,
+ "master_sha": null,
+ "because_sha": null
+ },
+ {
+ "sha": "51e42e218398da818fc223e2f5da61017fb31f8a",
+ "description": "iris: Move size/offset calculations out of configure_aux",
+ "nominated": false,
+ "nomination_type": null,
+ "resolution": 4,
+ "master_sha": null,
+ "because_sha": null
+ },
+ {
+ "sha": "8b2fc9195988ba59f629a8e720ccba0d9bf0d532",
+ "description": "iris: Drop old comment on clear color BO allocation",
+ "nominated": false,
+ "nomination_type": null,
+ "resolution": 4,
+ "master_sha": null,
+ "because_sha": null
+ },
+ {
+ "sha": "fd3c20674ea957901a6ff7c1bd62026243fd5e78",
+ "description": "iris: Drop unused resource allocation optimization",
+ "nominated": false,
+ "nomination_type": null,
+ "resolution": 4,
+ "master_sha": null,
+ "because_sha": null
+ },
+ {
+ "sha": "2555321a109b216756c275f7201b6d71def1439e",
+ "description": "iris: Drop iris_resource_alloc_separate_aux",
+ "nominated": false,
+ "nomination_type": null,
+ "resolution": 4,
+ "master_sha": null,
+ "because_sha": null
+ },
+ {
+ "sha": "0dc0a79a581b91aec301991706242f11aeb1473b",
+ "description": "egl: drop another indentation level in _eglFindDisplay() by inverting an if",
+ "nominated": false,
+ "nomination_type": null,
+ "resolution": 4,
+ "master_sha": null,
+ "because_sha": null
+ },
+ {
+ "sha": "8b2fc1d1b5a822692321af1a2a01dddbc9cff356",
+ "description": "egl: drop an indentation level in _eglFindDisplay() by replacing break/if with a goto",
+ "nominated": false,
+ "nomination_type": null,
+ "resolution": 4,
+ "master_sha": null,
+ "because_sha": null
+ },
+ {
+ "sha": "b5d36e9cb6c73c6e4eea4df247ded96535abae18",
+ "description": "gitlab-ci: fix quoting of variables passed down to bare-metal runners",
+ "nominated": false,
+ "nomination_type": null,
+ "resolution": 4,
+ "master_sha": null,
+ "because_sha": null
+ },
+ {
+ "sha": "72fac11ca37c67a13225dbe8c04e73cdca36ae5f",
+ "description": "gitlab-ci: fix testing whether a variable with a given name is set or not",
+ "nominated": false,
+ "nomination_type": null,
+ "resolution": 4,
+ "master_sha": null,
+ "because_sha": null
+ },
+ {
+ "sha": "64fb3e6def2b71df2766fabfeddadcc732155775",
+ "description": "docs: update calendar and link releases notes for 20.1.6",
+ "nominated": false,
+ "nomination_type": null,
+ "resolution": 4,
+ "master_sha": null,
+ "because_sha": null
+ },
+ {
+ "sha": "8be321f30abcc8f72feda8ff48ea25dfd60e4c08",
+ "description": "docs: add release notes for 20.1.6",
+ "nominated": false,
+ "nomination_type": null,
+ "resolution": 4,
+ "master_sha": null,
+ "because_sha": null
+ },
+ {
+ "sha": "bd38ea77e80d1d8f10097c4484ecf5f370effd03",
+ "description": "v3d/compiler: add v3dv_prog_data_size helper",
+ "nominated": false,
+ "nomination_type": null,
+ "resolution": 4,
+ "master_sha": null,
+ "because_sha": null
+ },
+ {
"sha": "a880f97d593a461bdcce27e526423a9b1d6834b4",
"description": "compiler/types: Allow interfaces in get_explicit_type_for_size_align",
"nominated": false,
@@ -373,7 +5134,7 @@
"description": "radv: restrict exported symbols with static llvm",
"nominated": false,
"nomination_type": null,
- "resolution": 4,
+ "resolution": 1,
"master_sha": null,
"because_sha": null
},
@@ -6313,7 +11074,7 @@
"description": "freedreno/a6xx: fixup draw state earlier",
"nominated": true,
"nomination_type": 1,
- "resolution": 0,
+ "resolution": 2,
"master_sha": null,
"because_sha": "4d8f42c85125fa86008553ddaf48f44498d8bddc"
},
@@ -16708,7 +21469,7 @@
"description": "loader/dri3: Check for window destruction in dri3_wait_for_event_locked",
"nominated": true,
"nomination_type": 0,
- "resolution": 0,
+ "resolution": 2,
"master_sha": null,
"because_sha": null
},
@@ -16717,7 +21478,7 @@
"description": "loader/dri3: Use dri3_wait_for_event_locked in loader_dri3_wait_for_msc",
"nominated": true,
"nomination_type": 1,
- "resolution": 0,
+ "resolution": 2,
"master_sha": null,
"because_sha": "7b0e8264dd21ae05521d08d41fecd84139401fef"
},
@@ -16726,7 +21487,7 @@
"description": "loader/dri3: Add dri3_wait_for_event_locked full_sequence out parameter",
"nominated": true,
"nomination_type": 0,
- "resolution": 0,
+ "resolution": 2,
"master_sha": null,
"because_sha": null
},
@@ -22783,7 +27544,7 @@
"description": "nir: Add a nir_metadata_all enum value",
"nominated": false,
"nomination_type": null,
- "resolution": 4,
+ "resolution": 1,
"master_sha": null,
"because_sha": null
},
diff --git a/lib/mesa/docs/relnotes/20.1.6.html b/lib/mesa/docs/relnotes/20.1.6.html
index 0ce65bd85..e6615f72c 100644
--- a/lib/mesa/docs/relnotes/20.1.6.html
+++ b/lib/mesa/docs/relnotes/20.1.6.html
@@ -36,7 +36,7 @@ depends on the particular driver being used.
<h2>SHA256 checksum</h2>
<pre>
-TBD.
+23bed40114b03ad640c95bfe72cc879ed2f941d0d481b77b5204a1fc567fa93c mesa-20.1.6.tar.xz
</pre>
diff --git a/lib/mesa/docs/relnotes/20.1.7.html b/lib/mesa/docs/relnotes/20.1.7.html
new file mode 100644
index 000000000..e01b23471
--- /dev/null
+++ b/lib/mesa/docs/relnotes/20.1.7.html
@@ -0,0 +1,169 @@
+
+<!DOCTYPE HTML PUBLIC "-//W3C//DTD HTML 4.01 Transitional//EN" "http://www.w3.org/TR/html4/loose.dtd">
+<html lang="en">
+<head>
+<meta http-equiv="content-type" content="text/html; charset=utf-8">
+<title>Mesa Release Notes</title>
+<link rel="stylesheet" type="text/css" href="../mesa.css">
+</head>
+<body>
+
+<div class="header">
+<h1>The Mesa 3D Graphics Library</h1>
+</div>
+
+<iframe src="../contents.html"></iframe>
+<div class="content">
+
+<h1>Mesa 20.1.7 Release Notes / 2020-09-02</h1>
+
+<p>
+ Mesa 20.1.7 is a bug fix release which fixes bugs found since the 20.1.6 release.
+</p>
+<p>
+Mesa 20.1.7 implements the OpenGL 4.6 API, but the version reported by
+glGetString(GL_VERSION) or glGetIntegerv(GL_MAJOR_VERSION) /
+glGetIntegerv(GL_MINOR_VERSION) depends on the particular driver being used.
+Some drivers don't support all the features required in OpenGL 4.6. OpenGL
+4.6 is <strong>only</strong> available if requested at context creation.
+Compatibility contexts may report a lower version depending on each driver.
+</p>
+<p>
+Mesa 20.1.7 implements the Vulkan 1.2 API, but the version reported by
+the apiVersion property of the VkPhysicalDeviceProperties struct
+depends on the particular driver being used.
+</p>
+
+<h2>SHA256 checksum</h2>
+<pre>
+TBD.
+</pre>
+
+
+<h2>New features</h2>
+
+<ul>
+ <li>None</li>
+</ul>
+
+<h2>Bug fixes</h2>
+
+<ul>
+ <li>Road Redemption certain graphic effects rendered white color</li>
+ <li>Intel Vulkan driver crash with alpha-to-coverage</li>
+ <li>error: ‘static_assert’ was not declared in this scope</li>
+ <li>vulkan/wsi/x11: deadlock with Xwayland when compositor holds multiple buffers</li>
+ <li>[RADV/ACO] Death Stranding cause a GPU hung (*ERROR* Waiting for fences timed out!)</li>
+ <li>lp_bld_init.c:172:7: error: implicit declaration of function ‘LLVMAddConstantPropagationPass’; did you mean ‘LLVMAddCorrelatedValuePropagationPass’? [-Werror=implicit-function-declaration]</li>
+ <li>radv: blitting 3D images with linear filter</li>
+ <li>&lt;&lt;MESA crashed&gt;&gt; Array Index Out of Range with Graphicsfuzz application</li>
+ <li>Intel Vulkan driver assertion with small xfb buffer</li>
+</ul>
+
+<h2>Changes</h2>
+
+<ul>
+ <p>Alejandro Piñeiro (2):</p>
+ <li> v3d/packet: fix typo on Set InstanceID/PrimitiveID packet</li>
+ <li> v3d: set instance id to 0 at start of tile</li>
+ <p></p>
+ <p>Alyssa Rosenzweig (6):</p>
+ <li> panfrost: Fix blend leak for render targets 5-8</li>
+ <li> panfrost: Free hash_to_temp map</li>
+ <li> pan/mdg: Free previous liveness</li>
+ <li> panfrost: Use memctx for sysvals</li>
+ <li> panfrost: Free batch-&gt;dependencies</li>
+ <li> pan/mdg: Fix perspective combination</li>
+ <p></p>
+ <p>Bas Nieuwenhuizen (1):</p>
+ <li> radv: Fix 3d blits.</li>
+ <p></p>
+ <p>Danylo Piliaiev (3):</p>
+ <li> glsl: Eliminate out-of-bounds triop_vector_insert</li>
+ <li> ir_constant: Return zero on out-of-bounds vector accesses</li>
+ <li> glsl: Eliminate assigments to out-of-bounds elements of vector</li>
+ <p></p>
+ <p>Emil Velikov (1):</p>
+ <li> radv: restrict exported symbols with static llvm</li>
+ <p></p>
+ <p>Eric Engestrom (10):</p>
+ <li> docs/relnotes: add sha256 sums to 20.1.6</li>
+ <li> .pick_status.json: Update to e94c22429b64f419d9a66f04fa5ecdad33f7f5ef</li>
+ <li> .pick_status.json: Mark 9146f596ed1e8854a2a6c9137396a902bc92946c as denominated</li>
+ <li> .pick_status.json: Mark da6d0e3facfe0eb5c7db2d75d6992643d929caff as denominated</li>
+ <li> .pick_status.json: Mark b5558f2d2aa738d90b9e039144ae3ca69bdf92ca as denominated</li>
+ <li> .pick_status.json: Mark c9858fb941ce7e903f608e537b3657c946f86980 as denominated</li>
+ <li> .pick_status.json: Mark ee77951714ff4373261befde6e84f592cc1c769c as denominated</li>
+ <li> .pick_status.json: Mark 7c226116c6c0793d6d9a7dec52ac7cf54b82b57f as denominated</li>
+ <li> .pick_status.json: Mark d7d7687829875e401690219d4a72458fb2bbe4de as denominated</li>
+ <li> scons: bump c++ standard to 14 to match meson</li>
+ <p></p>
+ <p>Jason Ekstrand (5):</p>
+ <li> clover/spirv: Don&#x27;t call llvm::regularizeLlvmForSpirv</li>
+ <li> intel/nir: Pass the nir_builder by reference in lower_alpha_to_coverage</li>
+ <li> nir: Add a nir_metadata_all enum value</li>
+ <li> intel/nir: Rewrite the guts of lower_alpha_to_coverage</li>
+ <li> intel/fs: Fix MOV_INDIRECT and BROADCAST of Q types on Gen11+</li>
+ <p></p>
+ <p>Jonathan Gray (11):</p>
+ <li> util: unbreak endian detection on OpenBSD</li>
+ <li> util/anon_file: add OpenBSD shm_mkstemp() path</li>
+ <li> meson: build with _ISOC11_SOURCE on OpenBSD</li>
+ <li> meson: conditionally include -ldl in gbm pkg-config file</li>
+ <li> util: futex fixes for OpenBSD</li>
+ <li> util/u_thread: include pthread_np.h if found</li>
+ <li> anv: use os_get_total_physical_memory()</li>
+ <li> util/os_misc: add os_get_available_system_memory()</li>
+ <li> anv: use os_get_available_system_memory()</li>
+ <li> util/os_misc: os_get_available_system_memory() for OpenBSD</li>
+ <li> vulkan: make VK_TIME_DOMAIN_CLOCK_MONOTONIC_RAW_EXT conditional</li>
+ <p></p>
+ <p>Lionel Landwerlin (3):</p>
+ <li> anv: fix transform feedback surface size</li>
+ <li> intel/perf: store query symbol name</li>
+ <li> intel/perf: fix raw query kernel metric selection</li>
+ <p></p>
+ <p>Marek Olšák (3):</p>
+ <li> st/mesa: don&#x27;t generate NIR for ARB_vp/fp if NIR is not preferred</li>
+ <li> radeonsi: fix tess levels coming as scalar arrays from SPIR-V</li>
+ <li> gallivm: fix build on LLVM 12 due to LLVMAddConstantPropagationPass removal</li>
+ <p></p>
+ <p>Marek Vasut (2):</p>
+ <li> etnaviv: Remove etna_resource_get_status()</li>
+ <li> etnaviv: Add lock around pending_ctx</li>
+ <p></p>
+ <p>Nanley Chery (1):</p>
+ <li> gallium/dri2: Report correct YUYV and UYVY plane count</li>
+ <p></p>
+ <p>Pierre Moreau (1):</p>
+ <li> clover/spirv: Remove unused tuple header</li>
+ <p></p>
+ <p>Pierre-Eric Pelloux-Prayer (5):</p>
+ <li> mesa/st: introduce PIPE_CAP_NO_CLIP_ON_COPY_TEX</li>
+ <li> radeonsi: enable PIPE_CAP_NO_CLIP_ON_COPY_TEX</li>
+ <li> ac/llvm: add option to clamp division by zero</li>
+ <li> radeonsi,driconf: add clamp_div_by_zero option</li>
+ <li> radeonsi: use radeonsi_clamp_div_by_zero for SPECviewperf13, Road Redemption</li>
+ <p></p>
+ <p>Rhys Perry (1):</p>
+ <li> aco: fix non-rtz pack_half_2x16</li>
+ <p></p>
+ <p>Rob Clark (1):</p>
+ <li> freedreno: handle case of shadowing current render target</li>
+ <p></p>
+ <p>Roman Gilg (2):</p>
+ <li> vulkan/wsi/x11: add sent image counter</li>
+ <li> vulkan/wsi/x11: wait for acquirable images in FIFO mode</li>
+ <p></p>
+ <p>Samuel Pitoiset (1):</p>
+ <li> nir/algebraic: mark some optimizations with fsat(NaN) as inexact</li>
+ <p></p>
+ <p>Vinson Lee (1):</p>
+ <li> vulkan: Fix memory leaks.</li>
+ <p></p>
+ <p></p>
+</ul>
+
+</div>
+</body>
+</html>
diff --git a/lib/mesa/src/amd/llvm/ac_nir_to_llvm.c b/lib/mesa/src/amd/llvm/ac_nir_to_llvm.c
index 0fcd5934a..c6f612f58 100644
--- a/lib/mesa/src/amd/llvm/ac_nir_to_llvm.c
+++ b/lib/mesa/src/amd/llvm/ac_nir_to_llvm.c
@@ -701,6 +701,9 @@ static void visit_alu(struct ac_nir_context *ctx, const nir_alu_instr *instr)
result = emit_intrin_1f_param(&ctx->ac, "llvm.amdgcn.rcp",
ac_to_float_type(&ctx->ac, def_type), src[0]);
}
+ if (ctx->abi->clamp_div_by_zero)
+ result = ac_build_fmin(&ctx->ac, result,
+ LLVMConstReal(ac_to_float_type(&ctx->ac, def_type), FLT_MAX));
break;
case nir_op_iand:
result = LLVMBuildAnd(ctx->ac.builder, src[0], src[1], "");
@@ -847,6 +850,9 @@ static void visit_alu(struct ac_nir_context *ctx, const nir_alu_instr *instr)
case nir_op_frsq:
result = emit_intrin_1f_param(&ctx->ac, "llvm.amdgcn.rsq",
ac_to_float_type(&ctx->ac, def_type), src[0]);
+ if (ctx->abi->clamp_div_by_zero)
+ result = ac_build_fmin(&ctx->ac, result,
+ LLVMConstReal(ac_to_float_type(&ctx->ac, def_type), FLT_MAX));
break;
case nir_op_frexp_exp:
src[0] = ac_to_float(&ctx->ac, src[0]);
@@ -888,7 +894,7 @@ static void visit_alu(struct ac_nir_context *ctx, const nir_alu_instr *instr)
case nir_op_ffma:
/* FMA is better on GFX10, because it has FMA units instead of MUL-ADD units. */
result = emit_intrin_3f_param(&ctx->ac, ctx->ac.chip_class >= GFX10 ? "llvm.fma" : "llvm.fmuladd",
- ac_to_float_type(&ctx->ac, def_type), src[0], src[1], src[2]);
+ ac_to_float_type(&ctx->ac, def_type), src[0], src[1], src[2]);
break;
case nir_op_ldexp:
src[0] = ac_to_float(&ctx->ac, src[0]);
diff --git a/lib/mesa/src/amd/llvm/ac_shader_abi.h b/lib/mesa/src/amd/llvm/ac_shader_abi.h
index 18f85a791..337414eff 100644
--- a/lib/mesa/src/amd/llvm/ac_shader_abi.h
+++ b/lib/mesa/src/amd/llvm/ac_shader_abi.h
@@ -186,6 +186,9 @@ struct ac_shader_abi {
/* Whether bounds checks are required */
bool robust_buffer_access;
+
+ /* Clamp div by 0 (so it won't produce NaN) */
+ bool clamp_div_by_zero;
};
#endif /* AC_SHADER_ABI_H */
diff --git a/lib/mesa/src/amd/vulkan/meson.build b/lib/mesa/src/amd/vulkan/meson.build
index efcf2dd6c..eec026e8f 100644
--- a/lib/mesa/src/amd/vulkan/meson.build
+++ b/lib/mesa/src/amd/vulkan/meson.build
@@ -157,6 +157,16 @@ if with_platform_android
]
endif
+# When static linking LLVM, all its symbols are public API.
+# That may cause symbol collision, so explicitly demote everything.
+libvulkan_radeon_ld_args = []
+libvulkan_radeon_link_depends = []
+
+if with_llvm and with_ld_version_script
+ libvulkan_radeon_ld_args += ['-Wl,--version-script', join_paths(meson.current_source_dir(), 'vulkan.sym')]
+ libvulkan_radeon_link_depends += files('vulkan.sym')
+endif
+
libvulkan_radeon = shared_library(
'vulkan_radeon',
[libradv_files, radv_entrypoints, radv_extensions_c, amd_vk_format_table_c, sha1_h, radv_gfx10_format_table_h],
@@ -173,7 +183,8 @@ libvulkan_radeon = shared_library(
],
c_args : [c_vis_args, no_override_init_args, radv_flags],
cpp_args : [cpp_vis_args, radv_flags],
- link_args : [ld_args_bsymbolic, ld_args_gc_sections],
+ link_args : [ld_args_bsymbolic, ld_args_gc_sections, libvulkan_radeon_ld_args],
+ link_depends : [libvulkan_radeon_link_depends,],
install : true,
)
diff --git a/lib/mesa/src/amd/vulkan/vulkan.sym b/lib/mesa/src/amd/vulkan/vulkan.sym
new file mode 100644
index 000000000..c85a22e90
--- /dev/null
+++ b/lib/mesa/src/amd/vulkan/vulkan.sym
@@ -0,0 +1,11 @@
+{
+ global:
+ vk_icdGetInstanceProcAddr;
+ vk_icdGetPhysicalDeviceProcAddr;
+ vk_icdNegotiateLoaderICDInterfaceVersion;
+
+ local:
+ # When static linking LLVM, all its symbols are public API.
+ # That may cause symbol collision, so explicitly demote everything.
+ *;
+};
diff --git a/lib/mesa/src/broadcom/cle/v3d_packet_v33.xml b/lib/mesa/src/broadcom/cle/v3d_packet_v33.xml
index a5bac1091..e0955f8bd 100644
--- a/lib/mesa/src/broadcom/cle/v3d_packet_v33.xml
+++ b/lib/mesa/src/broadcom/cle/v3d_packet_v33.xml
@@ -630,11 +630,11 @@
</packet>
<packet code="54" name="Set InstanceID" cl="B" min_ver="41">
- <field name="Instance ID" size="32" start="32" type="uint"/>
+ <field name="Instance ID" size="32" start="0" type="uint"/>
</packet>
<packet code="55" name="Set PrimitiveID" cl="B" min_ver="41">
- <field name="Primitive ID" size="32" start="32" type="uint"/>
+ <field name="Primitive ID" size="32" start="0" type="uint"/>
</packet>
<packet code="56" name="Prim List Format">
diff --git a/lib/mesa/src/compiler/glsl/lower_vector_derefs.cpp b/lib/mesa/src/compiler/glsl/lower_vector_derefs.cpp
index 0c09630fa..8a37e35b6 100644
--- a/lib/mesa/src/compiler/glsl/lower_vector_derefs.cpp
+++ b/lib/mesa/src/compiler/glsl/lower_vector_derefs.cpp
@@ -136,15 +136,31 @@ vector_deref_visitor::visit_enter(ir_assignment *ir)
ir->write_mask = (1 << new_lhs->type->vector_elements) - 1;
ir->set_lhs(new_lhs);
}
- } else if (new_lhs->ir_type != ir_type_swizzle) {
- ir->set_lhs(new_lhs);
- ir->write_mask = 1 << old_index_constant->get_uint_component(0);
} else {
- /* If the "new" LHS is a swizzle, use the set_lhs helper to instead
- * swizzle the RHS.
- */
- unsigned component[1] = { old_index_constant->get_uint_component(0) };
- ir->set_lhs(new(mem_ctx) ir_swizzle(new_lhs, component, 1));
+ unsigned index = old_index_constant->get_uint_component(0);
+
+ if (index >= new_lhs->type->vector_elements) {
+ /* Section 5.11 (Out-of-Bounds Accesses) of the GLSL 4.60 spec says:
+ *
+ * In the subsections described above for array, vector, matrix and
+ * structure accesses, any out-of-bounds access produced undefined
+ * behavior.... Out-of-bounds writes may be discarded or overwrite
+ * other variables of the active program.
+ */
+ ir->remove();
+ return visit_continue;
+ }
+
+ if (new_lhs->ir_type != ir_type_swizzle) {
+ ir->set_lhs(new_lhs);
+ ir->write_mask = 1 << index;
+ } else {
+ /* If the "new" LHS is a swizzle, use the set_lhs helper to instead
+ * swizzle the RHS.
+ */
+ unsigned component[1] = { index };
+ ir->set_lhs(new(mem_ctx) ir_swizzle(new_lhs, component, 1));
+ }
}
return ir_rvalue_enter_visitor::visit_enter(ir);
diff --git a/lib/mesa/src/compiler/glsl/lower_vector_insert.cpp b/lib/mesa/src/compiler/glsl/lower_vector_insert.cpp
index ceaa5887c..81ef0491c 100644
--- a/lib/mesa/src/compiler/glsl/lower_vector_insert.cpp
+++ b/lib/mesa/src/compiler/glsl/lower_vector_insert.cpp
@@ -32,7 +32,8 @@ namespace {
class vector_insert_visitor : public ir_rvalue_visitor {
public:
vector_insert_visitor(bool lower_nonconstant_index)
- : progress(false), lower_nonconstant_index(lower_nonconstant_index)
+ : progress(false), lower_nonconstant_index(lower_nonconstant_index),
+ remove_assignment(false)
{
factory.instructions = &factory_instructions;
}
@@ -43,11 +44,13 @@ public:
}
virtual void handle_rvalue(ir_rvalue **rv);
+ virtual ir_visitor_status visit_leave(ir_assignment *expr);
ir_factory factory;
exec_list factory_instructions;
bool progress;
bool lower_nonconstant_index;
+ bool remove_assignment;
};
} /* anonymous namespace */
@@ -68,6 +71,21 @@ vector_insert_visitor::handle_rvalue(ir_rvalue **rv)
ir_constant *const idx =
expr->operands[2]->constant_expression_value(factory.mem_ctx);
if (idx != NULL) {
+ unsigned index = idx->value.u[0];
+
+ if (index >= expr->operands[0]->type->vector_elements) {
+ /* Section 5.11 (Out-of-Bounds Accesses) of the GLSL 4.60 spec says:
+ *
+ * In the subsections described above for array, vector, matrix and
+ * structure accesses, any out-of-bounds access produced undefined
+ * behavior.... Out-of-bounds writes may be discarded or overwrite
+ * other variables of the active program.
+ */
+ this->remove_assignment = true;
+ this->progress = true;
+ return;
+ }
+
/* Replace (vector_insert (vec) (scalar) (index)) with a dereference of
* a new temporary. The new temporary gets assigned as
*
@@ -136,6 +154,19 @@ vector_insert_visitor::handle_rvalue(ir_rvalue **rv)
base_ir->insert_before(factory.instructions);
}
+ir_visitor_status
+vector_insert_visitor::visit_leave(ir_assignment *ir)
+{
+ ir_rvalue_visitor::visit_leave(ir);
+
+ if (this->remove_assignment) {
+ ir->remove();
+ this->remove_assignment = false;
+ }
+
+ return visit_continue;
+}
+
bool
lower_vector_insert(exec_list *instructions, bool lower_nonconstant_index)
{
diff --git a/lib/mesa/src/gallium/auxiliary/util/u_screen.c b/lib/mesa/src/gallium/auxiliary/util/u_screen.c
index ae024f0e6..ed6e31b38 100644
--- a/lib/mesa/src/gallium/auxiliary/util/u_screen.c
+++ b/lib/mesa/src/gallium/auxiliary/util/u_screen.c
@@ -433,6 +433,9 @@ u_pipe_screen_get_param_defaults(struct pipe_screen *pscreen,
case PIPE_CAP_ALPHA_TO_COVERAGE_DITHER_CONTROL:
return 0;
+ case PIPE_CAP_NO_CLIP_ON_COPY_TEX:
+ return 0;
+
default:
unreachable("bad PIPE_CAP_*");
}
diff --git a/lib/mesa/src/gallium/drivers/panfrost/pan_blend_cso.c b/lib/mesa/src/gallium/drivers/panfrost/pan_blend_cso.c
index d0824ed48..52575cb03 100644
--- a/lib/mesa/src/gallium/drivers/panfrost/pan_blend_cso.c
+++ b/lib/mesa/src/gallium/drivers/panfrost/pan_blend_cso.c
@@ -166,7 +166,7 @@ panfrost_delete_blend_state(struct pipe_context *pipe,
{
struct panfrost_blend_state *blend = (struct panfrost_blend_state *) cso;
- for (unsigned c = 0; c < 4; ++c) {
+ for (unsigned c = 0; c < PIPE_MAX_COLOR_BUFS; ++c) {
struct panfrost_blend_rt *rt = &blend->rt[c];
_mesa_hash_table_u64_clear(rt->shaders, panfrost_delete_blend_shader);
}
diff --git a/lib/mesa/src/gallium/drivers/panfrost/pan_job.c b/lib/mesa/src/gallium/drivers/panfrost/pan_job.c
index 27745c742..1ef4de1bb 100644
--- a/lib/mesa/src/gallium/drivers/panfrost/pan_job.c
+++ b/lib/mesa/src/gallium/drivers/panfrost/pan_job.c
@@ -178,6 +178,8 @@ panfrost_free_batch(struct panfrost_batch *batch)
panfrost_batch_fence_unreference(*dep);
}
+ util_dynarray_fini(&batch->dependencies);
+
/* The out_sync fence lifetime is different from the the batch one
* since other batches might want to wait on a fence of already
* submitted/signaled batch. All we need to do here is make sure the
diff --git a/lib/mesa/src/gallium/drivers/radeonsi/si_debug_options.h b/lib/mesa/src/gallium/drivers/radeonsi/si_debug_options.h
index 83c7425e0..febb31357 100644
--- a/lib/mesa/src/gallium/drivers/radeonsi/si_debug_options.h
+++ b/lib/mesa/src/gallium/drivers/radeonsi/si_debug_options.h
@@ -7,5 +7,6 @@ OPT_BOOL(halt_shaders, false, "Halt shaders at the start (will hang)")
OPT_BOOL(vs_fetch_always_opencode, false,
"Always open code vertex fetches (less efficient, purely for testing)")
OPT_BOOL(prim_restart_tri_strips_only, false, "Only enable primitive restart for triangle strips")
+OPT_BOOL(clamp_div_by_zero, false, "Clamp div by zero (x / 0 becomes FLT_MAX instead of NaN)")
#undef OPT_BOOL
diff --git a/lib/mesa/src/gallium/drivers/radeonsi/si_get.c b/lib/mesa/src/gallium/drivers/radeonsi/si_get.c
index 9a10a82e0..9b47fe236 100644
--- a/lib/mesa/src/gallium/drivers/radeonsi/si_get.c
+++ b/lib/mesa/src/gallium/drivers/radeonsi/si_get.c
@@ -162,6 +162,7 @@ static int si_get_param(struct pipe_screen *pscreen, enum pipe_cap param)
case PIPE_CAP_DRAW_INFO_START_WITH_USER_INDICES:
case PIPE_CAP_ALPHA_TO_COVERAGE_DITHER_CONTROL:
case PIPE_CAP_MAP_UNSYNCHRONIZED_THREAD_SAFE:
+ case PIPE_CAP_NO_CLIP_ON_COPY_TEX:
return 1;
case PIPE_CAP_QUERY_SO_OVERFLOW:
diff --git a/lib/mesa/src/gallium/drivers/radeonsi/si_shader_llvm.c b/lib/mesa/src/gallium/drivers/radeonsi/si_shader_llvm.c
index 63c9c033a..e200114ef 100644
--- a/lib/mesa/src/gallium/drivers/radeonsi/si_shader_llvm.c
+++ b/lib/mesa/src/gallium/drivers/radeonsi/si_shader_llvm.c
@@ -452,6 +452,7 @@ bool si_nir_build_llvm(struct si_shader_context *ctx, struct nir_shader *nir)
ctx->abi.inputs = &ctx->inputs[0];
ctx->abi.clamp_shadow_reference = true;
ctx->abi.robust_buffer_access = true;
+ ctx->abi.clamp_div_by_zero = ctx->screen->options.clamp_div_by_zero;
if (ctx->shader->selector->info.properties[TGSI_PROPERTY_CS_LOCAL_SIZE]) {
assert(gl_shader_stage_is_compute(nir->info.stage));
diff --git a/lib/mesa/src/gallium/drivers/radeonsi/si_shader_llvm_tess.c b/lib/mesa/src/gallium/drivers/radeonsi/si_shader_llvm_tess.c
index 5dba98599..26b0d0cb5 100644
--- a/lib/mesa/src/gallium/drivers/radeonsi/si_shader_llvm_tess.c
+++ b/lib/mesa/src/gallium/drivers/radeonsi/si_shader_llvm_tess.c
@@ -513,7 +513,7 @@ static void si_nir_store_output_tcs(struct ac_shader_abi *abi, const struct nir_
{
struct si_shader_context *ctx = si_shader_context_from_abi(abi);
struct si_shader_info *info = &ctx->shader->selector->info;
- const unsigned component = var->data.location_frac;
+ unsigned component = var->data.location_frac;
unsigned driver_location = var->data.driver_location;
LLVMValueRef dw_addr, stride;
LLVMValueRef buffer, base, addr;
@@ -521,6 +521,12 @@ static void si_nir_store_output_tcs(struct ac_shader_abi *abi, const struct nir_
bool skip_lds_store;
bool is_tess_factor = false, is_tess_inner = false;
+ if (var->data.compact) {
+ component += const_index;
+ writemask <<= const_index;
+ const_index = 0;
+ }
+
driver_location = driver_location / 4;
ubyte name = info->output_semantic_name[driver_location];
ubyte index = info->output_semantic_index[driver_location];
diff --git a/lib/mesa/src/gallium/drivers/v3d/v3dx_rcl.c b/lib/mesa/src/gallium/drivers/v3d/v3dx_rcl.c
index 0582e9aba..739088ec3 100644
--- a/lib/mesa/src/gallium/drivers/v3d/v3dx_rcl.c
+++ b/lib/mesa/src/gallium/drivers/v3d/v3dx_rcl.c
@@ -440,6 +440,13 @@ v3d_rcl_emit_generic_per_tile_list(struct v3d_job *job, int layer)
fmt.primitive_type = LIST_TRIANGLES;
}
+#if V3D_VERSION >= 41
+ /* PTB assumes that value to be 0, but hw will not set it. */
+ cl_emit(cl, SET_INSTANCEID, set) {
+ set.instance_id = 0;
+ }
+#endif
+
cl_emit(cl, BRANCH_TO_IMPLICIT_TILE_LIST, branch);
v3d_rcl_emit_stores(job, cl, layer);
diff --git a/lib/mesa/src/gallium/state_trackers/clover/spirv/invocation.cpp b/lib/mesa/src/gallium/state_trackers/clover/spirv/invocation.cpp
index 01ced45c1..a37f42fc7 100644
--- a/lib/mesa/src/gallium/state_trackers/clover/spirv/invocation.cpp
+++ b/lib/mesa/src/gallium/state_trackers/clover/spirv/invocation.cpp
@@ -22,7 +22,6 @@
#include "invocation.hpp"
-#include <tuple>
#include <unordered_map>
#include <unordered_set>
#include <vector>
diff --git a/lib/mesa/src/intel/compiler/brw_nir_lower_alpha_to_coverage.c b/lib/mesa/src/intel/compiler/brw_nir_lower_alpha_to_coverage.c
index 660d218e7..d31384e56 100644
--- a/lib/mesa/src/intel/compiler/brw_nir_lower_alpha_to_coverage.c
+++ b/lib/mesa/src/intel/compiler/brw_nir_lower_alpha_to_coverage.c
@@ -56,114 +56,134 @@
* 1.0000 1111111111111111
*/
static nir_ssa_def *
-build_dither_mask(nir_builder b, nir_intrinsic_instr *store_instr)
+build_dither_mask(nir_builder *b, nir_ssa_def *color)
{
- nir_ssa_def *alpha =
- nir_channel(&b, nir_ssa_for_src(&b, store_instr->src[0], 4), 3);
+ assert(color->num_components == 4);
+ nir_ssa_def *alpha = nir_channel(b, color, 3);
nir_ssa_def *m =
- nir_f2i32(&b, nir_fmul_imm(&b, nir_fsat(&b, alpha), 16.0));
+ nir_f2i32(b, nir_fmul_imm(b, nir_fsat(b, alpha), 16.0));
nir_ssa_def *part_a =
- nir_iand(&b,
- nir_imm_int(&b, 0xf),
- nir_ushr(&b,
- nir_imm_int(&b, 0xfea80),
- nir_iand(&b, m, nir_imm_int(&b, ~3))));
+ nir_iand(b,
+ nir_imm_int(b, 0xf),
+ nir_ushr(b,
+ nir_imm_int(b, 0xfea80),
+ nir_iand(b, m, nir_imm_int(b, ~3))));
- nir_ssa_def *part_b = nir_iand(&b, m, nir_imm_int(&b, 2));
+ nir_ssa_def *part_b = nir_iand(b, m, nir_imm_int(b, 2));
- nir_ssa_def *part_c = nir_iand(&b, m, nir_imm_int(&b, 1));
+ nir_ssa_def *part_c = nir_iand(b, m, nir_imm_int(b, 1));
- return nir_ior(&b,
- nir_imul_imm(&b, part_a, 0x1111),
- nir_ior(&b,
- nir_imul_imm(&b, part_b, 0x0808),
- nir_imul_imm(&b, part_c, 0x0100)));
+ return nir_ior(b,
+ nir_imul_imm(b, part_a, 0x1111),
+ nir_ior(b,
+ nir_imul_imm(b, part_b, 0x0808),
+ nir_imul_imm(b, part_c, 0x0100)));
}
-void
+bool
brw_nir_lower_alpha_to_coverage(nir_shader *shader)
{
assert(shader->info.stage == MESA_SHADER_FRAGMENT);
-
- /* Bail out early if we don't have gl_SampleMask */
- bool is_sample_mask = false;
- nir_foreach_variable(var, &shader->outputs) {
- if (var->data.location == FRAG_RESULT_SAMPLE_MASK) {
- is_sample_mask = true;
- break;
- }
- }
-
- if (!is_sample_mask)
- return;
-
- nir_foreach_function(function, shader) {
- nir_function_impl *impl = function->impl;
- nir_builder b;
- nir_builder_init(&b, impl);
-
- nir_foreach_block(block, impl) {
- nir_intrinsic_instr *sample_mask_instr = NULL;
- nir_intrinsic_instr *store_instr = NULL;
-
- nir_foreach_instr_safe(instr, block) {
- if (instr->type == nir_instr_type_intrinsic) {
- nir_intrinsic_instr *intr = nir_instr_as_intrinsic(instr);
- nir_variable *out = NULL;
-
- switch (intr->intrinsic) {
- case nir_intrinsic_store_output:
- nir_foreach_variable(var, &shader->outputs) {
- int drvloc = var->data.driver_location;
- if (nir_intrinsic_base(intr) == drvloc) {
- out = var;
- break;
- }
- }
-
- if (out->data.mode != nir_var_shader_out)
- continue;
-
- /* save gl_SampleMask instruction pointer */
- if (out->data.location == FRAG_RESULT_SAMPLE_MASK) {
- assert(!sample_mask_instr);
- sample_mask_instr = intr;
- }
-
- /* save out_color[0] instruction pointer */
- if ((out->data.location == FRAG_RESULT_COLOR ||
- out->data.location == FRAG_RESULT_DATA0)) {
- nir_src *offset_src = nir_get_io_offset_src(intr);
- if (nir_src_is_const(*offset_src) && nir_src_as_uint(*offset_src) == 0) {
- assert(!store_instr);
- store_instr = intr;
- }
- }
- break;
- default:
- continue;
- }
- }
+ nir_function_impl *impl = nir_shader_get_entrypoint(shader);
+
+ const uint64_t outputs_written = shader->info.outputs_written;
+ if (!(outputs_written & BITFIELD64_BIT(FRAG_RESULT_SAMPLE_MASK)) ||
+ !(outputs_written & (BITFIELD64_BIT(FRAG_RESULT_COLOR) |
+ BITFIELD64_BIT(FRAG_RESULT_DATA0))))
+ goto skip;
+
+ nir_intrinsic_instr *sample_mask_write = NULL;
+ nir_intrinsic_instr *color0_write = NULL;
+ bool sample_mask_write_first = false;
+
+ nir_foreach_block(block, impl) {
+ nir_foreach_instr_safe(instr, block) {
+ if (instr->type != nir_instr_type_intrinsic)
+ continue;
+
+ nir_intrinsic_instr *intrin = nir_instr_as_intrinsic(instr);
+ if (intrin->intrinsic != nir_intrinsic_store_output)
+ continue;
+
+ /* We call nir_lower_io_to_temporaries to lower FS outputs to
+ * temporaries with a copy at the end so this should be the last
+ * block in the shader.
+ */
+ assert(block->cf_node.parent == &impl->cf_node);
+ assert(nir_cf_node_is_last(&block->cf_node));
+
+ /* See store_output in fs_visitor::nir_emit_fs_intrinsic */
+ const unsigned store_offset = nir_src_as_uint(intrin->src[1]);
+ const unsigned driver_location = nir_intrinsic_base(intrin) +
+ SET_FIELD(store_offset, BRW_NIR_FRAG_OUTPUT_LOCATION);
+
+ /* Extract the FRAG_RESULT */
+ const unsigned location =
+ GET_FIELD(driver_location, BRW_NIR_FRAG_OUTPUT_LOCATION);
+
+ if (location == FRAG_RESULT_SAMPLE_MASK) {
+ assert(sample_mask_write == NULL);
+ sample_mask_write = intrin;
+ sample_mask_write_first = (color0_write == NULL);
}
- if (sample_mask_instr && store_instr) {
- b.cursor = nir_before_instr(&store_instr->instr);
- nir_ssa_def *dither_mask = build_dither_mask(b, store_instr);
-
- /* Combine dither_mask and reorder gl_SampleMask store instruction
- * after render target 0 store instruction.
- */
- nir_instr_remove(&sample_mask_instr->instr);
- dither_mask = nir_iand(&b, sample_mask_instr->src[0].ssa, dither_mask);
- nir_instr_insert_after(&store_instr->instr, &sample_mask_instr->instr);
- nir_instr_rewrite_src(&sample_mask_instr->instr,
- &sample_mask_instr->src[0],
- nir_src_for_ssa(dither_mask));
+ if (location == FRAG_RESULT_COLOR ||
+ location == FRAG_RESULT_DATA0) {
+ assert(color0_write == NULL);
+ color0_write = intrin;
}
}
- nir_metadata_preserve(impl, nir_metadata_block_index |
- nir_metadata_dominance);
}
+
+ /* It's possible that shader_info may be out-of-date and the writes to
+ * either gl_SampleMask or the first color value may have been removed.
+ * This can happen if, for instance a nir_ssa_undef is written to the
+ * color value. In that case, just bail and don't do anything rather
+ * than crashing.
+ */
+ if (color0_write == NULL || sample_mask_write == NULL)
+ goto skip;
+
+ /* It's possible that the color value isn't actually a vec4. In this case,
+ * assuming an alpha of 1.0 and letting the sample mask pass through
+ * unaltered seems like the kindest thing to do to apps.
+ */
+ assert(color0_write->src[0].is_ssa);
+ nir_ssa_def *color0 = color0_write->src[0].ssa;
+ if (color0->num_components < 4)
+ goto skip;
+
+ assert(sample_mask_write->src[0].is_ssa);
+ nir_ssa_def *sample_mask = sample_mask_write->src[0].ssa;
+
+ if (sample_mask_write_first) {
+ /* If the sample mask write comes before the write to color0, we need
+ * to move it because it's going to use the value from color0 to
+ * compute the sample mask.
+ */
+ nir_instr_remove(&sample_mask_write->instr);
+ nir_instr_insert(nir_after_instr(&color0_write->instr),
+ &sample_mask_write->instr);
+ }
+
+ nir_builder b;
+ nir_builder_init(&b, impl);
+
+ /* Combine dither_mask and the gl_SampleMask value */
+ b.cursor = nir_before_instr(&sample_mask_write->instr);
+ nir_ssa_def *dither_mask = build_dither_mask(&b, color0);
+ dither_mask = nir_iand(&b, sample_mask, dither_mask);
+ nir_instr_rewrite_src(&sample_mask_write->instr,
+ &sample_mask_write->src[0],
+ nir_src_for_ssa(dither_mask));
+
+ nir_metadata_preserve(impl, nir_metadata_block_index |
+ nir_metadata_dominance);
+ return true;
+
+skip:
+ nir_metadata_preserve(impl, nir_metadata_all);
+ return false;
}
diff --git a/lib/mesa/src/intel/perf/gen_perf.c b/lib/mesa/src/intel/perf/gen_perf.c
index 189f71f65..77b7f4d81 100644
--- a/lib/mesa/src/intel/perf/gen_perf.c
+++ b/lib/mesa/src/intel/perf/gen_perf.c
@@ -621,6 +621,19 @@ load_oa_metrics(struct gen_perf_config *perf, int fd,
else
enumerate_sysfs_metrics(perf);
+ /* Select a fallback OA metric. Look for the TestOa metric or use the last
+ * one if no present (on HSW).
+ */
+ for (int i = 0; i < perf->n_queries; i++) {
+ if (perf->queries[i].symbol_name &&
+ strcmp(perf->queries[i].symbol_name, "TestOa") == 0) {
+ perf->fallback_raw_oa_metric = perf->queries[i].oa_metrics_set_id;
+ break;
+ }
+ }
+ if (perf->fallback_raw_oa_metric == 0)
+ perf->fallback_raw_oa_metric = perf->queries[perf->n_queries - 1].oa_metrics_set_id;
+
return true;
}
diff --git a/lib/mesa/src/intel/perf/gen_perf.h b/lib/mesa/src/intel/perf/gen_perf.h
index a39091658..05029bc91 100644
--- a/lib/mesa/src/intel/perf/gen_perf.h
+++ b/lib/mesa/src/intel/perf/gen_perf.h
@@ -170,6 +170,7 @@ struct gen_perf_query_info {
GEN_PERF_QUERY_TYPE_PIPELINE,
} kind;
const char *name;
+ const char *symbol_name;
const char *guid;
struct gen_perf_query_counter *counters;
int n_counters;
@@ -227,6 +228,11 @@ struct gen_perf_config {
*/
struct hash_table *oa_metrics_table;
+ /* When MDAPI hasn't configured the metric we need to use by the time the
+ * query begins, this OA metric is used as a fallback.
+ */
+ uint64_t fallback_raw_oa_metric;
+
/* Location of the device's sysfs entry. */
char sysfs_dev_dir[256];
diff --git a/lib/mesa/src/intel/perf/gen_perf.py b/lib/mesa/src/intel/perf/gen_perf.py
index 9cdbfaaab..750b2537f 100644
--- a/lib/mesa/src/intel/perf/gen_perf.py
+++ b/lib/mesa/src/intel/perf/gen_perf.py
@@ -667,6 +667,7 @@ def main():
c(".kind = GEN_PERF_QUERY_TYPE_OA,\n")
c(".name = \"" + set.name + "\",\n")
+ c(".symbol_name = \"" + set.symbol_name + "\",\n")
c(".guid = \"" + set.hw_config_guid + "\",\n")
c(".counters = {0}_{1}_query_counters,".format(gen.chipset, set.underscore_name))
diff --git a/lib/mesa/src/intel/perf/gen_perf_query.c b/lib/mesa/src/intel/perf/gen_perf_query.c
index b9744913b..fb6e5d33e 100644
--- a/lib/mesa/src/intel/perf/gen_perf_query.c
+++ b/lib/mesa/src/intel/perf/gen_perf_query.c
@@ -423,7 +423,7 @@ get_metric_id(struct gen_perf_config *perf,
if (!gen_perf_load_metric_id(perf, query->guid,
&raw_query->oa_metrics_set_id)) {
DBG("Unable to read query guid=%s ID, falling back to test config\n", query->guid);
- raw_query->oa_metrics_set_id = 1ULL;
+ raw_query->oa_metrics_set_id = perf->fallback_raw_oa_metric;
} else {
DBG("Raw query '%s'guid=%s loaded ID: %"PRIu64"\n",
query->name, query->guid, query->oa_metrics_set_id);