Import Mesa 13.0.2

1 files changed, 22 insertions, 21 deletions

diff --git a/lib/mesa/src/mesa/drivers/dri/i965/hsw_sol.c b/lib/mesa/src/mesa/drivers/dri/i965/hsw_sol.c
index 5c8fc7fa1..e299b0227 100644
--- a/lib/mesa/src/mesa/drivers/dri/i965/hsw_sol.c
+++ b/lib/mesa/src/mesa/drivers/dri/i965/hsw_sol.c
@@ -31,8 +31,8 @@
 #include "brw_context.h"
 #include "brw_state.h"
 #include "brw_defines.h"
-#include "brw_batch.h"
-#include "brw_buffer_objects.h"
+#include "intel_batchbuffer.h"
+#include "intel_buffer_objects.h"
 #include "main/transformfeedback.h"
 
 /**
@@ -64,7 +64,7 @@ save_prim_start_values(struct brw_context *brw,
    /* Emit MI_STORE_REGISTER_MEM commands to write the values. */
    for (int i = 0; i < BRW_MAX_XFB_STREAMS; i++) {
       brw_store_register_mem64(brw, obj->prim_count_bo,
-                               GFX7_SO_NUM_PRIMS_WRITTEN(i),
+                               GEN7_SO_NUM_PRIMS_WRITTEN(i),
                                START_OFFSET + i * sizeof(uint64_t));
    }
 }
@@ -92,14 +92,17 @@ tally_prims_written(struct brw_context *brw,
       /* GPR0 = Tally */
       brw_load_register_imm32(brw, HSW_CS_GPR(0) + 4, 0);
       brw_load_register_mem(brw, HSW_CS_GPR(0), obj->prim_count_bo,
+                            I915_GEM_DOMAIN_INSTRUCTION,
+                            I915_GEM_DOMAIN_INSTRUCTION,
                             TALLY_OFFSET + i * sizeof(uint32_t));
       if (!obj->base.Paused) {
          /* GPR1 = Start Snapshot */
          brw_load_register_mem64(brw, HSW_CS_GPR(1), obj->prim_count_bo,
+                                 I915_GEM_DOMAIN_INSTRUCTION,
+                                 I915_GEM_DOMAIN_INSTRUCTION,
                                  START_OFFSET + i * sizeof(uint64_t));
          /* GPR2 = Ending Snapshot */
-         brw_load_register_reg64(brw, HSW_CS_GPR(2),
-                                 GFX7_SO_NUM_PRIMS_WRITTEN(i));
+         brw_load_register_reg64(brw, GEN7_SO_NUM_PRIMS_WRITTEN(i), HSW_CS_GPR(2));
 
          BEGIN_BATCH(9);
          OUT_BATCH(HSW_MI_MATH | (9 - 2));
@@ -162,18 +165,17 @@ hsw_begin_transform_feedback(struct gl_context *ctx, GLenum mode,
    struct brw_context *brw = brw_context(ctx);
    struct brw_transform_feedback_object *brw_obj =
       (struct brw_transform_feedback_object *) obj;
-   const struct intel_device_info *devinfo = &brw->screen->devinfo;
 
    brw_obj->primitive_mode = mode;
 
    /* Reset the SO buffer offsets to 0. */
-   if (devinfo->ver >= 8) {
+   if (brw->gen >= 8) {
       brw_obj->zero_offsets = true;
    } else {
       BEGIN_BATCH(1 + 2 * BRW_MAX_XFB_STREAMS);
       OUT_BATCH(MI_LOAD_REGISTER_IMM | (1 + 2 * BRW_MAX_XFB_STREAMS - 2));
       for (int i = 0; i < BRW_MAX_XFB_STREAMS; i++) {
-         OUT_BATCH(GFX7_SO_WRITE_OFFSET(i));
+         OUT_BATCH(GEN7_SO_WRITE_OFFSET(i));
          OUT_BATCH(0);
       }
       ADVANCE_BATCH();
@@ -197,18 +199,16 @@ hsw_pause_transform_feedback(struct gl_context *ctx,
    struct brw_context *brw = brw_context(ctx);
    struct brw_transform_feedback_object *brw_obj =
       (struct brw_transform_feedback_object *) obj;
-   const struct intel_device_info *devinfo = &brw->screen->devinfo;
-
-   if (devinfo->is_haswell) {
-      /* Flush any drawing so that the counters have the right values. */
-      brw_emit_mi_flush(brw);
 
+   if (brw->is_haswell) {
       /* Save the SOL buffer offset register values. */
       for (int i = 0; i < BRW_MAX_XFB_STREAMS; i++) {
          BEGIN_BATCH(3);
          OUT_BATCH(MI_STORE_REGISTER_MEM | (3 - 2));
-         OUT_BATCH(GFX7_SO_WRITE_OFFSET(i));
-         OUT_RELOC(brw_obj->offset_bo, RELOC_WRITE, i * sizeof(uint32_t));
+         OUT_BATCH(GEN7_SO_WRITE_OFFSET(i));
+         OUT_RELOC(brw_obj->offset_bo,
+                   I915_GEM_DOMAIN_INSTRUCTION, I915_GEM_DOMAIN_INSTRUCTION,
+                   i * sizeof(uint32_t));
          ADVANCE_BATCH();
       }
    }
@@ -227,15 +227,16 @@ hsw_resume_transform_feedback(struct gl_context *ctx,
    struct brw_context *brw = brw_context(ctx);
    struct brw_transform_feedback_object *brw_obj =
       (struct brw_transform_feedback_object *) obj;
-   const struct intel_device_info *devinfo = &brw->screen->devinfo;
 
-   if (devinfo->is_haswell) {
+   if (brw->is_haswell) {
       /* Reload the SOL buffer offset registers. */
       for (int i = 0; i < BRW_MAX_XFB_STREAMS; i++) {
          BEGIN_BATCH(3);
-         OUT_BATCH(GFX7_MI_LOAD_REGISTER_MEM | (3 - 2));
-         OUT_BATCH(GFX7_SO_WRITE_OFFSET(i));
-         OUT_RELOC(brw_obj->offset_bo, RELOC_WRITE, i * sizeof(uint32_t));
+         OUT_BATCH(GEN7_MI_LOAD_REGISTER_MEM | (3 - 2));
+         OUT_BATCH(GEN7_SO_WRITE_OFFSET(i));
+         OUT_RELOC(brw_obj->offset_bo,
+                   I915_GEM_DOMAIN_INSTRUCTION, I915_GEM_DOMAIN_INSTRUCTION,
+                   i * sizeof(uint32_t));
          ADVANCE_BATCH();
       }
    }
@@ -249,7 +250,7 @@ hsw_resume_transform_feedback(struct gl_context *ctx,
  */
 void
 hsw_end_transform_feedback(struct gl_context *ctx,
-                           struct gl_transform_feedback_object *obj)
+			    struct gl_transform_feedback_object *obj)
 {
    struct brw_context *brw = brw_context(ctx);
    struct brw_transform_feedback_object *brw_obj =