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authorJonathan Gray <jsg@cvs.openbsd.org>2023-02-27 12:42:15 +0000
committerJonathan Gray <jsg@cvs.openbsd.org>2023-02-27 12:42:15 +0000
commit2df15e320e9b2d437bbaaa621230d88e1613a91e (patch)
treea2fc45dd2abba18a1e16d13b3106eed068478607 /lib/libdrm
parent063b3c953168e33fb05bae894219ec61bc31d924 (diff)
Import libdrm 2.4.115
Diffstat (limited to 'lib/libdrm')
-rw-r--r--lib/libdrm/data/amdgpu.ids9
-rw-r--r--lib/libdrm/include/drm/drm_fourcc.h63
-rw-r--r--lib/libdrm/intel/Makefile.sources2
-rw-r--r--lib/libdrm/intel/meson.build2
-rw-r--r--lib/libdrm/meson.build2
-rw-r--r--lib/libdrm/tests/amdgpu/basic_tests.c4
-rw-r--r--lib/libdrm/tests/amdgpu/jpeg_tests.c2
7 files changed, 73 insertions, 11 deletions
diff --git a/lib/libdrm/data/amdgpu.ids b/lib/libdrm/data/amdgpu.ids
index abf3d6941..53cf61cbb 100644
--- a/lib/libdrm/data/amdgpu.ids
+++ b/lib/libdrm/data/amdgpu.ids
@@ -351,9 +351,13 @@
7347, 00, AMD Radeon Pro W5500M
7360, 41, AMD Radeon Pro 5600M
7360, C3, AMD Radeon Pro V520
+7362, C1, AMD Radeon Pro V540
+7362, C3, AMD Radeon Pro V520
738C, 01, AMD Instinct MI100
+73A1, 00, AMD Radeon Pro V620
73A3, 00, AMD Radeon Pro W6800
73A5, C0, AMD Radeon RX 6950 XT
+73AE, 00, AMD Radeon Pro V620
73AF, C0, AMD Radeon RX 6900 XT
73BF, C0, AMD Radeon RX 6900 XT
73BF, C1, AMD Radeon RX 6800 XT
@@ -388,7 +392,12 @@
743F, C3, AMD Radeon RX 6500
743F, C3, AMD Radeon RX 6500M
743F, C7, AMD Radeon RX 6400
+743F, C8, AMD Radeon RX 6500M
+743F, CC, AMD Radeon 6550S
743F, CF, AMD Radeon RX 6300M
+743F, D7, AMD Radeon RX 6400
+744C, C8, AMD Radeon RX 7900 XTX
+744C, CC, AMD Radeon RX 7900 XT
9830, 00, AMD Radeon HD 8400 / R3 Series
9831, 00, AMD Radeon HD 8400E
9832, 00, AMD Radeon HD 8330
diff --git a/lib/libdrm/include/drm/drm_fourcc.h b/lib/libdrm/include/drm/drm_fourcc.h
index 2c9051ffb..0e70e36cd 100644
--- a/lib/libdrm/include/drm/drm_fourcc.h
+++ b/lib/libdrm/include/drm/drm_fourcc.h
@@ -99,18 +99,42 @@ extern "C" {
#define DRM_FORMAT_INVALID 0
/* color index */
+#define DRM_FORMAT_C1 fourcc_code('C', '1', ' ', ' ') /* [7:0] C0:C1:C2:C3:C4:C5:C6:C7 1:1:1:1:1:1:1:1 eight pixels/byte */
+#define DRM_FORMAT_C2 fourcc_code('C', '2', ' ', ' ') /* [7:0] C0:C1:C2:C3 2:2:2:2 four pixels/byte */
+#define DRM_FORMAT_C4 fourcc_code('C', '4', ' ', ' ') /* [7:0] C0:C1 4:4 two pixels/byte */
#define DRM_FORMAT_C8 fourcc_code('C', '8', ' ', ' ') /* [7:0] C */
-/* 8 bpp Red */
+/* 1 bpp Darkness (inverse relationship between channel value and brightness) */
+#define DRM_FORMAT_D1 fourcc_code('D', '1', ' ', ' ') /* [7:0] D0:D1:D2:D3:D4:D5:D6:D7 1:1:1:1:1:1:1:1 eight pixels/byte */
+
+/* 2 bpp Darkness (inverse relationship between channel value and brightness) */
+#define DRM_FORMAT_D2 fourcc_code('D', '2', ' ', ' ') /* [7:0] D0:D1:D2:D3 2:2:2:2 four pixels/byte */
+
+/* 4 bpp Darkness (inverse relationship between channel value and brightness) */
+#define DRM_FORMAT_D4 fourcc_code('D', '4', ' ', ' ') /* [7:0] D0:D1 4:4 two pixels/byte */
+
+/* 8 bpp Darkness (inverse relationship between channel value and brightness) */
+#define DRM_FORMAT_D8 fourcc_code('D', '8', ' ', ' ') /* [7:0] D */
+
+/* 1 bpp Red (direct relationship between channel value and brightness) */
+#define DRM_FORMAT_R1 fourcc_code('R', '1', ' ', ' ') /* [7:0] R0:R1:R2:R3:R4:R5:R6:R7 1:1:1:1:1:1:1:1 eight pixels/byte */
+
+/* 2 bpp Red (direct relationship between channel value and brightness) */
+#define DRM_FORMAT_R2 fourcc_code('R', '2', ' ', ' ') /* [7:0] R0:R1:R2:R3 2:2:2:2 four pixels/byte */
+
+/* 4 bpp Red (direct relationship between channel value and brightness) */
+#define DRM_FORMAT_R4 fourcc_code('R', '4', ' ', ' ') /* [7:0] R0:R1 4:4 two pixels/byte */
+
+/* 8 bpp Red (direct relationship between channel value and brightness) */
#define DRM_FORMAT_R8 fourcc_code('R', '8', ' ', ' ') /* [7:0] R */
-/* 10 bpp Red */
+/* 10 bpp Red (direct relationship between channel value and brightness) */
#define DRM_FORMAT_R10 fourcc_code('R', '1', '0', ' ') /* [15:0] x:R 6:10 little endian */
-/* 12 bpp Red */
+/* 12 bpp Red (direct relationship between channel value and brightness) */
#define DRM_FORMAT_R12 fourcc_code('R', '1', '2', ' ') /* [15:0] x:R 4:12 little endian */
-/* 16 bpp Red */
+/* 16 bpp Red (direct relationship between channel value and brightness) */
#define DRM_FORMAT_R16 fourcc_code('R', '1', '6', ' ') /* [15:0] R little endian */
/* 16 bpp RG */
@@ -205,7 +229,9 @@ extern "C" {
#define DRM_FORMAT_VYUY fourcc_code('V', 'Y', 'U', 'Y') /* [31:0] Y1:Cb0:Y0:Cr0 8:8:8:8 little endian */
#define DRM_FORMAT_AYUV fourcc_code('A', 'Y', 'U', 'V') /* [31:0] A:Y:Cb:Cr 8:8:8:8 little endian */
+#define DRM_FORMAT_AVUY8888 fourcc_code('A', 'V', 'U', 'Y') /* [31:0] A:Cr:Cb:Y 8:8:8:8 little endian */
#define DRM_FORMAT_XYUV8888 fourcc_code('X', 'Y', 'U', 'V') /* [31:0] X:Y:Cb:Cr 8:8:8:8 little endian */
+#define DRM_FORMAT_XVUY8888 fourcc_code('X', 'V', 'U', 'Y') /* [31:0] X:Cr:Cb:Y 8:8:8:8 little endian */
#define DRM_FORMAT_VUY888 fourcc_code('V', 'U', '2', '4') /* [23:0] Cr:Cb:Y 8:8:8 little endian */
#define DRM_FORMAT_VUY101010 fourcc_code('V', 'U', '3', '0') /* Y followed by U then V, 10:10:10. Non-linear modifier only */
@@ -718,6 +744,35 @@ extern "C" {
*/
#define DRM_FORMAT_MOD_VIVANTE_SPLIT_SUPER_TILED fourcc_mod_code(VIVANTE, 4)
+/*
+ * Vivante TS (tile-status) buffer modifiers. They can be combined with all of
+ * the color buffer tiling modifiers defined above. When TS is present it's a
+ * separate buffer containing the clear/compression status of each tile. The
+ * modifiers are defined as VIVANTE_MOD_TS_c_s, where c is the color buffer
+ * tile size in bytes covered by one entry in the status buffer and s is the
+ * number of status bits per entry.
+ * We reserve the top 8 bits of the Vivante modifier space for tile status
+ * clear/compression modifiers, as future cores might add some more TS layout
+ * variations.
+ */
+#define VIVANTE_MOD_TS_64_4 (1ULL << 48)
+#define VIVANTE_MOD_TS_64_2 (2ULL << 48)
+#define VIVANTE_MOD_TS_128_4 (3ULL << 48)
+#define VIVANTE_MOD_TS_256_4 (4ULL << 48)
+#define VIVANTE_MOD_TS_MASK (0xfULL << 48)
+
+/*
+ * Vivante compression modifiers. Those depend on a TS modifier being present
+ * as the TS bits get reinterpreted as compression tags instead of simple
+ * clear markers when compression is enabled.
+ */
+#define VIVANTE_MOD_COMP_DEC400 (1ULL << 52)
+#define VIVANTE_MOD_COMP_MASK (0xfULL << 52)
+
+/* Masking out the extension bits will yield the base modifier. */
+#define VIVANTE_MOD_EXT_MASK (VIVANTE_MOD_TS_MASK | \
+ VIVANTE_MOD_COMP_MASK)
+
/* NVIDIA frame buffer modifiers */
/*
diff --git a/lib/libdrm/intel/Makefile.sources b/lib/libdrm/intel/Makefile.sources
index aa27e2737..6947ab742 100644
--- a/lib/libdrm/intel/Makefile.sources
+++ b/lib/libdrm/intel/Makefile.sources
@@ -1,12 +1,10 @@
LIBDRM_INTEL_FILES := \
- i915_pciids.h \
intel_bufmgr.c \
intel_bufmgr_priv.h \
intel_bufmgr_fake.c \
intel_bufmgr_gem.c \
intel_decode.c \
intel_chipset.h \
- intel_chipset.c \
mm.c \
mm.h \
uthash.h
diff --git a/lib/libdrm/intel/meson.build b/lib/libdrm/intel/meson.build
index e6550daaa..beea42a6b 100644
--- a/lib/libdrm/intel/meson.build
+++ b/lib/libdrm/intel/meson.build
@@ -23,7 +23,7 @@ libdrm_intel = library(
[
files(
'intel_bufmgr.c', 'intel_bufmgr_fake.c', 'intel_bufmgr_gem.c',
- 'intel_decode.c', 'mm.c', 'intel_chipset.c',
+ 'intel_decode.c', 'mm.c',
),
config_file,
],
diff --git a/lib/libdrm/meson.build b/lib/libdrm/meson.build
index 3ff6bfaa2..8dcacb94e 100644
--- a/lib/libdrm/meson.build
+++ b/lib/libdrm/meson.build
@@ -21,7 +21,7 @@
project(
'libdrm',
['c'],
- version : '2.4.114',
+ version : '2.4.115',
license : 'MIT',
meson_version : '>= 0.53',
default_options : ['buildtype=debugoptimized', 'c_std=c11'],
diff --git a/lib/libdrm/tests/amdgpu/basic_tests.c b/lib/libdrm/tests/amdgpu/basic_tests.c
index 42176c007..0e4a357bb 100644
--- a/lib/libdrm/tests/amdgpu/basic_tests.c
+++ b/lib/libdrm/tests/amdgpu/basic_tests.c
@@ -1293,7 +1293,7 @@ static void amdgpu_semaphore_test(void)
fence_status.ip_instance = 0;
fence_status.fence = ibs_request[1].seq_no;
r = amdgpu_cs_query_fence_status(&fence_status,
- 500000000, 0, &expired);
+ AMDGPU_TIMEOUT_INFINITE, 0, &expired);
CU_ASSERT_EQUAL(r, 0);
CU_ASSERT_EQUAL(expired, true);
@@ -1334,7 +1334,7 @@ static void amdgpu_semaphore_test(void)
fence_status.ip_instance = 0;
fence_status.fence = ibs_request[1].seq_no;
r = amdgpu_cs_query_fence_status(&fence_status,
- 500000000, 0, &expired);
+ AMDGPU_TIMEOUT_INFINITE, 0, &expired);
CU_ASSERT_EQUAL(r, 0);
CU_ASSERT_EQUAL(expired, true);
diff --git a/lib/libdrm/tests/amdgpu/jpeg_tests.c b/lib/libdrm/tests/amdgpu/jpeg_tests.c
index 772a4fecd..eccbfeb17 100644
--- a/lib/libdrm/tests/amdgpu/jpeg_tests.c
+++ b/lib/libdrm/tests/amdgpu/jpeg_tests.c
@@ -181,7 +181,7 @@ CU_BOOL suite_jpeg_tests_enable(void)
if (info.hw_ip_version_major == 1)
jpeg_direct_reg = false;
- else if (info.hw_ip_version_major > 1 && info.hw_ip_version_major <= 3)
+ else if (info.hw_ip_version_major > 1 && info.hw_ip_version_major <= 4)
jpeg_direct_reg = true;
else
return CU_FALSE;