Import Mesa 13.0.2

1 files changed, 1258 insertions, 2716 deletions

diff --git a/lib/mesa/src/amd/common/ac_nir_to_llvm.c b/lib/mesa/src/amd/common/ac_nir_to_llvm.c
index 791359aee..0daef08cf 100644
--- a/lib/mesa/src/amd/common/ac_nir_to_llvm.c
+++ b/lib/mesa/src/amd/common/ac_nir_to_llvm.c
@@ -22,8 +22,6 @@
  */
 
 #include "ac_nir_to_llvm.h"
-#include "ac_llvm_build.h"
-#include "ac_llvm_util.h"
 #include "ac_binary.h"
 #include "sid.h"
 #include "nir/nir.h"
@@ -52,7 +50,6 @@ enum desc_type {
 };
 
 struct nir_to_llvm_context {
-	struct ac_llvm_context ac;
 	const struct ac_nir_compiler_options *options;
 	struct ac_shader_variant_info *shader_info;
 
@@ -64,8 +61,7 @@ struct nir_to_llvm_context {
 	struct hash_table *defs;
 	struct hash_table *phis;
 
-	LLVMValueRef descriptor_sets[AC_UD_MAX_SETS];
-	LLVMValueRef ring_offsets;
+	LLVMValueRef descriptor_sets[4];
 	LLVMValueRef push_constants;
 	LLVMValueRef num_work_groups;
 	LLVMValueRef workgroup_ids;
@@ -75,46 +71,17 @@ struct nir_to_llvm_context {
 	LLVMValueRef vertex_buffers;
 	LLVMValueRef base_vertex;
 	LLVMValueRef start_instance;
-	LLVMValueRef draw_index;
 	LLVMValueRef vertex_id;
 	LLVMValueRef rel_auto_id;
 	LLVMValueRef vs_prim_id;
 	LLVMValueRef instance_id;
-	LLVMValueRef ls_out_layout;
-	LLVMValueRef es2gs_offset;
-
-	LLVMValueRef tcs_offchip_layout;
-	LLVMValueRef tcs_out_offsets;
-	LLVMValueRef tcs_out_layout;
-	LLVMValueRef tcs_in_layout;
-	LLVMValueRef oc_lds;
-	LLVMValueRef tess_factor_offset;
-	LLVMValueRef tcs_patch_id;
-	LLVMValueRef tcs_rel_ids;
-	LLVMValueRef tes_rel_patch_id;
-	LLVMValueRef tes_patch_id;
-	LLVMValueRef tes_u;
-	LLVMValueRef tes_v;
-
-	LLVMValueRef gsvs_ring_stride;
-	LLVMValueRef gsvs_num_entries;
-	LLVMValueRef gs2vs_offset;
-	LLVMValueRef gs_wave_id;
-	LLVMValueRef gs_vtx_offset[6];
-	LLVMValueRef gs_prim_id, gs_invocation_id;
-
-	LLVMValueRef esgs_ring;
-	LLVMValueRef gsvs_ring;
-	LLVMValueRef hs_ring_tess_offchip;
-	LLVMValueRef hs_ring_tess_factor;
 
 	LLVMValueRef prim_mask;
-	LLVMValueRef sample_pos_offset;
+	LLVMValueRef sample_positions;
 	LLVMValueRef persp_sample, persp_center, persp_centroid;
 	LLVMValueRef linear_sample, linear_center, linear_centroid;
 	LLVMValueRef front_face;
 	LLVMValueRef ancillary;
-	LLVMValueRef sample_coverage;
 	LLVMValueRef frag_pos[4];
 
 	LLVMBasicBlockRef continue_block;
@@ -129,7 +96,6 @@ struct nir_to_llvm_context {
 	LLVMTypeRef v3i32;
 	LLVMTypeRef v4i32;
 	LLVMTypeRef v8i32;
-	LLVMTypeRef f64;
 	LLVMTypeRef f32;
 	LLVMTypeRef f16;
 	LLVMTypeRef v2f32;
@@ -137,16 +103,18 @@ struct nir_to_llvm_context {
 	LLVMTypeRef v16i8;
 	LLVMTypeRef voidt;
 
-	LLVMValueRef i1true;
-	LLVMValueRef i1false;
 	LLVMValueRef i32zero;
 	LLVMValueRef i32one;
 	LLVMValueRef f32zero;
 	LLVMValueRef f32one;
 	LLVMValueRef v4f32empty;
 
+	unsigned range_md_kind;
 	unsigned uniform_md_kind;
+	unsigned fpmath_md_kind;
+	unsigned invariant_load_md_kind;
 	LLVMValueRef empty_md;
+	LLVMValueRef fpmath_md_2p5_ulp;
 	gl_shader_stage stage;
 
 	LLVMValueRef lds;
@@ -159,20 +127,21 @@ struct nir_to_llvm_context {
 	int num_locals;
 	LLVMValueRef *locals;
 	bool has_ddxy;
-	uint8_t num_output_clips;
-	uint8_t num_output_culls;
-
-	bool has_ds_bpermute;
-
-	bool is_gs_copy_shader;
-	LLVMValueRef gs_next_vertex;
-	unsigned gs_max_out_vertices;
+	unsigned num_clips;
+	unsigned num_culls;
+};
 
-	unsigned tes_primitive_mode;
-	uint64_t tess_outputs_written;
-	uint64_t tess_patch_outputs_written;
+struct ac_tex_info {
+	LLVMValueRef args[12];
+	int arg_count;
+	LLVMTypeRef dst_type;
+	bool has_offset;
 };
 
+static LLVMValueRef
+emit_llvm_intrinsic(struct nir_to_llvm_context *ctx, const char *name,
+                    LLVMTypeRef return_type, LLVMValueRef *params,
+                    unsigned param_count, LLVMAttribute attribs);
 static LLVMValueRef get_sampler_desc(struct nir_to_llvm_context *ctx,
 				     nir_deref_var *deref,
 				     enum desc_type desc_type);
@@ -181,28 +150,6 @@ static unsigned radeon_llvm_reg_index_soa(unsigned index, unsigned chan)
 	return (index * 4) + chan;
 }
 
-static unsigned shader_io_get_unique_index(gl_varying_slot slot)
-{
-	/* handle patch indices separate */
-	if (slot == VARYING_SLOT_TESS_LEVEL_OUTER)
-		return 0;
-	if (slot == VARYING_SLOT_TESS_LEVEL_INNER)
-		return 1;
-	if (slot >= VARYING_SLOT_PATCH0 && slot <= VARYING_SLOT_TESS_MAX)
-		return 2 + (slot - VARYING_SLOT_PATCH0);
-
-	if (slot == VARYING_SLOT_POS)
-		return 0;
-	if (slot == VARYING_SLOT_PSIZ)
-		return 1;
-	if (slot == VARYING_SLOT_CLIP_DIST0)
-		return 2;
-	/* 3 is reserved for clip dist as well */
-	if (slot >= VARYING_SLOT_VAR0 && slot <= VARYING_SLOT_VAR31)
-		return 4 + (slot - VARYING_SLOT_VAR0);
-	unreachable("illegal slot in get unique index\n");
-}
-
 static unsigned llvm_get_type_size(LLVMTypeRef type)
 {
 	LLVMTypeKind kind = LLVMGetTypeKind(type);
@@ -254,7 +201,7 @@ static LLVMValueRef
 create_llvm_function(LLVMContextRef ctx, LLVMModuleRef module,
                      LLVMBuilderRef builder, LLVMTypeRef *return_types,
                      unsigned num_return_elems, LLVMTypeRef *param_types,
-                     unsigned param_count, unsigned array_params_mask,
+                     unsigned param_count, unsigned array_params,
                      unsigned sgpr_params, bool unsafe_math)
 {
 	LLVMTypeRef main_function_type, ret_type;
@@ -277,14 +224,14 @@ create_llvm_function(LLVMContextRef ctx, LLVMModuleRef module,
 
 	LLVMSetFunctionCallConv(main_function, RADEON_LLVM_AMDGPU_CS);
 	for (unsigned i = 0; i < sgpr_params; ++i) {
-		if (array_params_mask & (1 << i)) {
-			LLVMValueRef P = LLVMGetParam(main_function, i);
-			ac_add_function_attr(ctx, main_function, i + 1, AC_FUNC_ATTR_BYVAL);
+		LLVMValueRef P = LLVMGetParam(main_function, i);
+
+		if (i < array_params) {
+			LLVMAddAttribute(P, LLVMByValAttribute);
 			ac_add_attr_dereferenceable(P, UINT64_MAX);
 		}
-		else {
-			ac_add_function_attr(ctx, main_function, i + 1, AC_FUNC_ATTR_INREG);
-		}
+		else
+			LLVMAddAttribute(P, LLVMInRegAttribute);
 	}
 
 	if (unsafe_math) {
@@ -319,7 +266,7 @@ static LLVMValueRef get_shared_memory_ptr(struct nir_to_llvm_context *ctx,
 	LLVMValueRef ptr;
 	int addr_space;
 
-	offset = LLVMConstInt(ctx->i32, idx * 16, false);
+	offset = LLVMConstInt(ctx->i32, idx, false);
 
 	ptr = ctx->shared_memory;
 	ptr = LLVMBuildGEP(ctx->builder, ptr, &offset, 1, "");
@@ -328,281 +275,75 @@ static LLVMValueRef get_shared_memory_ptr(struct nir_to_llvm_context *ctx,
 	return ptr;
 }
 
-static LLVMTypeRef to_integer_type_scalar(struct nir_to_llvm_context *ctx, LLVMTypeRef t)
-{
-	if (t == ctx->f16 || t == ctx->i16)
-		return ctx->i16;
-	else if (t == ctx->f32 || t == ctx->i32)
-		return ctx->i32;
-	else if (t == ctx->f64 || t == ctx->i64)
-		return ctx->i64;
-	else
-		unreachable("Unhandled integer size");
-}
-
-static LLVMTypeRef to_integer_type(struct nir_to_llvm_context *ctx, LLVMTypeRef t)
-{
-	if (LLVMGetTypeKind(t) == LLVMVectorTypeKind) {
-		LLVMTypeRef elem_type = LLVMGetElementType(t);
-		return LLVMVectorType(to_integer_type_scalar(ctx, elem_type),
-		                      LLVMGetVectorSize(t));
-	}
-	return to_integer_type_scalar(ctx, t);
-}
-
 static LLVMValueRef to_integer(struct nir_to_llvm_context *ctx, LLVMValueRef v)
 {
 	LLVMTypeRef type = LLVMTypeOf(v);
-	return LLVMBuildBitCast(ctx->builder, v, to_integer_type(ctx, type), "");
-}
-
-static LLVMTypeRef to_float_type_scalar(struct nir_to_llvm_context *ctx, LLVMTypeRef t)
-{
-	if (t == ctx->i16 || t == ctx->f16)
-		return ctx->f16;
-	else if (t == ctx->i32 || t == ctx->f32)
-		return ctx->f32;
-	else if (t == ctx->i64 || t == ctx->f64)
-		return ctx->f64;
-	else
-		unreachable("Unhandled float size");
-}
-
-static LLVMTypeRef to_float_type(struct nir_to_llvm_context *ctx, LLVMTypeRef t)
-{
-	if (LLVMGetTypeKind(t) == LLVMVectorTypeKind) {
-		LLVMTypeRef elem_type = LLVMGetElementType(t);
-		return LLVMVectorType(to_float_type_scalar(ctx, elem_type),
-		                      LLVMGetVectorSize(t));
+	if (type == ctx->f32) {
+		return LLVMBuildBitCast(ctx->builder, v, ctx->i32, "");
+	} else if (LLVMGetTypeKind(type) == LLVMVectorTypeKind) {
+		LLVMTypeRef elem_type = LLVMGetElementType(type);
+		if (elem_type == ctx->f32) {
+			LLVMTypeRef nt = LLVMVectorType(ctx->i32, LLVMGetVectorSize(type));
+			return LLVMBuildBitCast(ctx->builder, v, nt, "");
+		}
 	}
-	return to_float_type_scalar(ctx, t);
+	return v;
 }
 
 static LLVMValueRef to_float(struct nir_to_llvm_context *ctx, LLVMValueRef v)
 {
 	LLVMTypeRef type = LLVMTypeOf(v);
-	return LLVMBuildBitCast(ctx->builder, v, to_float_type(ctx, type), "");
-}
-
-static int get_elem_bits(struct nir_to_llvm_context *ctx, LLVMTypeRef type)
-{
-	if (LLVMGetTypeKind(type) == LLVMVectorTypeKind)
-		type = LLVMGetElementType(type);
-
-	if (LLVMGetTypeKind(type) == LLVMIntegerTypeKind)
-		return LLVMGetIntTypeWidth(type);
-
-	if (type == ctx->f16)
-		return 16;
-	if (type == ctx->f32)
-		return 32;
-	if (type == ctx->f64)
-		return 64;
-
-	unreachable("Unhandled type kind in get_elem_bits");
-}
-
-static LLVMValueRef unpack_param(struct nir_to_llvm_context *ctx,
-				 LLVMValueRef param, unsigned rshift,
-				 unsigned bitwidth)
-{
-	LLVMValueRef value = param;
-	if (rshift)
-		value = LLVMBuildLShr(ctx->builder, value,
-				      LLVMConstInt(ctx->i32, rshift, false), "");
-
-	if (rshift + bitwidth < 32) {
-		unsigned mask = (1 << bitwidth) - 1;
-		value = LLVMBuildAnd(ctx->builder, value,
-				     LLVMConstInt(ctx->i32, mask, false), "");
-	}
-	return value;
-}
-
-static LLVMValueRef get_rel_patch_id(struct nir_to_llvm_context *ctx)
-{
-	switch (ctx->stage) {
-	case MESA_SHADER_TESS_CTRL:
-		return unpack_param(ctx, ctx->tcs_rel_ids, 0, 8);
-	case MESA_SHADER_TESS_EVAL:
-		return ctx->tes_rel_patch_id;
-		break;
-	default:
-		unreachable("Illegal stage");
-	}
-}
-
-/* Tessellation shaders pass outputs to the next shader using LDS.
- *
- * LS outputs = TCS inputs
- * TCS outputs = TES inputs
- *
- * The LDS layout is:
- * - TCS inputs for patch 0
- * - TCS inputs for patch 1
- * - TCS inputs for patch 2		= get_tcs_in_current_patch_offset (if RelPatchID==2)
- * - ...
- * - TCS outputs for patch 0            = get_tcs_out_patch0_offset
- * - Per-patch TCS outputs for patch 0  = get_tcs_out_patch0_patch_data_offset
- * - TCS outputs for patch 1
- * - Per-patch TCS outputs for patch 1
- * - TCS outputs for patch 2            = get_tcs_out_current_patch_offset (if RelPatchID==2)
- * - Per-patch TCS outputs for patch 2  = get_tcs_out_current_patch_data_offset (if RelPatchID==2)
- * - ...
- *
- * All three shaders VS(LS), TCS, TES share the same LDS space.
- */
-static LLVMValueRef
-get_tcs_in_patch_stride(struct nir_to_llvm_context *ctx)
-{
-	if (ctx->stage == MESA_SHADER_VERTEX)
-		return unpack_param(ctx, ctx->ls_out_layout, 0, 13);
-	else if (ctx->stage == MESA_SHADER_TESS_CTRL)
-		return unpack_param(ctx, ctx->tcs_in_layout, 0, 13);
-	else {
-		assert(0);
-		return NULL;
+	if (type == ctx->i32) {
+		return LLVMBuildBitCast(ctx->builder, v, ctx->f32, "");
+	} else if (LLVMGetTypeKind(type) == LLVMVectorTypeKind) {
+		LLVMTypeRef elem_type = LLVMGetElementType(type);
+		if (elem_type == ctx->i32) {
+			LLVMTypeRef nt = LLVMVectorType(ctx->f32, LLVMGetVectorSize(type));
+			return LLVMBuildBitCast(ctx->builder, v, nt, "");
+		}
 	}
+	return v;
 }
 
-static LLVMValueRef
-get_tcs_out_patch_stride(struct nir_to_llvm_context *ctx)
-{
-	return unpack_param(ctx, ctx->tcs_out_layout, 0, 13);
-}
-
-static LLVMValueRef
-get_tcs_out_patch0_offset(struct nir_to_llvm_context *ctx)
-{
-	return LLVMBuildMul(ctx->builder,
-			    unpack_param(ctx, ctx->tcs_out_offsets, 0, 16),
-			    LLVMConstInt(ctx->i32, 4, false), "");
-}
-
-static LLVMValueRef
-get_tcs_out_patch0_patch_data_offset(struct nir_to_llvm_context *ctx)
-{
-	return LLVMBuildMul(ctx->builder,
-			    unpack_param(ctx, ctx->tcs_out_offsets, 16, 16),
-			    LLVMConstInt(ctx->i32, 4, false), "");
-}
-
-static LLVMValueRef
-get_tcs_in_current_patch_offset(struct nir_to_llvm_context *ctx)
+static LLVMValueRef build_indexed_load(struct nir_to_llvm_context *ctx,
+				       LLVMValueRef base_ptr, LLVMValueRef index,
+				       bool uniform)
 {
-	LLVMValueRef patch_stride = get_tcs_in_patch_stride(ctx);
-	LLVMValueRef rel_patch_id = get_rel_patch_id(ctx);
+	LLVMValueRef pointer;
+	LLVMValueRef indices[] = {ctx->i32zero, index};
 
-	return LLVMBuildMul(ctx->builder, patch_stride, rel_patch_id, "");
-}
-
-static LLVMValueRef
-get_tcs_out_current_patch_offset(struct nir_to_llvm_context *ctx)
-{
-	LLVMValueRef patch0_offset = get_tcs_out_patch0_offset(ctx);
-	LLVMValueRef patch_stride = get_tcs_out_patch_stride(ctx);
-	LLVMValueRef rel_patch_id = get_rel_patch_id(ctx);
-
-	return LLVMBuildAdd(ctx->builder, patch0_offset,
-			    LLVMBuildMul(ctx->builder, patch_stride,
-					 rel_patch_id, ""),
-			    "");
-}
-
-static LLVMValueRef
-get_tcs_out_current_patch_data_offset(struct nir_to_llvm_context *ctx)
-{
-	LLVMValueRef patch0_patch_data_offset =
-		get_tcs_out_patch0_patch_data_offset(ctx);
-	LLVMValueRef patch_stride = get_tcs_out_patch_stride(ctx);
-	LLVMValueRef rel_patch_id = get_rel_patch_id(ctx);
-
-	return LLVMBuildAdd(ctx->builder, patch0_patch_data_offset,
-			    LLVMBuildMul(ctx->builder, patch_stride,
-					 rel_patch_id, ""),
-			    "");
-}
-
-static void set_userdata_location(struct ac_userdata_info *ud_info, uint8_t sgpr_idx, uint8_t num_sgprs)
-{
-	ud_info->sgpr_idx = sgpr_idx;
-	ud_info->num_sgprs = num_sgprs;
-	ud_info->indirect = false;
-	ud_info->indirect_offset = 0;
+	pointer = LLVMBuildGEP(ctx->builder, base_ptr, indices, 2, "");
+	if (uniform)
+		LLVMSetMetadata(pointer, ctx->uniform_md_kind, ctx->empty_md);
+	return LLVMBuildLoad(ctx->builder, pointer, "");
 }
 
-static void set_userdata_location_shader(struct nir_to_llvm_context *ctx,
-					 int idx, uint8_t sgpr_idx, uint8_t num_sgprs)
+static LLVMValueRef build_indexed_load_const(struct nir_to_llvm_context *ctx,
+					     LLVMValueRef base_ptr, LLVMValueRef index)
 {
-	set_userdata_location(&ctx->shader_info->user_sgprs_locs.shader_data[idx], sgpr_idx, num_sgprs);
-}
-
-#if 0
-static void set_userdata_location_indirect(struct ac_userdata_info *ud_info, uint8_t sgpr_idx, uint8_t num_sgprs,
-					   uint32_t indirect_offset)
-{
-	ud_info->sgpr_idx = sgpr_idx;
-	ud_info->num_sgprs = num_sgprs;
-	ud_info->indirect = true;
-	ud_info->indirect_offset = indirect_offset;
-}
-#endif
-
-static void declare_tess_lds(struct nir_to_llvm_context *ctx)
-{
-	unsigned lds_size = ctx->options->chip_class >= CIK ? 65536 : 32768;
-	ctx->lds = LLVMBuildIntToPtr(ctx->builder, ctx->i32zero,
-				     LLVMPointerType(LLVMArrayType(ctx->i32, lds_size / 4), LOCAL_ADDR_SPACE),
-		"tess_lds");
+	LLVMValueRef result = build_indexed_load(ctx, base_ptr, index, true);
+	LLVMSetMetadata(result, ctx->invariant_load_md_kind, ctx->empty_md);
+	return result;
 }
 
-static void create_function(struct nir_to_llvm_context *ctx)
+static void create_function(struct nir_to_llvm_context *ctx,
+                            struct nir_shader *nir)
 {
 	LLVMTypeRef arg_types[23];
 	unsigned arg_idx = 0;
-	unsigned array_params_mask = 0;
+	unsigned array_count = 0;
 	unsigned sgpr_count = 0, user_sgpr_count;
 	unsigned i;
-	unsigned num_sets = ctx->options->layout ? ctx->options->layout->num_sets : 0;
-	unsigned user_sgpr_idx;
-	bool need_push_constants;
-	bool need_ring_offsets = false;
-
-	/* until we sort out scratch/global buffers always assign ring offsets for gs/vs/es */
-	if (ctx->stage == MESA_SHADER_GEOMETRY ||
-	    ctx->stage == MESA_SHADER_VERTEX ||
-	    ctx->stage == MESA_SHADER_TESS_CTRL ||
-	    ctx->stage == MESA_SHADER_TESS_EVAL ||
-	    ctx->stage == MESA_SHADER_FRAGMENT ||
-	    ctx->is_gs_copy_shader)
-		need_ring_offsets = true;
-
-	need_push_constants = true;
-	if (!ctx->options->layout)
-		need_push_constants = false;
-	else if (!ctx->options->layout->push_constant_size &&
-		 !ctx->options->layout->dynamic_offset_count)
-		need_push_constants = false;
-
-	if (need_ring_offsets && !ctx->options->supports_spill) {
-		arg_types[arg_idx++] = const_array(ctx->v16i8, 16); /* address of rings */
-	}
 
 	/* 1 for each descriptor set */
-	for (unsigned i = 0; i < num_sets; ++i) {
-		if (ctx->options->layout->set[i].layout->shader_stages & (1 << ctx->stage)) {
-			array_params_mask |= (1 << arg_idx);
-			arg_types[arg_idx++] = const_array(ctx->i8, 1024 * 1024);
-		}
-	}
-
-	if (need_push_constants) {
-		/* 1 for push constants and dynamic descriptors */
-		array_params_mask |= (1 << arg_idx);
+	for (unsigned i = 0; i < 4; ++i)
 		arg_types[arg_idx++] = const_array(ctx->i8, 1024 * 1024);
-	}
 
-	switch (ctx->stage) {
+	/* 1 for push constants and dynamic descriptors */
+	arg_types[arg_idx++] = const_array(ctx->i8, 1024 * 1024);
+
+	array_count = arg_idx;
+	switch (nir->stage) {
 	case MESA_SHADER_COMPUTE:
 		arg_types[arg_idx++] = LLVMVectorType(ctx->i32, 3); /* grid size */
 		user_sgpr_count = arg_idx;
@@ -613,74 +354,17 @@ static void create_function(struct nir_to_llvm_context *ctx)
 		arg_types[arg_idx++] = LLVMVectorType(ctx->i32, 3);
 		break;
 	case MESA_SHADER_VERTEX:
-		if (!ctx->is_gs_copy_shader) {
-			arg_types[arg_idx++] = const_array(ctx->v16i8, 16); /* vertex buffers */
-			arg_types[arg_idx++] = ctx->i32; // base vertex
-			arg_types[arg_idx++] = ctx->i32; // start instance
-			arg_types[arg_idx++] = ctx->i32; // draw index
-		}
-		user_sgpr_count = arg_idx;
-		if (ctx->options->key.vs.as_es)
-			arg_types[arg_idx++] = ctx->i32; //es2gs offset
-		else if (ctx->options->key.vs.as_ls) {
-			arg_types[arg_idx++] = ctx->i32; //ls out layout
-			user_sgpr_count++;
-		}
-		sgpr_count = arg_idx;
+		arg_types[arg_idx++] = const_array(ctx->v16i8, 16); /* vertex buffers */
+		arg_types[arg_idx++] = ctx->i32; // base vertex
+		arg_types[arg_idx++] = ctx->i32; // start instance
+		user_sgpr_count = sgpr_count = arg_idx;
 		arg_types[arg_idx++] = ctx->i32; // vertex id
-		if (!ctx->is_gs_copy_shader) {
-			arg_types[arg_idx++] = ctx->i32; // rel auto id
-			arg_types[arg_idx++] = ctx->i32; // vs prim id
-			arg_types[arg_idx++] = ctx->i32; // instance id
-		}
-		break;
-	case MESA_SHADER_TESS_CTRL:
-		arg_types[arg_idx++] = ctx->i32; // tcs offchip layout
-		arg_types[arg_idx++] = ctx->i32; // tcs out offsets
-		arg_types[arg_idx++] = ctx->i32; // tcs out layout
-		arg_types[arg_idx++] = ctx->i32; // tcs in layout
-		user_sgpr_count = arg_idx;
-		arg_types[arg_idx++] = ctx->i32; // param oc lds
-		arg_types[arg_idx++] = ctx->i32; // tess factor offset
-		sgpr_count = arg_idx;
-		arg_types[arg_idx++] = ctx->i32; // patch id
-		arg_types[arg_idx++] = ctx->i32; // rel ids;
-		break;
-	case MESA_SHADER_TESS_EVAL:
-		arg_types[arg_idx++] = ctx->i32; // tcs offchip layout
-		user_sgpr_count = arg_idx;
-		if (ctx->options->key.tes.as_es) {
-			arg_types[arg_idx++] = ctx->i32; // OC LDS
-			arg_types[arg_idx++] = ctx->i32; //
-			arg_types[arg_idx++] = ctx->i32; // es2gs offset
-		} else {
-			arg_types[arg_idx++] = ctx->i32; //
-			arg_types[arg_idx++] = ctx->i32; // OC LDS
-		}
-		sgpr_count = arg_idx;
-		arg_types[arg_idx++] = ctx->f32; // tes_u
-		arg_types[arg_idx++] = ctx->f32; // tes_v
-		arg_types[arg_idx++] = ctx->i32; // tes rel patch id
-		arg_types[arg_idx++] = ctx->i32; // tes patch id
-		break;
-	case MESA_SHADER_GEOMETRY:
-		arg_types[arg_idx++] = ctx->i32; // gsvs stride
-		arg_types[arg_idx++] = ctx->i32; // gsvs num entires
-		user_sgpr_count = arg_idx;
-		arg_types[arg_idx++] = ctx->i32; // gs2vs offset
-	        arg_types[arg_idx++] = ctx->i32; // wave id
-		sgpr_count = arg_idx;
-		arg_types[arg_idx++] = ctx->i32; // vtx0
-		arg_types[arg_idx++] = ctx->i32; // vtx1
-		arg_types[arg_idx++] = ctx->i32; // prim id
-		arg_types[arg_idx++] = ctx->i32; // vtx2
-		arg_types[arg_idx++] = ctx->i32; // vtx3
-		arg_types[arg_idx++] = ctx->i32; // vtx4
-		arg_types[arg_idx++] = ctx->i32; // vtx5
-		arg_types[arg_idx++] = ctx->i32; // GS instance id
+		arg_types[arg_idx++] = ctx->i32; // rel auto id
+		arg_types[arg_idx++] = ctx->i32; // vs prim id
+		arg_types[arg_idx++] = ctx->i32; // instance id
 		break;
 	case MESA_SHADER_FRAGMENT:
-		arg_types[arg_idx++] = ctx->i32; /* sample position offset */
+		arg_types[arg_idx++] = const_array(ctx->f32, 32); /* sample positions */
 		user_sgpr_count = arg_idx;
 		arg_types[arg_idx++] = ctx->i32; /* prim mask */
 		sgpr_count = arg_idx;
@@ -698,7 +382,7 @@ static void create_function(struct nir_to_llvm_context *ctx)
 		arg_types[arg_idx++] = ctx->f32;  /* pos w float */
 		arg_types[arg_idx++] = ctx->i32;  /* front face */
 		arg_types[arg_idx++] = ctx->i32;  /* ancillary */
-		arg_types[arg_idx++] = ctx->i32;  /* sample coverage */
+		arg_types[arg_idx++] = ctx->f32;  /* sample coverage */
 		arg_types[arg_idx++] = ctx->i32;  /* fixed pt */
 		break;
 	default:
@@ -707,13 +391,13 @@ static void create_function(struct nir_to_llvm_context *ctx)
 
 	ctx->main_function = create_llvm_function(
 	    ctx->context, ctx->module, ctx->builder, NULL, 0, arg_types,
-	    arg_idx, array_params_mask, sgpr_count, ctx->options->unsafe_math);
-	set_llvm_calling_convention(ctx->main_function, ctx->stage);
+	    arg_idx, array_count, sgpr_count, ctx->options->unsafe_math);
+	set_llvm_calling_convention(ctx->main_function, nir->stage);
+
 
 	ctx->shader_info->num_input_sgprs = 0;
 	ctx->shader_info->num_input_vgprs = 0;
 
-	ctx->shader_info->num_user_sgprs = ctx->options->supports_spill ? 2 : 0;
 	for (i = 0; i < user_sgpr_count; i++)
 		ctx->shader_info->num_user_sgprs += llvm_get_type_size(arg_types[i]) / 4;
 
@@ -721,46 +405,19 @@ static void create_function(struct nir_to_llvm_context *ctx)
 	for (; i < sgpr_count; i++)
 		ctx->shader_info->num_input_sgprs += llvm_get_type_size(arg_types[i]) / 4;
 
-	if (ctx->stage != MESA_SHADER_FRAGMENT)
+	if (nir->stage != MESA_SHADER_FRAGMENT)
 		for (; i < arg_idx; ++i)
 			ctx->shader_info->num_input_vgprs += llvm_get_type_size(arg_types[i]) / 4;
 
 	arg_idx = 0;
-	user_sgpr_idx = 0;
-
-	if (ctx->options->supports_spill || need_ring_offsets) {
-		set_userdata_location_shader(ctx, AC_UD_SCRATCH_RING_OFFSETS, user_sgpr_idx, 2);
-		user_sgpr_idx += 2;
-		if (ctx->options->supports_spill) {
-			ctx->ring_offsets = ac_build_intrinsic(&ctx->ac, "llvm.amdgcn.implicit.buffer.ptr",
-							       LLVMPointerType(ctx->i8, CONST_ADDR_SPACE),
-							       NULL, 0, AC_FUNC_ATTR_READNONE);
-			ctx->ring_offsets = LLVMBuildBitCast(ctx->builder, ctx->ring_offsets,
-							     const_array(ctx->v16i8, 16), "");
-		} else
-			ctx->ring_offsets = LLVMGetParam(ctx->main_function, arg_idx++);
-	}
-
-	for (unsigned i = 0; i < num_sets; ++i) {
-		if (ctx->options->layout->set[i].layout->shader_stages & (1 << ctx->stage)) {
-			set_userdata_location(&ctx->shader_info->user_sgprs_locs.descriptor_sets[i], user_sgpr_idx, 2);
-			user_sgpr_idx += 2;
-			ctx->descriptor_sets[i] =
-				LLVMGetParam(ctx->main_function, arg_idx++);
-		} else
-			ctx->descriptor_sets[i] = NULL;
-	}
+	for (unsigned i = 0; i < 4; ++i)
+		ctx->descriptor_sets[i] =
+		    LLVMGetParam(ctx->main_function, arg_idx++);
 
-	if (need_push_constants) {
-		ctx->push_constants = LLVMGetParam(ctx->main_function, arg_idx++);
-		set_userdata_location_shader(ctx, AC_UD_PUSH_CONSTANTS, user_sgpr_idx, 2);
-		user_sgpr_idx += 2;
-	}
+	ctx->push_constants = LLVMGetParam(ctx->main_function, arg_idx++);
 
-	switch (ctx->stage) {
+	switch (nir->stage) {
 	case MESA_SHADER_COMPUTE:
-		set_userdata_location_shader(ctx, AC_UD_CS_GRID_SIZE, user_sgpr_idx, 3);
-		user_sgpr_idx += 3;
 		ctx->num_work_groups =
 		    LLVMGetParam(ctx->main_function, arg_idx++);
 		ctx->workgroup_ids =
@@ -771,83 +428,16 @@ static void create_function(struct nir_to_llvm_context *ctx)
 		    LLVMGetParam(ctx->main_function, arg_idx++);
 		break;
 	case MESA_SHADER_VERTEX:
-		if (!ctx->is_gs_copy_shader) {
-			set_userdata_location_shader(ctx, AC_UD_VS_VERTEX_BUFFERS, user_sgpr_idx, 2);
-			user_sgpr_idx += 2;
-			ctx->vertex_buffers = LLVMGetParam(ctx->main_function, arg_idx++);
-			set_userdata_location_shader(ctx, AC_UD_VS_BASE_VERTEX_START_INSTANCE, user_sgpr_idx, 3);
-			user_sgpr_idx += 3;
-			ctx->base_vertex = LLVMGetParam(ctx->main_function, arg_idx++);
-			ctx->start_instance = LLVMGetParam(ctx->main_function, arg_idx++);
-			ctx->draw_index = LLVMGetParam(ctx->main_function, arg_idx++);
-		}
-		if (ctx->options->key.vs.as_es)
-			ctx->es2gs_offset = LLVMGetParam(ctx->main_function, arg_idx++);
-		else if (ctx->options->key.vs.as_ls) {
-			set_userdata_location_shader(ctx, AC_UD_VS_LS_TCS_IN_LAYOUT, user_sgpr_idx, 1);
-			user_sgpr_idx += 1;
-			ctx->ls_out_layout = LLVMGetParam(ctx->main_function, arg_idx++);
-		}
+		ctx->vertex_buffers = LLVMGetParam(ctx->main_function, arg_idx++);
+		ctx->base_vertex = LLVMGetParam(ctx->main_function, arg_idx++);
+		ctx->start_instance = LLVMGetParam(ctx->main_function, arg_idx++);
 		ctx->vertex_id = LLVMGetParam(ctx->main_function, arg_idx++);
-		if (!ctx->is_gs_copy_shader) {
-			ctx->rel_auto_id = LLVMGetParam(ctx->main_function, arg_idx++);
-			ctx->vs_prim_id = LLVMGetParam(ctx->main_function, arg_idx++);
-			ctx->instance_id = LLVMGetParam(ctx->main_function, arg_idx++);
-		}
-		if (ctx->options->key.vs.as_ls)
-			declare_tess_lds(ctx);
-		break;
-	case MESA_SHADER_TESS_CTRL:
-		set_userdata_location_shader(ctx, AC_UD_TCS_OFFCHIP_LAYOUT, user_sgpr_idx, 4);
-		user_sgpr_idx += 4;
-		ctx->tcs_offchip_layout = LLVMGetParam(ctx->main_function, arg_idx++);
-		ctx->tcs_out_offsets = LLVMGetParam(ctx->main_function, arg_idx++);
-		ctx->tcs_out_layout = LLVMGetParam(ctx->main_function, arg_idx++);
-		ctx->tcs_in_layout = LLVMGetParam(ctx->main_function, arg_idx++);
-		ctx->oc_lds = LLVMGetParam(ctx->main_function, arg_idx++);
-		ctx->tess_factor_offset = LLVMGetParam(ctx->main_function, arg_idx++);
-		ctx->tcs_patch_id = LLVMGetParam(ctx->main_function, arg_idx++);
-		ctx->tcs_rel_ids = LLVMGetParam(ctx->main_function, arg_idx++);
-
-		declare_tess_lds(ctx);
-		break;
-	case MESA_SHADER_TESS_EVAL:
-		set_userdata_location_shader(ctx, AC_UD_TES_OFFCHIP_LAYOUT, user_sgpr_idx, 1);
-		user_sgpr_idx += 1;
-		ctx->tcs_offchip_layout = LLVMGetParam(ctx->main_function, arg_idx++);
-		if (ctx->options->key.tes.as_es) {
-			ctx->oc_lds = LLVMGetParam(ctx->main_function, arg_idx++);
-			arg_idx++;
-			ctx->es2gs_offset = LLVMGetParam(ctx->main_function, arg_idx++);
-		} else {
-			arg_idx++;
-			ctx->oc_lds = LLVMGetParam(ctx->main_function, arg_idx++);
-		}
-		ctx->tes_u = LLVMGetParam(ctx->main_function, arg_idx++);
-		ctx->tes_v = LLVMGetParam(ctx->main_function, arg_idx++);
-		ctx->tes_rel_patch_id = LLVMGetParam(ctx->main_function, arg_idx++);
-		ctx->tes_patch_id = LLVMGetParam(ctx->main_function, arg_idx++);
-		break;
-	case MESA_SHADER_GEOMETRY:
-		set_userdata_location_shader(ctx, AC_UD_GS_VS_RING_STRIDE_ENTRIES, user_sgpr_idx, 2);
-		user_sgpr_idx += 2;
-		ctx->gsvs_ring_stride = LLVMGetParam(ctx->main_function, arg_idx++);
-		ctx->gsvs_num_entries = LLVMGetParam(ctx->main_function, arg_idx++);
-		ctx->gs2vs_offset = LLVMGetParam(ctx->main_function, arg_idx++);
-		ctx->gs_wave_id = LLVMGetParam(ctx->main_function, arg_idx++);
-		ctx->gs_vtx_offset[0] = LLVMGetParam(ctx->main_function, arg_idx++);
-		ctx->gs_vtx_offset[1] = LLVMGetParam(ctx->main_function, arg_idx++);
-		ctx->gs_prim_id = LLVMGetParam(ctx->main_function, arg_idx++);
-		ctx->gs_vtx_offset[2] = LLVMGetParam(ctx->main_function, arg_idx++);
-		ctx->gs_vtx_offset[3] = LLVMGetParam(ctx->main_function, arg_idx++);
-		ctx->gs_vtx_offset[4] = LLVMGetParam(ctx->main_function, arg_idx++);
-		ctx->gs_vtx_offset[5] = LLVMGetParam(ctx->main_function, arg_idx++);
-		ctx->gs_invocation_id = LLVMGetParam(ctx->main_function, arg_idx++);
+		ctx->rel_auto_id = LLVMGetParam(ctx->main_function, arg_idx++);
+		ctx->vs_prim_id = LLVMGetParam(ctx->main_function, arg_idx++);
+		ctx->instance_id = LLVMGetParam(ctx->main_function, arg_idx++);
 		break;
 	case MESA_SHADER_FRAGMENT:
-		set_userdata_location_shader(ctx, AC_UD_PS_SAMPLE_POS_OFFSET, user_sgpr_idx, 1);
-		user_sgpr_idx += 1;
-		ctx->sample_pos_offset = LLVMGetParam(ctx->main_function, arg_idx++);
+		ctx->sample_positions = LLVMGetParam(ctx->main_function, arg_idx++);
 		ctx->prim_mask = LLVMGetParam(ctx->main_function, arg_idx++);
 		ctx->persp_sample = LLVMGetParam(ctx->main_function, arg_idx++);
 		ctx->persp_center = LLVMGetParam(ctx->main_function, arg_idx++);
@@ -863,7 +453,6 @@ static void create_function(struct nir_to_llvm_context *ctx)
 		ctx->frag_pos[3] = LLVMGetParam(ctx->main_function, arg_idx++);
 		ctx->front_face = LLVMGetParam(ctx->main_function, arg_idx++);
 		ctx->ancillary = LLVMGetParam(ctx->main_function, arg_idx++);
-		ctx->sample_coverage = LLVMGetParam(ctx->main_function, arg_idx++);
 		break;
 	default:
 		unreachable("Shader stage not implemented");
@@ -886,13 +475,10 @@ static void setup_types(struct nir_to_llvm_context *ctx)
 	ctx->v8i32 = LLVMVectorType(ctx->i32, 8);
 	ctx->f32 = LLVMFloatTypeInContext(ctx->context);
 	ctx->f16 = LLVMHalfTypeInContext(ctx->context);
-	ctx->f64 = LLVMDoubleTypeInContext(ctx->context);
 	ctx->v2f32 = LLVMVectorType(ctx->f32, 2);
 	ctx->v4f32 = LLVMVectorType(ctx->f32, 4);
 	ctx->v16i8 = LLVMVectorType(ctx->i8, 16);
 
-	ctx->i1false = LLVMConstInt(ctx->i1, 0, false);
-	ctx->i1true = LLVMConstInt(ctx->i1, 1, false);
 	ctx->i32zero = LLVMConstInt(ctx->i32, 0, false);
 	ctx->i32one = LLVMConstInt(ctx->i32, 1, false);
 	ctx->f32zero = LLVMConstReal(ctx->f32, 0.0);
@@ -904,11 +490,18 @@ static void setup_types(struct nir_to_llvm_context *ctx)
 	args[3] = ctx->f32one;
 	ctx->v4f32empty = LLVMConstVector(args, 4);
 
+	ctx->range_md_kind = LLVMGetMDKindIDInContext(ctx->context,
+						      "range", 5);
+	ctx->invariant_load_md_kind = LLVMGetMDKindIDInContext(ctx->context,
+							       "invariant.load", 14);
 	ctx->uniform_md_kind =
 	    LLVMGetMDKindIDInContext(ctx->context, "amdgpu.uniform", 14);
 	ctx->empty_md = LLVMMDNodeInContext(ctx->context, NULL, 0);
 
+	ctx->fpmath_md_kind = LLVMGetMDKindIDInContext(ctx->context, "fpmath", 6);
+
 	args[0] = LLVMConstReal(ctx->f32, 2.5);
+	ctx->fpmath_md_2p5_ulp = LLVMMDNodeInContext(ctx->context, args, 1);
 }
 
 static int get_llvm_num_components(LLVMValueRef value)
@@ -953,6 +546,38 @@ static LLVMValueRef trim_vector(struct nir_to_llvm_context *ctx,
 	return LLVMBuildShuffleVector(ctx->builder, value, value, swizzle, "");
 }
 
+static LLVMValueRef
+build_gather_values_extended(struct nir_to_llvm_context *ctx,
+			     LLVMValueRef *values,
+			     unsigned value_count,
+			     unsigned value_stride,
+			     bool load)
+{
+	LLVMBuilderRef builder = ctx->builder;
+	LLVMValueRef vec;
+	unsigned i;
+
+
+	if (value_count == 1) {
+		if (load)
+			return LLVMBuildLoad(builder, values[0], "");
+		return values[0];
+	}
+
+	for (i = 0; i < value_count; i++) {
+		LLVMValueRef value = values[i * value_stride];
+		if (load)
+			value = LLVMBuildLoad(builder, value, "");
+
+		if (!i)
+			vec = LLVMGetUndef( LLVMVectorType(LLVMTypeOf(value), value_count));
+		LLVMValueRef index = LLVMConstInt(ctx->i32, i, false);
+		vec = LLVMBuildInsertElement(builder, vec, value, index, "");
+	}
+	return vec;
+}
+
+
 static void
 build_store_values_extended(struct nir_to_llvm_context *ctx,
 			     LLVMValueRef *values,
@@ -976,6 +601,14 @@ build_store_values_extended(struct nir_to_llvm_context *ctx,
 	}
 }
 
+static LLVMValueRef
+build_gather_values(struct nir_to_llvm_context *ctx,
+		    LLVMValueRef *values,
+		    unsigned value_count)
+{
+	return build_gather_values_extended(ctx, values, value_count, 1, false);
+}
+
 static LLVMTypeRef get_def_type(struct nir_to_llvm_context *ctx,
                                 nir_ssa_def *def)
 {
@@ -1032,7 +665,7 @@ static LLVMValueRef get_alu_src(struct nir_to_llvm_context *ctx,
 			                                masks[0], "");
 		} else if (src_components == 1 && num_components > 1) {
 			LLVMValueRef values[] = {value, value, value, value};
-			value = ac_build_gather_values(&ctx->ac, values, num_components);
+			value = build_gather_values(ctx, values, num_components);
 		} else {
 			LLVMValueRef swizzle = LLVMConstVector(masks, num_components);
 			value = LLVMBuildShuffleVector(ctx->builder, value, value,
@@ -1069,47 +702,35 @@ static LLVMValueRef emit_float_cmp(struct nir_to_llvm_context *ctx,
 
 static LLVMValueRef emit_intrin_1f_param(struct nir_to_llvm_context *ctx,
 					 const char *intrin,
-					 LLVMTypeRef result_type,
 					 LLVMValueRef src0)
 {
-	char name[64];
 	LLVMValueRef params[] = {
 		to_float(ctx, src0),
 	};
-
-	sprintf(name, "%s.f%d", intrin, get_elem_bits(ctx, result_type));
-	return ac_build_intrinsic(&ctx->ac, name, result_type, params, 1, AC_FUNC_ATTR_READNONE);
+	return emit_llvm_intrinsic(ctx, intrin, ctx->f32, params, 1, LLVMReadNoneAttribute);
 }
 
 static LLVMValueRef emit_intrin_2f_param(struct nir_to_llvm_context *ctx,
 				       const char *intrin,
-				       LLVMTypeRef result_type,
 				       LLVMValueRef src0, LLVMValueRef src1)
 {
-	char name[64];
 	LLVMValueRef params[] = {
 		to_float(ctx, src0),
 		to_float(ctx, src1),
 	};
-
-	sprintf(name, "%s.f%d", intrin, get_elem_bits(ctx, result_type));
-	return ac_build_intrinsic(&ctx->ac, name, result_type, params, 2, AC_FUNC_ATTR_READNONE);
+	return emit_llvm_intrinsic(ctx, intrin, ctx->f32, params, 2, LLVMReadNoneAttribute);
 }
 
 static LLVMValueRef emit_intrin_3f_param(struct nir_to_llvm_context *ctx,
 					 const char *intrin,
-					 LLVMTypeRef result_type,
 					 LLVMValueRef src0, LLVMValueRef src1, LLVMValueRef src2)
 {
-	char name[64];
 	LLVMValueRef params[] = {
 		to_float(ctx, src0),
 		to_float(ctx, src1),
 		to_float(ctx, src2),
 	};
-
-	sprintf(name, "%s.f%d", intrin, get_elem_bits(ctx, result_type));
-	return ac_build_intrinsic(&ctx->ac, name, result_type, params, 3, AC_FUNC_ATTR_READNONE);
+	return emit_llvm_intrinsic(ctx, intrin, ctx->f32, params, 3, LLVMReadNoneAttribute);
 }
 
 static LLVMValueRef emit_bcsel(struct nir_to_llvm_context *ctx,
@@ -1135,19 +756,51 @@ static LLVMValueRef emit_find_lsb(struct nir_to_llvm_context *ctx,
 		 */
 		LLVMConstInt(ctx->i32, 1, false),
 	};
-	return ac_build_intrinsic(&ctx->ac, "llvm.cttz.i32", ctx->i32, params, 2, AC_FUNC_ATTR_READNONE);
+	return emit_llvm_intrinsic(ctx, "llvm.cttz.i32", ctx->i32, params, 2, LLVMReadNoneAttribute);
 }
 
 static LLVMValueRef emit_ifind_msb(struct nir_to_llvm_context *ctx,
 				   LLVMValueRef src0)
 {
-	return ac_build_imsb(&ctx->ac, src0, ctx->i32);
+	LLVMValueRef msb = emit_llvm_intrinsic(ctx, "llvm.AMDGPU.flbit.i32",
+					       ctx->i32, &src0, 1,
+					       LLVMReadNoneAttribute);
+
+	/* The HW returns the last bit index from MSB, but NIR wants
+	 * the index from LSB. Invert it by doing "31 - msb". */
+	msb = LLVMBuildSub(ctx->builder, LLVMConstInt(ctx->i32, 31, false),
+			   msb, "");
+
+	LLVMValueRef all_ones = LLVMConstInt(ctx->i32, -1, true);
+	LLVMValueRef cond = LLVMBuildOr(ctx->builder,
+					LLVMBuildICmp(ctx->builder, LLVMIntEQ,
+						      src0, ctx->i32zero, ""),
+					LLVMBuildICmp(ctx->builder, LLVMIntEQ,
+						      src0, all_ones, ""), "");
+
+	return LLVMBuildSelect(ctx->builder, cond, all_ones, msb, "");
 }
 
 static LLVMValueRef emit_ufind_msb(struct nir_to_llvm_context *ctx,
 				   LLVMValueRef src0)
 {
-	return ac_build_umsb(&ctx->ac, src0, ctx->i32);
+	LLVMValueRef args[2] = {
+		src0,
+		ctx->i32one,
+	};
+	LLVMValueRef msb = emit_llvm_intrinsic(ctx, "llvm.ctlz.i32",
+					       ctx->i32, args, ARRAY_SIZE(args),
+					       LLVMReadNoneAttribute);
+
+	/* The HW returns the last bit index from MSB, but NIR wants
+	 * the index from LSB. Invert it by doing "31 - msb". */
+	msb = LLVMBuildSub(ctx->builder, LLVMConstInt(ctx->i32, 31, false),
+			   msb, "");
+
+	return LLVMBuildSelect(ctx->builder,
+			       LLVMBuildICmp(ctx->builder, LLVMIntEQ, src0,
+					     ctx->i32zero, ""),
+			       LLVMConstInt(ctx->i32, -1, true), msb, "");
 }
 
 static LLVMValueRef emit_minmax_int(struct nir_to_llvm_context *ctx,
@@ -1199,9 +852,9 @@ static LLVMValueRef emit_ffract(struct nir_to_llvm_context *ctx,
 	LLVMValueRef params[] = {
 		fsrc0,
 	};
-	LLVMValueRef floor = ac_build_intrinsic(&ctx->ac, intr,
-						ctx->f32, params, 1,
-						AC_FUNC_ATTR_READNONE);
+	LLVMValueRef floor = emit_llvm_intrinsic(ctx, intr,
+						 ctx->f32, params, 1,
+						 LLVMReadNoneAttribute);
 	return LLVMBuildFSub(ctx->builder, fsrc0, floor, "");
 }
 
@@ -1216,8 +869,8 @@ static LLVMValueRef emit_uint_carry(struct nir_to_llvm_context *ctx,
 	ret_type = LLVMStructTypeInContext(ctx->context, types,
 					   2, true);
 
-	res = ac_build_intrinsic(&ctx->ac, intrin, ret_type,
-				 params, 2, AC_FUNC_ATTR_READNONE);
+	res = emit_llvm_intrinsic(ctx, intrin, ret_type,
+				  params, 2, LLVMReadNoneAttribute);
 
 	res = LLVMBuildExtractValue(ctx->builder, res, 1, "");
 	res = LLVMBuildZExt(ctx->builder, res, ctx->i32, "");
@@ -1230,33 +883,6 @@ static LLVMValueRef emit_b2f(struct nir_to_llvm_context *ctx,
 	return LLVMBuildAnd(ctx->builder, src0, LLVMBuildBitCast(ctx->builder, LLVMConstReal(ctx->f32, 1.0), ctx->i32, ""), "");
 }
 
-static LLVMValueRef emit_f2f16(struct nir_to_llvm_context *ctx,
-			       LLVMValueRef src0)
-{
-	LLVMValueRef result;
-	LLVMValueRef cond;
-
-	src0 = to_float(ctx, src0);
-	result = LLVMBuildFPTrunc(ctx->builder, src0, ctx->f16, "");
-
-	/* TODO SI/CIK options here */
-	if (ctx->options->chip_class >= VI) {
-		LLVMValueRef args[2];
-		/* Check if the result is a denormal - and flush to 0 if so. */
-		args[0] = result;
-		args[1] = LLVMConstInt(ctx->i32, N_SUBNORMAL | P_SUBNORMAL, false);
-		cond = ac_build_intrinsic(&ctx->ac, "llvm.amdgcn.class.f16", ctx->i1, args, 2, AC_FUNC_ATTR_READNONE);
-	}
-
-	/* need to convert back up to f32 */
-	result = LLVMBuildFPExt(ctx->builder, result, ctx->f32, "");
-
-	if (ctx->options->chip_class >= VI)
-		result = LLVMBuildSelect(ctx->builder, cond, ctx->f32zero, result, "");
-
-	return result;
-}
-
 static LLVMValueRef emit_umul_high(struct nir_to_llvm_context *ctx,
 				   LLVMValueRef src0, LLVMValueRef src1)
 {
@@ -1284,13 +910,13 @@ static LLVMValueRef emit_imul_high(struct nir_to_llvm_context *ctx,
 }
 
 static LLVMValueRef emit_bitfield_extract(struct nir_to_llvm_context *ctx,
-					  bool is_signed,
+					  const char *intrin,
 					  LLVMValueRef srcs[3])
 {
 	LLVMValueRef result;
 	LLVMValueRef icond = LLVMBuildICmp(ctx->builder, LLVMIntEQ, srcs[2], LLVMConstInt(ctx->i32, 32, false), "");
+	result = emit_llvm_intrinsic(ctx, intrin, ctx->i32, srcs, 3, LLVMReadNoneAttribute);
 
-	result = ac_build_bfe(&ctx->ac, srcs[0], srcs[1], srcs[2], is_signed);
 	result = LLVMBuildSelect(ctx->builder, icond, srcs[0], result, "");
 	return result;
 }
@@ -1368,38 +994,142 @@ static LLVMValueRef emit_unpack_half_2x16(struct nir_to_llvm_context *ctx,
 	return result;
 }
 
+/**
+ * Set range metadata on an instruction.  This can only be used on load and
+ * call instructions.  If you know an instruction can only produce the values
+ * 0, 1, 2, you would do set_range_metadata(value, 0, 3);
+ * \p lo is the minimum value inclusive.
+ * \p hi is the maximum value exclusive.
+ */
+static void set_range_metadata(struct nir_to_llvm_context *ctx,
+			       LLVMValueRef value, unsigned lo, unsigned hi)
+{
+	LLVMValueRef range_md, md_args[2];
+	LLVMTypeRef type = LLVMTypeOf(value);
+	LLVMContextRef context = LLVMGetTypeContext(type);
+
+	md_args[0] = LLVMConstInt(type, lo, false);
+	md_args[1] = LLVMConstInt(type, hi, false);
+	range_md = LLVMMDNodeInContext(context, md_args, 2);
+	LLVMSetMetadata(value, ctx->range_md_kind, range_md);
+}
+
+static LLVMValueRef get_thread_id(struct nir_to_llvm_context *ctx)
+{
+	LLVMValueRef tid;
+	LLVMValueRef tid_args[2];
+	tid_args[0] = LLVMConstInt(ctx->i32, 0xffffffff, false);
+	tid_args[1] = ctx->i32zero;
+	tid_args[1] = emit_llvm_intrinsic(ctx,
+					  "llvm.amdgcn.mbcnt.lo", ctx->i32,
+					  tid_args, 2, LLVMReadNoneAttribute);
+
+	tid = emit_llvm_intrinsic(ctx,
+				  "llvm.amdgcn.mbcnt.hi", ctx->i32,
+				  tid_args, 2, LLVMReadNoneAttribute);
+	set_range_metadata(ctx, tid, 0, 64);
+	return tid;
+}
+
+/*
+ * SI implements derivatives using the local data store (LDS)
+ * All writes to the LDS happen in all executing threads at
+ * the same time. TID is the Thread ID for the current
+ * thread and is a value between 0 and 63, representing
+ * the thread's position in the wavefront.
+ *
+ * For the pixel shader threads are grouped into quads of four pixels.
+ * The TIDs of the pixels of a quad are:
+ *
+ *  +------+------+
+ *  |4n + 0|4n + 1|
+ *  +------+------+
+ *  |4n + 2|4n + 3|
+ *  +------+------+
+ *
+ * So, masking the TID with 0xfffffffc yields the TID of the top left pixel
+ * of the quad, masking with 0xfffffffd yields the TID of the top pixel of
+ * the current pixel's column, and masking with 0xfffffffe yields the TID
+ * of the left pixel of the current pixel's row.
+ *
+ * Adding 1 yields the TID of the pixel to the right of the left pixel, and
+ * adding 2 yields the TID of the pixel below the top pixel.
+ */
+/* masks for thread ID. */
+#define TID_MASK_TOP_LEFT 0xfffffffc
+#define TID_MASK_TOP      0xfffffffd
+#define TID_MASK_LEFT     0xfffffffe
 static LLVMValueRef emit_ddxy(struct nir_to_llvm_context *ctx,
-			      nir_op op,
+			      nir_alu_instr *instr,
 			      LLVMValueRef src0)
 {
+	LLVMValueRef indices[2];
+	LLVMValueRef store_ptr, load_ptr0, load_ptr1;
+	LLVMValueRef tl, trbl, result;
+	LLVMValueRef tl_tid, trbl_tid;
+	LLVMValueRef args[2];
 	unsigned mask;
 	int idx;
-	LLVMValueRef result;
 	ctx->has_ddxy = true;
-
-	if (!ctx->lds && !ctx->has_ds_bpermute)
+	if (!ctx->lds)
 		ctx->lds = LLVMAddGlobalInAddressSpace(ctx->module,
 						       LLVMArrayType(ctx->i32, 64),
 						       "ddxy_lds", LOCAL_ADDR_SPACE);
 
-	if (op == nir_op_fddx_fine || op == nir_op_fddx)
-		mask = AC_TID_MASK_LEFT;
-	else if (op == nir_op_fddy_fine || op == nir_op_fddy)
-		mask = AC_TID_MASK_TOP;
+	indices[0] = ctx->i32zero;
+	indices[1] = get_thread_id(ctx);
+	store_ptr = LLVMBuildGEP(ctx->builder, ctx->lds,
+				 indices, 2, "");
+
+	if (instr->op == nir_op_fddx_fine || instr->op == nir_op_fddx)
+		mask = TID_MASK_LEFT;
+	else if (instr->op == nir_op_fddy_fine || instr->op == nir_op_fddy)
+		mask = TID_MASK_TOP;
 	else
-		mask = AC_TID_MASK_TOP_LEFT;
+		mask = TID_MASK_TOP_LEFT;
+
+	tl_tid = LLVMBuildAnd(ctx->builder, indices[1],
+			      LLVMConstInt(ctx->i32, mask, false), "");
+	indices[1] = tl_tid;
+	load_ptr0 = LLVMBuildGEP(ctx->builder, ctx->lds,
+				 indices, 2, "");
 
 	/* for DDX we want to next X pixel, DDY next Y pixel. */
-	if (op == nir_op_fddx_fine ||
-	    op == nir_op_fddx_coarse ||
-	    op == nir_op_fddx)
+	if (instr->op == nir_op_fddx_fine ||
+	    instr->op == nir_op_fddx_coarse ||
+	    instr->op == nir_op_fddx)
 		idx = 1;
 	else
 		idx = 2;
 
-	result = ac_build_ddxy(&ctx->ac, ctx->has_ds_bpermute,
-			      mask, idx, ctx->lds,
-			      src0);
+	trbl_tid = LLVMBuildAdd(ctx->builder, indices[1],
+				LLVMConstInt(ctx->i32, idx, false), "");
+	indices[1] = trbl_tid;
+	load_ptr1 = LLVMBuildGEP(ctx->builder, ctx->lds,
+				 indices, 2, "");
+
+	if (ctx->options->family >= CHIP_TONGA) {
+		args[0] = LLVMBuildMul(ctx->builder, tl_tid,
+				       LLVMConstInt(ctx->i32, 4, false), "");
+		args[1] = src0;
+		tl = emit_llvm_intrinsic(ctx, "llvm.amdgcn.ds.bpermute",
+					 ctx->i32, args, 2,
+					 LLVMReadNoneAttribute);
+
+		args[0] = LLVMBuildMul(ctx->builder, trbl_tid,
+				       LLVMConstInt(ctx->i32, 4, false), "");
+		trbl = emit_llvm_intrinsic(ctx, "llvm.amdgcn.ds.bpermute",
+					   ctx->i32, args, 2,
+					   LLVMReadNoneAttribute);
+	} else {
+		LLVMBuildStore(ctx->builder, src0, store_ptr);
+
+		tl = LLVMBuildLoad(ctx->builder, load_ptr0, "");
+		trbl = LLVMBuildLoad(ctx->builder, load_ptr1, "");
+	}
+	tl = LLVMBuildBitCast(ctx->builder, tl, ctx->f32, "");
+	trbl = LLVMBuildBitCast(ctx->builder, trbl, ctx->f32, "");
+	result = LLVMBuildFSub(ctx->builder, trbl, tl, "");
 	return result;
 }
 
@@ -1412,16 +1142,84 @@ static LLVMValueRef emit_ddxy_interp(
 	struct nir_to_llvm_context *ctx,
 	LLVMValueRef interp_ij)
 {
-	LLVMValueRef result[4], a;
-	unsigned i;
+	LLVMValueRef indices[2];
+	LLVMValueRef store_ptr, load_ptr_x, load_ptr_y, load_ptr_ddx, load_ptr_ddy, temp, temp2;
+	LLVMValueRef tl, tr, bl, result[4];
+	unsigned c;
 
-	for (i = 0; i < 2; i++) {
-		a = LLVMBuildExtractElement(ctx->builder, interp_ij,
-					    LLVMConstInt(ctx->i32, i, false), "");
-		result[i] = emit_ddxy(ctx, nir_op_fddx, a);
-		result[2+i] = emit_ddxy(ctx, nir_op_fddy, a);
+	if (!ctx->lds)
+		ctx->lds = LLVMAddGlobalInAddressSpace(ctx->module,
+						       LLVMArrayType(ctx->i32, 64),
+						       "ddxy_lds", LOCAL_ADDR_SPACE);
+
+	indices[0] = ctx->i32zero;
+	indices[1] = get_thread_id(ctx);
+	store_ptr = LLVMBuildGEP(ctx->builder, ctx->lds,
+				 indices, 2, "");
+
+	temp = LLVMBuildAnd(ctx->builder, indices[1],
+			    LLVMConstInt(ctx->i32, TID_MASK_LEFT, false), "");
+
+	temp2 = LLVMBuildAnd(ctx->builder, indices[1],
+			     LLVMConstInt(ctx->i32, TID_MASK_TOP, false), "");
+
+	indices[1] = temp;
+	load_ptr_x = LLVMBuildGEP(ctx->builder, ctx->lds,
+				  indices, 2, "");
+
+	indices[1] = temp2;
+	load_ptr_y = LLVMBuildGEP(ctx->builder, ctx->lds,
+				  indices, 2, "");
+
+	indices[1] = LLVMBuildAdd(ctx->builder, temp,
+				  LLVMConstInt(ctx->i32, 1, false), "");
+	load_ptr_ddx = LLVMBuildGEP(ctx->builder, ctx->lds,
+				   indices, 2, "");
+
+	indices[1] = LLVMBuildAdd(ctx->builder, temp2,
+				  LLVMConstInt(ctx->i32, 2, false), "");
+	load_ptr_ddy = LLVMBuildGEP(ctx->builder, ctx->lds,
+				   indices, 2, "");
+
+	for (c = 0; c < 2; ++c) {
+		LLVMValueRef store_val;
+		LLVMValueRef c_ll = LLVMConstInt(ctx->i32, c, false);
+
+		store_val = LLVMBuildExtractElement(ctx->builder,
+						    interp_ij, c_ll, "");
+		LLVMBuildStore(ctx->builder,
+			       store_val,
+			       store_ptr);
+
+		tl = LLVMBuildLoad(ctx->builder, load_ptr_x, "");
+		tl = LLVMBuildBitCast(ctx->builder, tl, ctx->f32, "");
+
+		tr = LLVMBuildLoad(ctx->builder, load_ptr_ddx, "");
+		tr = LLVMBuildBitCast(ctx->builder, tr, ctx->f32, "");
+
+		result[c] = LLVMBuildFSub(ctx->builder, tr, tl, "");
+
+		tl = LLVMBuildLoad(ctx->builder, load_ptr_y, "");
+		tl = LLVMBuildBitCast(ctx->builder, tl, ctx->f32, "");
+
+		bl = LLVMBuildLoad(ctx->builder, load_ptr_ddy, "");
+		bl = LLVMBuildBitCast(ctx->builder, bl, ctx->f32, "");
+
+		result[c + 2] = LLVMBuildFSub(ctx->builder, bl, tl, "");
 	}
-	return ac_build_gather_values(&ctx->ac, result, 4);
+
+	return build_gather_values(ctx, result, 4);
+}
+
+static LLVMValueRef emit_fdiv(struct nir_to_llvm_context *ctx,
+			      LLVMValueRef num,
+			      LLVMValueRef den)
+{
+	LLVMValueRef ret = LLVMBuildFDiv(ctx->builder, num, den, "");
+
+	if (!LLVMIsConstant(ret))
+		LLVMSetMetadata(ret, ctx->fpmath_md_kind, ctx->fpmath_md_2p5_ulp);
+	return ret;
 }
 
 static void visit_alu(struct nir_to_llvm_context *ctx, nir_alu_instr *instr)
@@ -1429,7 +1227,6 @@ static void visit_alu(struct nir_to_llvm_context *ctx, nir_alu_instr *instr)
 	LLVMValueRef src[4], result = NULL;
 	unsigned num_components = instr->dest.dest.ssa.num_components;
 	unsigned src_components;
-	LLVMTypeRef def_type = get_def_type(ctx, &instr->dest.dest.ssa);
 
 	assert(nir_op_infos[instr->op].num_inputs <= ARRAY_SIZE(src));
 	switch (instr->op) {
@@ -1494,9 +1291,8 @@ static void visit_alu(struct nir_to_llvm_context *ctx, nir_alu_instr *instr)
 	case nir_op_fmod:
 		src[0] = to_float(ctx, src[0]);
 		src[1] = to_float(ctx, src[1]);
-		result = ac_build_fdiv(&ctx->ac, src[0], src[1]);
-		result = emit_intrin_1f_param(ctx, "llvm.floor",
-		                              to_float_type(ctx, def_type), result);
+		result = emit_fdiv(ctx, src[0], src[1]);
+		result = emit_intrin_1f_param(ctx, "llvm.floor.f32", result);
 		result = LLVMBuildFMul(ctx->builder, src[1] , result, "");
 		result = LLVMBuildFSub(ctx->builder, src[0], result, "");
 		break;
@@ -1505,9 +1301,6 @@ static void visit_alu(struct nir_to_llvm_context *ctx, nir_alu_instr *instr)
 		src[1] = to_float(ctx, src[1]);
 		result = LLVMBuildFRem(ctx->builder, src[0], src[1], "");
 		break;
-	case nir_op_irem:
-		result = LLVMBuildSRem(ctx->builder, src[0], src[1], "");
-		break;
 	case nir_op_idiv:
 		result = LLVMBuildSDiv(ctx->builder, src[0], src[1], "");
 		break;
@@ -1522,11 +1315,11 @@ static void visit_alu(struct nir_to_llvm_context *ctx, nir_alu_instr *instr)
 	case nir_op_fdiv:
 		src[0] = to_float(ctx, src[0]);
 		src[1] = to_float(ctx, src[1]);
-		result = ac_build_fdiv(&ctx->ac, src[0], src[1]);
+		result = emit_fdiv(ctx, src[0], src[1]);
 		break;
 	case nir_op_frcp:
 		src[0] = to_float(ctx, src[0]);
-		result = ac_build_fdiv(&ctx->ac, ctx->f32one, src[0]);
+		result = emit_fdiv(ctx, ctx->f32one, src[0]);
 		break;
 	case nir_op_iand:
 		result = LLVMBuildAnd(ctx->builder, src[0], src[1], "");
@@ -1577,8 +1370,7 @@ static void visit_alu(struct nir_to_llvm_context *ctx, nir_alu_instr *instr)
 		result = emit_float_cmp(ctx, LLVMRealUGE, src[0], src[1]);
 		break;
 	case nir_op_fabs:
-		result = emit_intrin_1f_param(ctx, "llvm.fabs",
-		                              to_float_type(ctx, def_type), src[0]);
+		result = emit_intrin_1f_param(ctx, "llvm.fabs.f32", src[0]);
 		break;
 	case nir_op_iabs:
 		result = emit_iabs(ctx, src[0]);
@@ -1603,132 +1395,86 @@ static void visit_alu(struct nir_to_llvm_context *ctx, nir_alu_instr *instr)
 		result = emit_fsign(ctx, src[0]);
 		break;
 	case nir_op_ffloor:
-		result = emit_intrin_1f_param(ctx, "llvm.floor",
-		                              to_float_type(ctx, def_type), src[0]);
+		result = emit_intrin_1f_param(ctx, "llvm.floor.f32", src[0]);
 		break;
 	case nir_op_ftrunc:
-		result = emit_intrin_1f_param(ctx, "llvm.trunc",
-		                              to_float_type(ctx, def_type), src[0]);
+		result = emit_intrin_1f_param(ctx, "llvm.trunc.f32", src[0]);
 		break;
 	case nir_op_fceil:
-		result = emit_intrin_1f_param(ctx, "llvm.ceil",
-		                              to_float_type(ctx, def_type), src[0]);
+		result = emit_intrin_1f_param(ctx, "llvm.ceil.f32", src[0]);
 		break;
 	case nir_op_fround_even:
-		result = emit_intrin_1f_param(ctx, "llvm.rint",
-		                              to_float_type(ctx, def_type),src[0]);
+		result = emit_intrin_1f_param(ctx, "llvm.rint.f32", src[0]);
 		break;
 	case nir_op_ffract:
 		result = emit_ffract(ctx, src[0]);
 		break;
 	case nir_op_fsin:
-		result = emit_intrin_1f_param(ctx, "llvm.sin",
-		                              to_float_type(ctx, def_type), src[0]);
+		result = emit_intrin_1f_param(ctx, "llvm.sin.f32", src[0]);
 		break;
 	case nir_op_fcos:
-		result = emit_intrin_1f_param(ctx, "llvm.cos",
-		                              to_float_type(ctx, def_type), src[0]);
+		result = emit_intrin_1f_param(ctx, "llvm.cos.f32", src[0]);
 		break;
 	case nir_op_fsqrt:
-		result = emit_intrin_1f_param(ctx, "llvm.sqrt",
-		                              to_float_type(ctx, def_type), src[0]);
+		result = emit_intrin_1f_param(ctx, "llvm.sqrt.f32", src[0]);
 		break;
 	case nir_op_fexp2:
-		result = emit_intrin_1f_param(ctx, "llvm.exp2",
-		                              to_float_type(ctx, def_type), src[0]);
+		result = emit_intrin_1f_param(ctx, "llvm.exp2.f32", src[0]);
 		break;
 	case nir_op_flog2:
-		result = emit_intrin_1f_param(ctx, "llvm.log2",
-		                              to_float_type(ctx, def_type), src[0]);
+		result = emit_intrin_1f_param(ctx, "llvm.log2.f32", src[0]);
 		break;
 	case nir_op_frsq:
-		result = emit_intrin_1f_param(ctx, "llvm.sqrt",
-		                              to_float_type(ctx, def_type), src[0]);
-		result = ac_build_fdiv(&ctx->ac, ctx->f32one, result);
+		result = emit_intrin_1f_param(ctx, "llvm.sqrt.f32", src[0]);
+		result = emit_fdiv(ctx, ctx->f32one, result);
 		break;
 	case nir_op_fpow:
-		result = emit_intrin_2f_param(ctx, "llvm.pow",
-		                              to_float_type(ctx, def_type), src[0], src[1]);
+		result = emit_intrin_2f_param(ctx, "llvm.pow.f32", src[0], src[1]);
 		break;
 	case nir_op_fmax:
-		result = emit_intrin_2f_param(ctx, "llvm.maxnum",
-		                              to_float_type(ctx, def_type), src[0], src[1]);
-		if (instr->dest.dest.ssa.bit_size == 32)
-			result = emit_intrin_1f_param(ctx, "llvm.canonicalize",
-						      to_float_type(ctx, def_type),
-						      result);
+		result = emit_intrin_2f_param(ctx, "llvm.maxnum.f32", src[0], src[1]);
 		break;
 	case nir_op_fmin:
-		result = emit_intrin_2f_param(ctx, "llvm.minnum",
-		                              to_float_type(ctx, def_type), src[0], src[1]);
-		if (instr->dest.dest.ssa.bit_size == 32)
-			result = emit_intrin_1f_param(ctx, "llvm.canonicalize",
-						      to_float_type(ctx, def_type),
-						      result);
+		result = emit_intrin_2f_param(ctx, "llvm.minnum.f32", src[0], src[1]);
 		break;
 	case nir_op_ffma:
-		result = emit_intrin_3f_param(ctx, "llvm.fma",
-		                              to_float_type(ctx, def_type), src[0], src[1], src[2]);
+		result = emit_intrin_3f_param(ctx, "llvm.fma.f32", src[0], src[1], src[2]);
 		break;
 	case nir_op_ibitfield_extract:
-		result = emit_bitfield_extract(ctx, true, src);
+		result = emit_bitfield_extract(ctx, "llvm.AMDGPU.bfe.i32", src);
 		break;
 	case nir_op_ubitfield_extract:
-		result = emit_bitfield_extract(ctx, false, src);
+		result = emit_bitfield_extract(ctx, "llvm.AMDGPU.bfe.u32", src);
 		break;
 	case nir_op_bitfield_insert:
 		result = emit_bitfield_insert(ctx, src[0], src[1], src[2], src[3]);
 		break;
 	case nir_op_bitfield_reverse:
-		result = ac_build_intrinsic(&ctx->ac, "llvm.bitreverse.i32", ctx->i32, src, 1, AC_FUNC_ATTR_READNONE);
+		result = emit_llvm_intrinsic(ctx, "llvm.bitreverse.i32", ctx->i32, src, 1, LLVMReadNoneAttribute);
 		break;
 	case nir_op_bit_count:
-		result = ac_build_intrinsic(&ctx->ac, "llvm.ctpop.i32", ctx->i32, src, 1, AC_FUNC_ATTR_READNONE);
+		result = emit_llvm_intrinsic(ctx, "llvm.ctpop.i32", ctx->i32, src, 1, LLVMReadNoneAttribute);
 		break;
 	case nir_op_vec2:
 	case nir_op_vec3:
 	case nir_op_vec4:
 		for (unsigned i = 0; i < nir_op_infos[instr->op].num_inputs; i++)
 			src[i] = to_integer(ctx, src[i]);
-		result = ac_build_gather_values(&ctx->ac, src, num_components);
+		result = build_gather_values(ctx, src, num_components);
 		break;
-	case nir_op_f2i32:
-	case nir_op_f2i64:
+	case nir_op_f2i:
 		src[0] = to_float(ctx, src[0]);
-		result = LLVMBuildFPToSI(ctx->builder, src[0], def_type, "");
+		result = LLVMBuildFPToSI(ctx->builder, src[0], ctx->i32, "");
 		break;
-	case nir_op_f2u32:
-	case nir_op_f2u64:
+	case nir_op_f2u:
 		src[0] = to_float(ctx, src[0]);
-		result = LLVMBuildFPToUI(ctx->builder, src[0], def_type, "");
-		break;
-	case nir_op_i2f32:
-	case nir_op_i2f64:
-		result = LLVMBuildSIToFP(ctx->builder, src[0], to_float_type(ctx, def_type), "");
-		break;
-	case nir_op_u2f32:
-	case nir_op_u2f64:
-		result = LLVMBuildUIToFP(ctx->builder, src[0], to_float_type(ctx, def_type), "");
+		result = LLVMBuildFPToUI(ctx->builder, src[0], ctx->i32, "");
 		break;
-	case nir_op_f2f64:
-		result = LLVMBuildFPExt(ctx->builder, src[0], to_float_type(ctx, def_type), "");
-		break;
-	case nir_op_f2f32:
-		result = LLVMBuildFPTrunc(ctx->builder, src[0], to_float_type(ctx, def_type), "");
-		break;
-	case nir_op_u2u32:
-	case nir_op_u2u64:
-		if (get_elem_bits(ctx, LLVMTypeOf(src[0])) < get_elem_bits(ctx, def_type))
-			result = LLVMBuildZExt(ctx->builder, src[0], def_type, "");
-		else
-			result = LLVMBuildTrunc(ctx->builder, src[0], def_type, "");
+	case nir_op_i2f:
+		result = LLVMBuildSIToFP(ctx->builder, src[0], ctx->f32, "");
 		break;
-	case nir_op_i2i32:
-	case nir_op_i2i64:
-		if (get_elem_bits(ctx, LLVMTypeOf(src[0])) < get_elem_bits(ctx, def_type))
-			result = LLVMBuildSExt(ctx->builder, src[0], def_type, "");
-		else
-			result = LLVMBuildTrunc(ctx->builder, src[0], def_type, "");
+	case nir_op_u2f:
+		result = LLVMBuildUIToFP(ctx->builder, src[0], ctx->f32, "");
 		break;
 	case nir_op_bcsel:
 		result = emit_bcsel(ctx, src[0], src[1], src[2]);
@@ -1752,7 +1498,10 @@ static void visit_alu(struct nir_to_llvm_context *ctx, nir_alu_instr *instr)
 		result = emit_b2f(ctx, src[0]);
 		break;
 	case nir_op_fquantize2f16:
-		result = emit_f2f16(ctx, src[0]);
+		src[0] = to_float(ctx, src[0]);
+		result = LLVMBuildFPTrunc(ctx->builder, src[0], ctx->f16, "");
+		/* need to convert back up to f32 */
+		result = LLVMBuildFPExt(ctx->builder, result, ctx->f32, "");
 		break;
 	case nir_op_umul_high:
 		result = emit_umul_high(ctx, src[0], src[1]);
@@ -1772,39 +1521,8 @@ static void visit_alu(struct nir_to_llvm_context *ctx, nir_alu_instr *instr)
 	case nir_op_fddy_fine:
 	case nir_op_fddx_coarse:
 	case nir_op_fddy_coarse:
-		result = emit_ddxy(ctx, instr->op, src[0]);
-		break;
-
-	case nir_op_unpack_64_2x32_split_x: {
-		assert(instr->src[0].src.ssa->num_components == 1);
-		LLVMValueRef tmp = LLVMBuildBitCast(ctx->builder, src[0],
-						    LLVMVectorType(ctx->i32, 2),
-						    "");
-		result = LLVMBuildExtractElement(ctx->builder, tmp,
-						 ctx->i32zero, "");
+		result = emit_ddxy(ctx, instr, src[0]);
 		break;
-	}
-
-	case nir_op_unpack_64_2x32_split_y: {
-		assert(instr->src[0].src.ssa->num_components == 1);
-		LLVMValueRef tmp = LLVMBuildBitCast(ctx->builder, src[0],
-						    LLVMVectorType(ctx->i32, 2),
-						    "");
-		result = LLVMBuildExtractElement(ctx->builder, tmp,
-						 ctx->i32one, "");
-		break;
-	}
-
-	case nir_op_pack_64_2x32_split: {
-		LLVMValueRef tmp = LLVMGetUndef(LLVMVectorType(ctx->i32, 2));
-		tmp = LLVMBuildInsertElement(ctx->builder, tmp,
-					     src[0], ctx->i32zero, "");
-		tmp = LLVMBuildInsertElement(ctx->builder, tmp,
-					     src[1], ctx->i32one, "");
-		result = LLVMBuildBitCast(ctx->builder, tmp, ctx->i64, "");
-		break;
-	}
-
 	default:
 		fprintf(stderr, "Unknown NIR alu instr: ");
 		nir_print_instr(&instr->instr, stderr);
@@ -1861,6 +1579,36 @@ static LLVMValueRef cast_ptr(struct nir_to_llvm_context *ctx, LLVMValueRef ptr,
 }
 
 static LLVMValueRef
+emit_llvm_intrinsic(struct nir_to_llvm_context *ctx, const char *name,
+                    LLVMTypeRef return_type, LLVMValueRef *params,
+                    unsigned param_count, LLVMAttribute attribs)
+{
+	LLVMValueRef function;
+
+	function = LLVMGetNamedFunction(ctx->module, name);
+	if (!function) {
+		LLVMTypeRef param_types[32], function_type;
+		unsigned i;
+
+		assert(param_count <= 32);
+
+		for (i = 0; i < param_count; ++i) {
+			assert(params[i]);
+			param_types[i] = LLVMTypeOf(params[i]);
+		}
+		function_type =
+		    LLVMFunctionType(return_type, param_types, param_count, 0);
+		function = LLVMAddFunction(ctx->module, name, function_type);
+
+		LLVMSetFunctionCallConv(function, LLVMCCallConv);
+		LLVMSetLinkage(function, LLVMExternalLinkage);
+
+		LLVMAddFunctionAttr(function, attribs | LLVMNoUnwindAttribute);
+	}
+	return LLVMBuildCall(ctx->builder, function, params, param_count, "");
+}
+
+static LLVMValueRef
 get_buffer_size(struct nir_to_llvm_context *ctx, LLVMValueRef descriptor, bool in_elements)
 {
 	LLVMValueRef size =
@@ -1904,40 +1652,45 @@ static void build_int_type_name(
 }
 
 static LLVMValueRef radv_lower_gather4_integer(struct nir_to_llvm_context *ctx,
-					       struct ac_image_args *args,
-					       nir_tex_instr *instr)
+					       struct ac_tex_info *tinfo,
+					       nir_tex_instr *instr,
+					       const char *intr_name,
+					       unsigned coord_vgpr_index)
 {
-	enum glsl_base_type stype = glsl_get_sampler_result_type(instr->texture->var->type);
-	LLVMValueRef coord = args->addr;
+	LLVMValueRef coord = tinfo->args[0];
 	LLVMValueRef half_texel[2];
-	LLVMValueRef compare_cube_wa;
-	LLVMValueRef result;
 	int c;
-	unsigned coord_vgpr_index = (unsigned)args->offset + (unsigned)args->compare;
 
 	//TODO Rect
 	{
-		struct ac_image_args txq_args = { 0 };
-
-		txq_args.da = instr->is_array || instr->sampler_dim == GLSL_SAMPLER_DIM_CUBE;
-		txq_args.opcode = ac_image_get_resinfo;
-		txq_args.dmask = 0xf;
-		txq_args.addr = ctx->i32zero;
-		txq_args.resource = args->resource;
-		LLVMValueRef size = ac_build_image_opcode(&ctx->ac, &txq_args);
+		LLVMValueRef txq_args[10];
+		int txq_arg_count = 0;
+		LLVMValueRef size;
+		bool da = instr->is_array || instr->sampler_dim == GLSL_SAMPLER_DIM_CUBE;
+		txq_args[txq_arg_count++] = LLVMConstInt(ctx->i32, 0, false);
+		txq_args[txq_arg_count++] = tinfo->args[1];
+		txq_args[txq_arg_count++] = LLVMConstInt(ctx->i32, 0xf, 0); /* dmask */
+		txq_args[txq_arg_count++] = LLVMConstInt(ctx->i32, 0, 0); /* unorm */
+		txq_args[txq_arg_count++] = LLVMConstInt(ctx->i32, 0, 0); /* r128 */
+		txq_args[txq_arg_count++] = LLVMConstInt(ctx->i32, da ? 1 : 0, 0);
+		txq_args[txq_arg_count++] = LLVMConstInt(ctx->i32, 0, 0); /* glc */
+		txq_args[txq_arg_count++] = LLVMConstInt(ctx->i32, 0, 0); /* slc */
+		txq_args[txq_arg_count++] = LLVMConstInt(ctx->i32, 0, 0); /* tfe */
+		txq_args[txq_arg_count++] = LLVMConstInt(ctx->i32, 0, 0); /* lwe */
+		size = emit_llvm_intrinsic(ctx, "llvm.SI.getresinfo.i32", ctx->v4i32,
+					   txq_args, txq_arg_count,
+					   LLVMReadNoneAttribute);
 
 		for (c = 0; c < 2; c++) {
 			half_texel[c] = LLVMBuildExtractElement(ctx->builder, size,
 								LLVMConstInt(ctx->i32, c, false), "");
 			half_texel[c] = LLVMBuildUIToFP(ctx->builder, half_texel[c], ctx->f32, "");
-			half_texel[c] = ac_build_fdiv(&ctx->ac, ctx->f32one, half_texel[c]);
+			half_texel[c] = emit_fdiv(ctx, ctx->f32one, half_texel[c]);
 			half_texel[c] = LLVMBuildFMul(ctx->builder, half_texel[c],
 						      LLVMConstReal(ctx->f32, -0.5), "");
 		}
 	}
 
-	LLVMValueRef orig_coords = args->addr;
-
 	for (c = 0; c < 2; c++) {
 		LLVMValueRef tmp;
 		LLVMValueRef index = LLVMConstInt(ctx->i32, coord_vgpr_index + c, 0);
@@ -1948,135 +1701,78 @@ static LLVMValueRef radv_lower_gather4_integer(struct nir_to_llvm_context *ctx,
 		coord = LLVMBuildInsertElement(ctx->builder, coord, tmp, index, "");
 	}
 
+	tinfo->args[0] = coord;
+	return emit_llvm_intrinsic(ctx, intr_name, tinfo->dst_type, tinfo->args, tinfo->arg_count,
+				   LLVMReadNoneAttribute | LLVMNoUnwindAttribute);
 
-	/*
-	 * Apparantly cube has issue with integer types that the workaround doesn't solve,
-	 * so this tests if the format is 8_8_8_8 and an integer type do an alternate
-	 * workaround by sampling using a scaled type and converting.
-	 * This is taken from amdgpu-pro shaders.
-	 */
-	/* NOTE this produces some ugly code compared to amdgpu-pro,
-	 * LLVM ends up dumping SGPRs into VGPRs to deal with the compare/select,
-	 * and then reads them back. -pro generates two selects,
-	 * one s_cmp for the descriptor rewriting
-	 * one v_cmp for the coordinate and result changes.
-	 */
-	if (instr->sampler_dim == GLSL_SAMPLER_DIM_CUBE) {
-		LLVMValueRef tmp, tmp2;
-
-		/* workaround 8/8/8/8 uint/sint cube gather bug */
-		/* first detect it then change to a scaled read and f2i */
-		tmp = LLVMBuildExtractElement(ctx->builder, args->resource, ctx->i32one, "");
-		tmp2 = tmp;
-
-		/* extract the DATA_FORMAT */
-		tmp = ac_build_bfe(&ctx->ac, tmp, LLVMConstInt(ctx->i32, 20, false),
-				   LLVMConstInt(ctx->i32, 6, false), false);
-
-		/* is the DATA_FORMAT == 8_8_8_8 */
-		compare_cube_wa = LLVMBuildICmp(ctx->builder, LLVMIntEQ, tmp, LLVMConstInt(ctx->i32, V_008F14_IMG_DATA_FORMAT_8_8_8_8, false), "");
-
-		if (stype == GLSL_TYPE_UINT)
-			/* Create a NUM FORMAT - 0x2 or 0x4 - USCALED or UINT */
-			tmp = LLVMBuildSelect(ctx->builder, compare_cube_wa, LLVMConstInt(ctx->i32, 0x8000000, false),
-					      LLVMConstInt(ctx->i32, 0x10000000, false), "");
-		else
-			/* Create a NUM FORMAT - 0x3 or 0x5 - SSCALED or SINT */
-			tmp = LLVMBuildSelect(ctx->builder, compare_cube_wa, LLVMConstInt(ctx->i32, 0xc000000, false),
-					      LLVMConstInt(ctx->i32, 0x14000000, false), "");
-
-		/* replace the NUM FORMAT in the descriptor */
-		tmp2 = LLVMBuildAnd(ctx->builder, tmp2, LLVMConstInt(ctx->i32, C_008F14_NUM_FORMAT_GFX6, false), "");
-		tmp2 = LLVMBuildOr(ctx->builder, tmp2, tmp, "");
-
-		args->resource = LLVMBuildInsertElement(ctx->builder, args->resource, tmp2, ctx->i32one, "");
-
-		/* don't modify the coordinates for this case */
-		coord = LLVMBuildSelect(ctx->builder, compare_cube_wa, orig_coords, coord, "");
-	}
-	args->addr = coord;
-	result = ac_build_image_opcode(&ctx->ac, args);
-
-	if (instr->sampler_dim == GLSL_SAMPLER_DIM_CUBE) {
-		LLVMValueRef tmp, tmp2;
-
-		/* if the cube workaround is in place, f2i the result. */
-		for (c = 0; c < 4; c++) {
-			tmp = LLVMBuildExtractElement(ctx->builder, result, LLVMConstInt(ctx->i32, c, false), "");
-			if (stype == GLSL_TYPE_UINT)
-				tmp2 = LLVMBuildFPToUI(ctx->builder, tmp, ctx->i32, "");
-			else
-				tmp2 = LLVMBuildFPToSI(ctx->builder, tmp, ctx->i32, "");
-			tmp = LLVMBuildBitCast(ctx->builder, tmp, ctx->i32, "");
-			tmp2 = LLVMBuildBitCast(ctx->builder, tmp2, ctx->i32, "");
-			tmp = LLVMBuildSelect(ctx->builder, compare_cube_wa, tmp2, tmp, "");
-			tmp = LLVMBuildBitCast(ctx->builder, tmp, ctx->f32, "");
-			result = LLVMBuildInsertElement(ctx->builder, result, tmp, LLVMConstInt(ctx->i32, c, false), "");
-		}
-	}
-	return result;
 }
 
 static LLVMValueRef build_tex_intrinsic(struct nir_to_llvm_context *ctx,
 					nir_tex_instr *instr,
-					struct ac_image_args *args)
-{
-	if (instr->sampler_dim == GLSL_SAMPLER_DIM_BUF) {
-		return ac_build_buffer_load_format(&ctx->ac,
-						   args->resource,
-						   args->addr,
-						   LLVMConstInt(ctx->i32, 0, false),
-						   true);
-	}
-
-	args->opcode = ac_image_sample;
-	args->compare = instr->is_shadow;
-
+					struct ac_tex_info *tinfo)
+{
+	const char *name = "llvm.SI.image.sample";
+	const char *infix = "";
+	char intr_name[127];
+	char type[64];
+	bool is_shadow = instr->is_shadow;
+	bool has_offset = tinfo->has_offset;
 	switch (instr->op) {
 	case nir_texop_txf:
 	case nir_texop_txf_ms:
 	case nir_texop_samples_identical:
-		args->opcode = instr->sampler_dim == GLSL_SAMPLER_DIM_MS ? ac_image_load : ac_image_load_mip;
-		args->compare = false;
-		args->offset = false;
+		name = instr->sampler_dim == GLSL_SAMPLER_DIM_MS ? "llvm.SI.image.load" :
+		       instr->sampler_dim == GLSL_SAMPLER_DIM_BUF ? "llvm.SI.vs.load.input" :
+			"llvm.SI.image.load.mip";
+		is_shadow = false;
+		has_offset = false;
 		break;
 	case nir_texop_txb:
-		args->bias = true;
+		infix = ".b";
 		break;
 	case nir_texop_txl:
-		args->lod = true;
+		infix = ".l";
 		break;
 	case nir_texop_txs:
+		name = "llvm.SI.getresinfo";
+		break;
 	case nir_texop_query_levels:
-		args->opcode = ac_image_get_resinfo;
+		name = "llvm.SI.getresinfo";
 		break;
 	case nir_texop_tex:
 		if (ctx->stage != MESA_SHADER_FRAGMENT)
-			args->level_zero = true;
+			infix = ".lz";
 		break;
 	case nir_texop_txd:
-		args->deriv = true;
+		infix = ".d";
 		break;
 	case nir_texop_tg4:
-		args->opcode = ac_image_gather4;
-		args->level_zero = true;
+		name = "llvm.SI.gather4";
+		infix = ".lz";
 		break;
 	case nir_texop_lod:
-		args->opcode = ac_image_get_lod;
-		args->compare = false;
-		args->offset = false;
+		name = "llvm.SI.getlod";
+		is_shadow = false;
+		has_offset = false;
 		break;
 	default:
 		break;
 	}
 
+	build_int_type_name(LLVMTypeOf(tinfo->args[0]), type, sizeof(type));
+	sprintf(intr_name, "%s%s%s%s.%s", name, is_shadow ? ".c" : "", infix,
+		has_offset ? ".o" : "", type);
+
 	if (instr->op == nir_texop_tg4) {
 		enum glsl_base_type stype = glsl_get_sampler_result_type(instr->texture->var->type);
 		if (stype == GLSL_TYPE_UINT || stype == GLSL_TYPE_INT) {
-			return radv_lower_gather4_integer(ctx, args, instr);
+			return radv_lower_gather4_integer(ctx, tinfo, instr, intr_name,
+							  (int)has_offset + (int)is_shadow);
 		}
 	}
-	return ac_build_image_opcode(&ctx->ac, args);
+	return emit_llvm_intrinsic(ctx, intr_name, tinfo->dst_type, tinfo->args, tinfo->arg_count,
+				   LLVMReadNoneAttribute | LLVMNoUnwindAttribute);
+
 }
 
 static LLVMValueRef visit_vulkan_resource_index(struct nir_to_llvm_context *ctx,
@@ -2086,17 +1782,15 @@ static LLVMValueRef visit_vulkan_resource_index(struct nir_to_llvm_context *ctx,
 	unsigned desc_set = nir_intrinsic_desc_set(instr);
 	unsigned binding = nir_intrinsic_binding(instr);
 	LLVMValueRef desc_ptr = ctx->descriptor_sets[desc_set];
-	struct radv_pipeline_layout *pipeline_layout = ctx->options->layout;
-	struct radv_descriptor_set_layout *layout = pipeline_layout->set[desc_set].layout;
+	struct radv_descriptor_set_layout *layout = ctx->options->layout->set[desc_set].layout;
 	unsigned base_offset = layout->binding[binding].offset;
 	LLVMValueRef offset, stride;
 
 	if (layout->binding[binding].type == VK_DESCRIPTOR_TYPE_UNIFORM_BUFFER_DYNAMIC ||
 	    layout->binding[binding].type == VK_DESCRIPTOR_TYPE_STORAGE_BUFFER_DYNAMIC) {
-		unsigned idx = pipeline_layout->set[desc_set].dynamic_offset_start +
-			layout->binding[binding].dynamic_offset_offset;
 		desc_ptr = ctx->push_constants;
-		base_offset = pipeline_layout->push_constant_size + 16 * idx;
+		base_offset = ctx->options->layout->push_constant_size;
+		base_offset +=  16 * layout->binding[binding].dynamic_offset_offset;
 		stride = LLVMConstInt(ctx->i32, 16, false);
 	} else
 		stride = LLVMConstInt(ctx->i32, layout->binding[binding].size, false);
@@ -2104,8 +1798,9 @@ static LLVMValueRef visit_vulkan_resource_index(struct nir_to_llvm_context *ctx,
 	offset = LLVMConstInt(ctx->i32, base_offset, false);
 	index = LLVMBuildMul(ctx->builder, index, stride, "");
 	offset = LLVMBuildAdd(ctx->builder, offset, index, "");
-	
-	desc_ptr = ac_build_gep0(&ctx->ac, desc_ptr, offset);
+
+	LLVMValueRef indices[] = {ctx->i32zero, offset};
+	desc_ptr = LLVMBuildGEP(ctx->builder, desc_ptr, indices, 2, "");
 	desc_ptr = cast_ptr(ctx, desc_ptr, ctx->v4i32);
 	LLVMSetMetadata(desc_ptr, ctx->uniform_md_kind, ctx->empty_md);
 
@@ -2115,12 +1810,10 @@ static LLVMValueRef visit_vulkan_resource_index(struct nir_to_llvm_context *ctx,
 static LLVMValueRef visit_load_push_constant(struct nir_to_llvm_context *ctx,
                                              nir_intrinsic_instr *instr)
 {
-	LLVMValueRef ptr, addr;
-
-	addr = LLVMConstInt(ctx->i32, nir_intrinsic_base(instr), 0);
-	addr = LLVMBuildAdd(ctx->builder, addr, get_src(ctx, instr->src[0]), "");
+	LLVMValueRef ptr;
 
-	ptr = ac_build_gep0(&ctx->ac, ctx->push_constants, addr);
+	LLVMValueRef indices[] = {ctx->i32zero, get_src(ctx, instr->src[0])};
+	ptr = LLVMBuildGEP(ctx->builder, ctx->push_constants, indices, 2, "");
 	ptr = cast_ptr(ctx, ptr, get_def_type(ctx, &instr->dest.ssa));
 
 	return LLVMBuildLoad(ctx->builder, ptr, "");
@@ -2137,10 +1830,7 @@ static void visit_store_ssbo(struct nir_to_llvm_context *ctx,
                              nir_intrinsic_instr *instr)
 {
 	const char *store_name;
-	LLVMValueRef src_data = get_src(ctx, instr->src[0]);
 	LLVMTypeRef data_type = ctx->f32;
-	int elem_size_mult = get_elem_bits(ctx, LLVMTypeOf(src_data)) / 32;
-	int components_32bit = elem_size_mult * instr->num_components;
 	unsigned writemask = nir_intrinsic_write_mask(instr);
 	LLVMValueRef base_data, base_offset;
 	LLVMValueRef params[6];
@@ -2150,13 +1840,13 @@ static void visit_store_ssbo(struct nir_to_llvm_context *ctx,
 
 	params[1] = get_src(ctx, instr->src[1]);
 	params[2] = LLVMConstInt(ctx->i32, 0, false); /* vindex */
-	params[4] = ctx->i1false;  /* glc */
-	params[5] = ctx->i1false;  /* slc */
+	params[4] = LLVMConstInt(ctx->i1, 0, false);  /* glc */
+	params[5] = LLVMConstInt(ctx->i1, 0, false);  /* slc */
 
-	if (components_32bit > 1)
-		data_type = LLVMVectorType(ctx->f32, components_32bit);
+	if (instr->num_components > 1)
+		data_type = LLVMVectorType(ctx->f32, instr->num_components);
 
-	base_data = to_float(ctx, src_data);
+	base_data = to_float(ctx, get_src(ctx, instr->src[0]));
 	base_data = trim_vector(ctx, base_data, instr->num_components);
 	base_data = LLVMBuildBitCast(ctx->builder, base_data,
 				     data_type, "");
@@ -2175,14 +1865,6 @@ static void visit_store_ssbo(struct nir_to_llvm_context *ctx,
 			count = 2;
 		}
 
-		start *= elem_size_mult;
-		count *= elem_size_mult;
-
-		if (count > 4) {
-			writemask |= ((1u << (count - 4)) - 1u) << (start + 4);
-			count = 4;
-		}
-
 		if (count == 4) {
 			store_name = "llvm.amdgcn.buffer.store.v4f32";
 			data = base_data;
@@ -2214,8 +1896,8 @@ static void visit_store_ssbo(struct nir_to_llvm_context *ctx,
 		}
 		params[0] = data;
 		params[3] = offset;
-		ac_build_intrinsic(&ctx->ac, store_name,
-				   ctx->voidt, params, 6, 0);
+		emit_llvm_intrinsic(ctx, store_name,
+				    LLVMVoidTypeInContext(ctx->context), params, 6, 0);
 	}
 }
 
@@ -2223,19 +1905,19 @@ static LLVMValueRef visit_atomic_ssbo(struct nir_to_llvm_context *ctx,
                                       nir_intrinsic_instr *instr)
 {
 	const char *name;
-	LLVMValueRef params[6];
+	LLVMValueRef params[5];
 	int arg_count = 0;
 	if (ctx->stage == MESA_SHADER_FRAGMENT)
 		ctx->shader_info->fs.writes_memory = true;
 
 	if (instr->intrinsic == nir_intrinsic_ssbo_atomic_comp_swap) {
-		params[arg_count++] = llvm_extract_elem(ctx, get_src(ctx, instr->src[3]), 0);
+		params[arg_count++] = get_src(ctx, instr->src[3]);
 	}
-	params[arg_count++] = llvm_extract_elem(ctx, get_src(ctx, instr->src[2]), 0);
+	params[arg_count++] = get_src(ctx, instr->src[2]);
 	params[arg_count++] = get_src(ctx, instr->src[0]);
 	params[arg_count++] = LLVMConstInt(ctx->i32, 0, false); /* vindex */
 	params[arg_count++] = get_src(ctx, instr->src[1]);      /* voffset */
-	params[arg_count++] = ctx->i1false;  /* slc */
+	params[arg_count++] = LLVMConstInt(ctx->i1, 0, false);  /* slc */
 
 	switch (instr->intrinsic) {
 	case nir_intrinsic_ssbo_atomic_add:
@@ -2272,135 +1954,53 @@ static LLVMValueRef visit_atomic_ssbo(struct nir_to_llvm_context *ctx,
 		abort();
 	}
 
-	return ac_build_intrinsic(&ctx->ac, name, ctx->i32, params, arg_count, 0);
+	return emit_llvm_intrinsic(ctx, name, ctx->i32, params, arg_count, 0);
 }
 
 static LLVMValueRef visit_load_buffer(struct nir_to_llvm_context *ctx,
                                       nir_intrinsic_instr *instr)
 {
-	LLVMValueRef results[2];
-	int load_components;
-	int num_components = instr->num_components;
-	if (instr->dest.ssa.bit_size == 64)
-		num_components *= 2;
-
-	for (int i = 0; i < num_components; i += load_components) {
-		load_components = MIN2(num_components - i, 4);
-		const char *load_name;
-		LLVMTypeRef data_type = ctx->f32;
-		LLVMValueRef offset = LLVMConstInt(ctx->i32, i * 4, false);
-		offset = LLVMBuildAdd(ctx->builder, get_src(ctx, instr->src[1]), offset, "");
-
-		if (load_components == 3)
-			data_type = LLVMVectorType(ctx->f32, 4);
-		else if (load_components > 1)
-			data_type = LLVMVectorType(ctx->f32, load_components);
-
-		if (load_components >= 3)
-			load_name = "llvm.amdgcn.buffer.load.v4f32";
-		else if (load_components == 2)
-			load_name = "llvm.amdgcn.buffer.load.v2f32";
-		else if (load_components == 1)
-			load_name = "llvm.amdgcn.buffer.load.f32";
-		else
-			unreachable("unhandled number of components");
-
-		LLVMValueRef params[] = {
-			get_src(ctx, instr->src[0]),
-			LLVMConstInt(ctx->i32, 0, false),
-			offset,
-			ctx->i1false,
-			ctx->i1false,
-		};
-
-		results[i] = ac_build_intrinsic(&ctx->ac, load_name, data_type, params, 5, 0);
-
-	}
-
-	LLVMValueRef ret = results[0];
-	if (num_components > 4 || num_components == 3) {
-		LLVMValueRef masks[] = {
-		        LLVMConstInt(ctx->i32, 0, false), LLVMConstInt(ctx->i32, 1, false),
-		        LLVMConstInt(ctx->i32, 2, false), LLVMConstInt(ctx->i32, 3, false),
-			LLVMConstInt(ctx->i32, 4, false), LLVMConstInt(ctx->i32, 5, false),
-		        LLVMConstInt(ctx->i32, 6, false), LLVMConstInt(ctx->i32, 7, false)
-		};
-
-		LLVMValueRef swizzle = LLVMConstVector(masks, num_components);
-		ret = LLVMBuildShuffleVector(ctx->builder, results[0],
-					     results[num_components > 4 ? 1 : 0], swizzle, "");
-	}
-
-	return LLVMBuildBitCast(ctx->builder, ret,
-	                        get_def_type(ctx, &instr->dest.ssa), "");
-}
-
-static LLVMValueRef visit_load_ubo_buffer(struct nir_to_llvm_context *ctx,
-                                          nir_intrinsic_instr *instr)
-{
-	LLVMValueRef results[8], ret;
-	LLVMValueRef rsrc = get_src(ctx, instr->src[0]);
-	LLVMValueRef offset = get_src(ctx, instr->src[1]);
-	int num_components = instr->num_components;
-
-	rsrc = LLVMBuildBitCast(ctx->builder, rsrc, LLVMVectorType(ctx->i8, 16), "");
+	const char *load_name;
+	LLVMTypeRef data_type = ctx->f32;
+	if (instr->num_components == 3)
+		data_type = LLVMVectorType(ctx->f32, 4);
+	else if (instr->num_components > 1)
+		data_type = LLVMVectorType(ctx->f32, instr->num_components);
+
+	if (instr->num_components == 4 || instr->num_components == 3)
+		load_name = "llvm.amdgcn.buffer.load.v4f32";
+	else if (instr->num_components == 2)
+		load_name = "llvm.amdgcn.buffer.load.v2f32";
+	else if (instr->num_components == 1)
+		load_name = "llvm.amdgcn.buffer.load.f32";
+	else
+		abort();
 
-	if (instr->dest.ssa.bit_size == 64)
-		num_components *= 2;
+	LLVMValueRef params[] = {
+	    get_src(ctx, instr->src[0]),
+	    LLVMConstInt(ctx->i32, 0, false),
+	    get_src(ctx, instr->src[1]),
+	    LLVMConstInt(ctx->i1, 0, false),
+	    LLVMConstInt(ctx->i1, 0, false),
+	};
 
-	for (unsigned i = 0; i < num_components; ++i) {
-		LLVMValueRef params[] = {
-			rsrc,
-			LLVMBuildAdd(ctx->builder, LLVMConstInt(ctx->i32, 4 * i, 0),
-				     offset, "")
-		};
-		results[i] = ac_build_intrinsic(&ctx->ac, "llvm.SI.load.const", ctx->f32,
-						params, 2,
-						AC_FUNC_ATTR_READNONE |
-						AC_FUNC_ATTR_LEGACY);
-	}
+	LLVMValueRef ret =
+	    emit_llvm_intrinsic(ctx, load_name, data_type, params, 5, 0);
 
+	if (instr->num_components == 3)
+		ret = trim_vector(ctx, ret, 3);
 
-	ret = ac_build_gather_values(&ctx->ac, results, instr->num_components);
 	return LLVMBuildBitCast(ctx->builder, ret,
 	                        get_def_type(ctx, &instr->dest.ssa), "");
 }
 
 static void
-radv_get_deref_offset(struct nir_to_llvm_context *ctx, nir_deref_var *deref,
-		      bool vs_in, unsigned *vertex_index_out,
-		      LLVMValueRef *vertex_index_ref,
-		      unsigned *const_out, LLVMValueRef *indir_out)
+radv_get_deref_offset(struct nir_to_llvm_context *ctx, nir_deref *tail,
+                      bool vs_in, unsigned *const_out, LLVMValueRef *indir_out)
 {
 	unsigned const_offset = 0;
-	nir_deref *tail = &deref->deref;
 	LLVMValueRef offset = NULL;
 
-	if (vertex_index_out != NULL || vertex_index_ref != NULL) {
-		tail = tail->child;
-		nir_deref_array *deref_array = nir_deref_as_array(tail);
-		if (vertex_index_out)
-			*vertex_index_out = deref_array->base_offset;
-
-		if (vertex_index_ref) {
-			LLVMValueRef vtx = LLVMConstInt(ctx->i32, deref_array->base_offset, false);
-			if (deref_array->deref_array_type == nir_deref_array_type_indirect) {
-				vtx = LLVMBuildAdd(ctx->builder, vtx, get_src(ctx, deref_array->indirect), "");
-			}
-			*vertex_index_ref = vtx;
-		}
-	}
-
-	if (deref->var->data.compact) {
-		assert(tail->child->deref_type == nir_deref_type_array);
-		assert(glsl_type_is_scalar(glsl_without_array(deref->var->type)));
-		nir_deref_array *deref_array = nir_deref_as_array(tail->child);
-		/* We always lower indirect dereferences for "compact" array vars. */
-		assert(deref_array->deref_array_type == nir_deref_array_type_direct);
-
-		const_offset = deref_array->base_offset;
-		goto out;
-	}
 
 	while (tail->child != NULL) {
 		const struct glsl_type *parent_type = tail->type;
@@ -2435,7 +2035,7 @@ radv_get_deref_offset(struct nir_to_llvm_context *ctx, nir_deref_var *deref,
 			unreachable("unsupported deref type");
 
 	}
-out:
+
 	if (const_offset && offset)
 		offset = LLVMBuildAdd(ctx->builder, offset,
 				      LLVMConstInt(ctx->i32, const_offset, 0),
@@ -2445,397 +2045,26 @@ out:
 	*indir_out = offset;
 }
 
-static LLVMValueRef
-lds_load(struct nir_to_llvm_context *ctx,
-	 LLVMValueRef dw_addr)
-{
-	LLVMValueRef value;
-	value = ac_build_indexed_load(&ctx->ac, ctx->lds, dw_addr, false);
-	return value;
-}
-
-static void
-lds_store(struct nir_to_llvm_context *ctx,
-	  LLVMValueRef dw_addr, LLVMValueRef value)
-{
-	value = LLVMBuildBitCast(ctx->builder, value, ctx->i32, "");
-	ac_build_indexed_store(&ctx->ac, ctx->lds,
-			       dw_addr, value);
-}
-
-/* The offchip buffer layout for TCS->TES is
- *
- * - attribute 0 of patch 0 vertex 0
- * - attribute 0 of patch 0 vertex 1
- * - attribute 0 of patch 0 vertex 2
- *   ...
- * - attribute 0 of patch 1 vertex 0
- * - attribute 0 of patch 1 vertex 1
- *   ...
- * - attribute 1 of patch 0 vertex 0
- * - attribute 1 of patch 0 vertex 1
- *   ...
- * - per patch attribute 0 of patch 0
- * - per patch attribute 0 of patch 1
- *   ...
- *
- * Note that every attribute has 4 components.
- */
-static LLVMValueRef get_tcs_tes_buffer_address(struct nir_to_llvm_context *ctx,
-                                               LLVMValueRef vertex_index,
-                                               LLVMValueRef param_index)
-{
-	LLVMValueRef base_addr, vertices_per_patch, num_patches, total_vertices;
-	LLVMValueRef param_stride, constant16;
-	LLVMValueRef rel_patch_id = get_rel_patch_id(ctx);
-
-	vertices_per_patch = unpack_param(ctx, ctx->tcs_offchip_layout, 9, 6);
-	num_patches = unpack_param(ctx, ctx->tcs_offchip_layout, 0, 9);
-	total_vertices = LLVMBuildMul(ctx->builder, vertices_per_patch,
-	                              num_patches, "");
-
-	constant16 = LLVMConstInt(ctx->i32, 16, false);
-	if (vertex_index) {
-		base_addr = LLVMBuildMul(ctx->builder, rel_patch_id,
-		                         vertices_per_patch, "");
-
-		base_addr = LLVMBuildAdd(ctx->builder, base_addr,
-		                         vertex_index, "");
-
-		param_stride = total_vertices;
-	} else {
-		base_addr = rel_patch_id;
-		param_stride = num_patches;
-	}
-
-	base_addr = LLVMBuildAdd(ctx->builder, base_addr,
-	                         LLVMBuildMul(ctx->builder, param_index,
-	                                      param_stride, ""), "");
-
-	base_addr = LLVMBuildMul(ctx->builder, base_addr, constant16, "");
-
-	if (!vertex_index) {
-		LLVMValueRef patch_data_offset =
-		           unpack_param(ctx, ctx->tcs_offchip_layout, 16, 16);
-
-		base_addr = LLVMBuildAdd(ctx->builder, base_addr,
-		                         patch_data_offset, "");
-	}
-	return base_addr;
-}
-
-static LLVMValueRef get_tcs_tes_buffer_address_params(struct nir_to_llvm_context *ctx,
-						      unsigned param,
-						      unsigned const_index,
-						      bool is_compact,
-						      LLVMValueRef vertex_index,
-						      LLVMValueRef indir_index)
-{
-	LLVMValueRef param_index;
-
-	if (indir_index)
-		param_index = LLVMBuildAdd(ctx->builder, LLVMConstInt(ctx->i32, param, false),
-					   indir_index, "");
-	else {
-		if (const_index && !is_compact)
-			param += const_index;
-		param_index = LLVMConstInt(ctx->i32, param, false);
-	}
-	return get_tcs_tes_buffer_address(ctx, vertex_index, param_index);
-}
-
-static void
-mark_tess_output(struct nir_to_llvm_context *ctx,
-		 bool is_patch, uint32_t param)
-
-{
-	if (is_patch) {
-		ctx->tess_patch_outputs_written |= (1ull << param);
-	} else
-		ctx->tess_outputs_written |= (1ull << param);
-}
-
-static LLVMValueRef
-get_dw_address(struct nir_to_llvm_context *ctx,
-	       LLVMValueRef dw_addr,
-	       unsigned param,
-	       unsigned const_index,
-	       bool compact_const_index,
-	       LLVMValueRef vertex_index,
-	       LLVMValueRef stride,
-	       LLVMValueRef indir_index)
-
-{
-
-	if (vertex_index) {
-		dw_addr = LLVMBuildAdd(ctx->builder, dw_addr,
-				       LLVMBuildMul(ctx->builder,
-						    vertex_index,
-						    stride, ""), "");
-	}
-
-	if (indir_index)
-		dw_addr = LLVMBuildAdd(ctx->builder, dw_addr,
-				       LLVMBuildMul(ctx->builder, indir_index,
-						    LLVMConstInt(ctx->i32, 4, false), ""), "");
-	else if (const_index && !compact_const_index)
-		dw_addr = LLVMBuildAdd(ctx->builder, dw_addr,
-				       LLVMConstInt(ctx->i32, const_index, false), "");
-
-	dw_addr = LLVMBuildAdd(ctx->builder, dw_addr,
-			       LLVMConstInt(ctx->i32, param * 4, false), "");
-
-	if (const_index && compact_const_index)
-		dw_addr = LLVMBuildAdd(ctx->builder, dw_addr,
-				       LLVMConstInt(ctx->i32, const_index, false), "");
-	return dw_addr;
-}
-
-static LLVMValueRef
-load_tcs_input(struct nir_to_llvm_context *ctx,
-	       nir_intrinsic_instr *instr)
-{
-	LLVMValueRef dw_addr, stride;
-	unsigned const_index;
-	LLVMValueRef vertex_index;
-	LLVMValueRef indir_index;
-	unsigned param;
-	LLVMValueRef value[4], result;
-	const bool per_vertex = nir_is_per_vertex_io(instr->variables[0]->var, ctx->stage);
-	const bool is_compact = instr->variables[0]->var->data.compact;
-	param = shader_io_get_unique_index(instr->variables[0]->var->data.location);
-	radv_get_deref_offset(ctx, instr->variables[0],
-			      false, NULL, per_vertex ? &vertex_index : NULL,
-			      &const_index, &indir_index);
-
-	stride = unpack_param(ctx, ctx->tcs_in_layout, 13, 8);
-	dw_addr = get_tcs_in_current_patch_offset(ctx);
-	dw_addr = get_dw_address(ctx, dw_addr, param, const_index, is_compact, vertex_index, stride,
-				 indir_index);
-
-	for (unsigned i = 0; i < instr->num_components; i++) {
-		value[i] = lds_load(ctx, dw_addr);
-		dw_addr = LLVMBuildAdd(ctx->builder, dw_addr,
-				       ctx->i32one, "");
-	}
-	result = ac_build_gather_values(&ctx->ac, value, instr->num_components);
-	result = LLVMBuildBitCast(ctx->builder, result, get_def_type(ctx, &instr->dest.ssa), "");
-	return result;
-}
-
-static LLVMValueRef
-load_tcs_output(struct nir_to_llvm_context *ctx,
-	       nir_intrinsic_instr *instr)
-{
-	LLVMValueRef dw_addr, stride;
-	LLVMValueRef value[4], result;
-	LLVMValueRef vertex_index = NULL;
-	LLVMValueRef indir_index = NULL;
-	unsigned const_index = 0;
-	unsigned param;
-	const bool per_vertex = nir_is_per_vertex_io(instr->variables[0]->var, ctx->stage);
-	const bool is_compact = instr->variables[0]->var->data.compact;
-	param = shader_io_get_unique_index(instr->variables[0]->var->data.location);
-	radv_get_deref_offset(ctx, instr->variables[0],
-			      false, NULL, per_vertex ? &vertex_index : NULL,
-			      &const_index, &indir_index);
-
-	if (!instr->variables[0]->var->data.patch) {
-		stride = unpack_param(ctx, ctx->tcs_out_layout, 13, 8);
-		dw_addr = get_tcs_out_current_patch_offset(ctx);
-	} else {
-		dw_addr = get_tcs_out_current_patch_data_offset(ctx);
-	}
-
-	dw_addr = get_dw_address(ctx, dw_addr, param, const_index, is_compact, vertex_index, stride,
-				 indir_index);
-
-	for (unsigned i = 0; i < instr->num_components; i++) {
-		value[i] = lds_load(ctx, dw_addr);
-		dw_addr = LLVMBuildAdd(ctx->builder, dw_addr,
-				       ctx->i32one, "");
-	}
-	result = ac_build_gather_values(&ctx->ac, value, instr->num_components);
-	result = LLVMBuildBitCast(ctx->builder, result, get_def_type(ctx, &instr->dest.ssa), "");
-	return result;
-}
-
-static void
-store_tcs_output(struct nir_to_llvm_context *ctx,
-		 nir_intrinsic_instr *instr,
-		 LLVMValueRef src,
-		 unsigned writemask)
-{
-	LLVMValueRef stride, dw_addr;
-	LLVMValueRef buf_addr = NULL;
-	LLVMValueRef vertex_index = NULL;
-	LLVMValueRef indir_index = NULL;
-	unsigned const_index = 0;
-	unsigned param;
-	const bool per_vertex = nir_is_per_vertex_io(instr->variables[0]->var, ctx->stage);
-	const bool is_compact = instr->variables[0]->var->data.compact;
-
-	radv_get_deref_offset(ctx, instr->variables[0],
-			      false, NULL, per_vertex ? &vertex_index : NULL,
-			      &const_index, &indir_index);
-
-	param = shader_io_get_unique_index(instr->variables[0]->var->data.location);
-	if (instr->variables[0]->var->data.location == VARYING_SLOT_CLIP_DIST0 &&
-	    is_compact && const_index > 3) {
-		const_index -= 3;
-		param++;
-	}
-
-	if (!instr->variables[0]->var->data.patch) {
-		stride = unpack_param(ctx, ctx->tcs_out_layout, 13, 8);
-		dw_addr = get_tcs_out_current_patch_offset(ctx);
-	} else {
-		dw_addr = get_tcs_out_current_patch_data_offset(ctx);
-	}
-
-	mark_tess_output(ctx, instr->variables[0]->var->data.patch, param);
-
-	dw_addr = get_dw_address(ctx, dw_addr, param, const_index, is_compact, vertex_index, stride,
-				 indir_index);
-	buf_addr = get_tcs_tes_buffer_address_params(ctx, param, const_index, is_compact,
-						     vertex_index, indir_index);
-
-	unsigned base = is_compact ? const_index : 0;
-	for (unsigned chan = 0; chan < 8; chan++) {
-		bool is_tess_factor = false;
-		if (!(writemask & (1 << chan)))
-			continue;
-		LLVMValueRef value = llvm_extract_elem(ctx, src, chan);
-
-		lds_store(ctx, dw_addr, value);
-
-		if (instr->variables[0]->var->data.location == VARYING_SLOT_TESS_LEVEL_INNER ||
-		    instr->variables[0]->var->data.location == VARYING_SLOT_TESS_LEVEL_OUTER)
-			is_tess_factor = true;
-
-		if (!is_tess_factor && writemask != 0xF)
-			ac_build_buffer_store_dword(&ctx->ac, ctx->hs_ring_tess_offchip, value, 1,
-						    buf_addr, ctx->oc_lds,
-						    4 * (base + chan), 1, 0, true, false);
-
-		dw_addr = LLVMBuildAdd(ctx->builder, dw_addr,
-				       ctx->i32one, "");
-	}
-
-	if (writemask == 0xF) {
-		ac_build_buffer_store_dword(&ctx->ac, ctx->hs_ring_tess_offchip, src, 4,
-					    buf_addr, ctx->oc_lds,
-					    (base * 4), 1, 0, true, false);
-	}
-}
-
-static LLVMValueRef
-load_tes_input(struct nir_to_llvm_context *ctx,
-	       nir_intrinsic_instr *instr)
-{
-	LLVMValueRef buf_addr;
-	LLVMValueRef result;
-	LLVMValueRef vertex_index = NULL;
-	LLVMValueRef indir_index = NULL;
-	unsigned const_index = 0;
-	unsigned param;
-	const bool per_vertex = nir_is_per_vertex_io(instr->variables[0]->var, ctx->stage);
-	const bool is_compact = instr->variables[0]->var->data.compact;
-
-	radv_get_deref_offset(ctx, instr->variables[0],
-			      false, NULL, per_vertex ? &vertex_index : NULL,
-			      &const_index, &indir_index);
-	param = shader_io_get_unique_index(instr->variables[0]->var->data.location);
-	if (instr->variables[0]->var->data.location == VARYING_SLOT_CLIP_DIST0 &&
-	    is_compact && const_index > 3) {
-		const_index -= 3;
-		param++;
-	}
-	buf_addr = get_tcs_tes_buffer_address_params(ctx, param, const_index,
-						     is_compact, vertex_index, indir_index);
-
-	result = ac_build_buffer_load(&ctx->ac, ctx->hs_ring_tess_offchip, instr->num_components, NULL,
-				      buf_addr, ctx->oc_lds, is_compact ? (4 * const_index) : 0, 1, 0, true);
-	result = trim_vector(ctx, result, instr->num_components);
-	result = LLVMBuildBitCast(ctx->builder, result, get_def_type(ctx, &instr->dest.ssa), "");
-	return result;
-}
-
-static LLVMValueRef
-load_gs_input(struct nir_to_llvm_context *ctx,
-	      nir_intrinsic_instr *instr)
-{
-	LLVMValueRef indir_index, vtx_offset;
-	unsigned const_index;
-	LLVMValueRef args[9];
-	unsigned param, vtx_offset_param;
-	LLVMValueRef value[4], result;
-	unsigned vertex_index;
-	radv_get_deref_offset(ctx, instr->variables[0],
-			      false, &vertex_index, NULL,
-			      &const_index, &indir_index);
-	vtx_offset_param = vertex_index;
-	assert(vtx_offset_param < 6);
-	vtx_offset = LLVMBuildMul(ctx->builder, ctx->gs_vtx_offset[vtx_offset_param],
-				  LLVMConstInt(ctx->i32, 4, false), "");
-
-	param = shader_io_get_unique_index(instr->variables[0]->var->data.location);
-	for (unsigned i = 0; i < instr->num_components; i++) {
-
-		args[0] = ctx->esgs_ring;
-		args[1] = vtx_offset;
-		args[2] = LLVMConstInt(ctx->i32, (param * 4 + i + const_index) * 256, false);
-		args[3] = ctx->i32zero;
-		args[4] = ctx->i32one; /* OFFEN */
-		args[5] = ctx->i32zero; /* IDXEN */
-		args[6] = ctx->i32one; /* GLC */
-		args[7] = ctx->i32zero; /* SLC */
-		args[8] = ctx->i32zero; /* TFE */
-
-		value[i] = ac_build_intrinsic(&ctx->ac, "llvm.SI.buffer.load.dword.i32.i32",
-					      ctx->i32, args, 9,
-					      AC_FUNC_ATTR_READONLY |
-					      AC_FUNC_ATTR_LEGACY);
-	}
-	result = ac_build_gather_values(&ctx->ac, value, instr->num_components);
-
-	return result;
-}
-
 static LLVMValueRef visit_load_var(struct nir_to_llvm_context *ctx,
 				   nir_intrinsic_instr *instr)
 {
-	LLVMValueRef values[8];
+	LLVMValueRef values[4];
 	int idx = instr->variables[0]->var->data.driver_location;
 	int ve = instr->dest.ssa.num_components;
 	LLVMValueRef indir_index;
-	LLVMValueRef ret;
 	unsigned const_index;
-	bool vs_in = ctx->stage == MESA_SHADER_VERTEX &&
-	             instr->variables[0]->var->data.mode == nir_var_shader_in;
-	radv_get_deref_offset(ctx, instr->variables[0], vs_in, NULL, NULL,
-				      &const_index, &indir_index);
-
-	if (instr->dest.ssa.bit_size == 64)
-		ve *= 2;
-
 	switch (instr->variables[0]->var->data.mode) {
 	case nir_var_shader_in:
-		if (ctx->stage == MESA_SHADER_TESS_CTRL)
-			return load_tcs_input(ctx, instr);
-		if (ctx->stage == MESA_SHADER_TESS_EVAL)
-			return load_tes_input(ctx, instr);
-		if (ctx->stage == MESA_SHADER_GEOMETRY) {
-			return load_gs_input(ctx, instr);
-		}
+		radv_get_deref_offset(ctx, &instr->variables[0]->deref,
+				      ctx->stage == MESA_SHADER_VERTEX,
+				      &const_index, &indir_index);
 		for (unsigned chan = 0; chan < ve; chan++) {
 			if (indir_index) {
 				unsigned count = glsl_count_attribute_slots(
 						instr->variables[0]->var->type,
 						ctx->stage == MESA_SHADER_VERTEX);
-				count -= chan / 4;
-				LLVMValueRef tmp_vec = ac_build_gather_values_extended(
-						&ctx->ac, ctx->inputs + idx + chan, count,
+				LLVMValueRef tmp_vec = build_gather_values_extended(
+						ctx, ctx->inputs + idx + chan, count,
 						4, false);
 
 				values[chan] = LLVMBuildExtractElement(ctx->builder,
@@ -2844,15 +2073,17 @@ static LLVMValueRef visit_load_var(struct nir_to_llvm_context *ctx,
 			} else
 				values[chan] = ctx->inputs[idx + chan + const_index * 4];
 		}
+		return to_integer(ctx, build_gather_values(ctx, values, ve));
 		break;
 	case nir_var_local:
+		radv_get_deref_offset(ctx, &instr->variables[0]->deref, false,
+				      &const_index, &indir_index);
 		for (unsigned chan = 0; chan < ve; chan++) {
 			if (indir_index) {
 				unsigned count = glsl_count_attribute_slots(
 					instr->variables[0]->var->type, false);
-				count -= chan / 4;
-				LLVMValueRef tmp_vec = ac_build_gather_values_extended(
-						&ctx->ac, ctx->locals + idx + chan, count,
+				LLVMValueRef tmp_vec = build_gather_values_extended(
+						ctx, ctx->locals + idx + chan, count,
 						4, true);
 
 				values[chan] = LLVMBuildExtractElement(ctx->builder,
@@ -2862,17 +2093,16 @@ static LLVMValueRef visit_load_var(struct nir_to_llvm_context *ctx,
 				values[chan] = LLVMBuildLoad(ctx->builder, ctx->locals[idx + chan + const_index * 4], "");
 			}
 		}
-		break;
+		return to_integer(ctx, build_gather_values(ctx, values, ve));
 	case nir_var_shader_out:
-		if (ctx->stage == MESA_SHADER_TESS_CTRL)
-			return load_tcs_output(ctx, instr);
+		radv_get_deref_offset(ctx, &instr->variables[0]->deref, false,
+				      &const_index, &indir_index);
 		for (unsigned chan = 0; chan < ve; chan++) {
 			if (indir_index) {
 				unsigned count = glsl_count_attribute_slots(
 						instr->variables[0]->var->type, false);
-				count -= chan / 4;
-				LLVMValueRef tmp_vec = ac_build_gather_values_extended(
-						&ctx->ac, ctx->outputs + idx + chan, count,
+				LLVMValueRef tmp_vec = build_gather_values_extended(
+						ctx, ctx->outputs + idx + chan, count,
 						4, true);
 
 				values[chan] = LLVMBuildExtractElement(ctx->builder,
@@ -2884,29 +2114,24 @@ static LLVMValueRef visit_load_var(struct nir_to_llvm_context *ctx,
 						     "");
 			}
 		}
-		break;
+		return to_integer(ctx, build_gather_values(ctx, values, ve));
 	case nir_var_shared: {
+		radv_get_deref_offset(ctx, &instr->variables[0]->deref, false,
+				      &const_index, &indir_index);
 		LLVMValueRef ptr = get_shared_memory_ptr(ctx, idx, ctx->i32);
 		LLVMValueRef derived_ptr;
-
+		LLVMValueRef index = ctx->i32zero;
 		if (indir_index)
-			indir_index = LLVMBuildMul(ctx->builder, indir_index, LLVMConstInt(ctx->i32, 4, false), "");
+			index = LLVMBuildAdd(ctx->builder, index, indir_index, "");
+		derived_ptr = LLVMBuildGEP(ctx->builder, ptr, &index, 1, "");
 
-		for (unsigned chan = 0; chan < ve; chan++) {
-			LLVMValueRef index = LLVMConstInt(ctx->i32, chan, false);
-			if (indir_index)
-				index = LLVMBuildAdd(ctx->builder, index, indir_index, "");
-			derived_ptr = LLVMBuildGEP(ctx->builder, ptr, &index, 1, "");
-
-			values[chan] = LLVMBuildLoad(ctx->builder, derived_ptr, "");
-		}
+		return to_integer(ctx, LLVMBuildLoad(ctx->builder, derived_ptr, ""));
 		break;
 	}
 	default:
-		unreachable("unhandle variable mode");
+		break;
 	}
-	ret = ac_build_gather_values(&ctx->ac, values, ve);
-	return LLVMBuildBitCast(ctx->builder, ret, get_def_type(ctx, &instr->dest.ssa), "");
+	return NULL;
 }
 
 static void
@@ -2919,46 +2144,30 @@ visit_store_var(struct nir_to_llvm_context *ctx,
 	int writemask = instr->const_index[0];
 	LLVMValueRef indir_index;
 	unsigned const_index;
-	radv_get_deref_offset(ctx, instr->variables[0], false,
-	                      NULL, NULL, &const_index, &indir_index);
-
-	if (get_elem_bits(ctx, LLVMTypeOf(src)) == 64) {
-		int old_writemask = writemask;
-
-		src = LLVMBuildBitCast(ctx->builder, src,
-		                       LLVMVectorType(ctx->f32, get_llvm_num_components(src) * 2),
-		                       "");
-
-		writemask = 0;
-		for (unsigned chan = 0; chan < 4; chan++) {
-			if (old_writemask & (1 << chan))
-				writemask |= 3u << (2 * chan);
-		}
-	}
-
 	switch (instr->variables[0]->var->data.mode) {
 	case nir_var_shader_out:
-
-		if (ctx->stage == MESA_SHADER_TESS_CTRL) {
-			store_tcs_output(ctx, instr, src, writemask);
-			return;
-		}
-
-		for (unsigned chan = 0; chan < 8; chan++) {
+		radv_get_deref_offset(ctx, &instr->variables[0]->deref, false,
+				      &const_index, &indir_index);
+		for (unsigned chan = 0; chan < 4; chan++) {
 			int stride = 4;
 			if (!(writemask & (1 << chan)))
 				continue;
+			if (get_llvm_num_components(src) == 1)
+				value = src;
+			else
+				value = LLVMBuildExtractElement(ctx->builder, src,
+								LLVMConstInt(ctx->i32,
+									     chan, false),
+								"");
 
-			value = llvm_extract_elem(ctx, src, chan);
-
-			if (instr->variables[0]->var->data.compact)
+			if (instr->variables[0]->var->data.location == VARYING_SLOT_CLIP_DIST0 ||
+			    instr->variables[0]->var->data.location == VARYING_SLOT_CULL_DIST0)
 				stride = 1;
 			if (indir_index) {
 				unsigned count = glsl_count_attribute_slots(
 						instr->variables[0]->var->type, false);
-				count -= chan / 4;
-				LLVMValueRef tmp_vec = ac_build_gather_values_extended(
-						&ctx->ac, ctx->outputs + idx + chan, count,
+				LLVMValueRef tmp_vec = build_gather_values_extended(
+						ctx, ctx->outputs + idx + chan, count,
 						stride, true);
 
 				if (get_llvm_num_components(tmp_vec) > 1) {
@@ -2977,17 +2186,22 @@ visit_store_var(struct nir_to_llvm_context *ctx,
 		}
 		break;
 	case nir_var_local:
-		for (unsigned chan = 0; chan < 8; chan++) {
+		radv_get_deref_offset(ctx, &instr->variables[0]->deref, false,
+				      &const_index, &indir_index);
+		for (unsigned chan = 0; chan < 4; chan++) {
 			if (!(writemask & (1 << chan)))
 				continue;
 
-			value = llvm_extract_elem(ctx, src, chan);
+			if (get_llvm_num_components(src) == 1)
+				value = src;
+			else
+				value = LLVMBuildExtractElement(ctx->builder, src,
+								LLVMConstInt(ctx->i32, chan, false), "");
 			if (indir_index) {
 				unsigned count = glsl_count_attribute_slots(
 					instr->variables[0]->var->type, false);
-				count -= chan / 4;
-				LLVMValueRef tmp_vec = ac_build_gather_values_extended(
-					&ctx->ac, ctx->locals + idx + chan, count,
+				LLVMValueRef tmp_vec = build_gather_values_extended(
+					ctx, ctx->locals + idx + chan, count,
 					4, true);
 
 				tmp_vec = LLVMBuildInsertElement(ctx->builder, tmp_vec,
@@ -3002,25 +2216,19 @@ visit_store_var(struct nir_to_llvm_context *ctx,
 		}
 		break;
 	case nir_var_shared: {
-		LLVMValueRef ptr = get_shared_memory_ptr(ctx, idx, ctx->i32);
-
-		if (indir_index)
-			indir_index = LLVMBuildMul(ctx->builder, indir_index, LLVMConstInt(ctx->i32, 4, false), "");
-
-		for (unsigned chan = 0; chan < 8; chan++) {
-			if (!(writemask & (1 << chan)))
-				continue;
-			LLVMValueRef index = LLVMConstInt(ctx->i32, chan, false);
-			LLVMValueRef derived_ptr;
+		LLVMValueRef ptr;
+		radv_get_deref_offset(ctx, &instr->variables[0]->deref, false,
+				      &const_index, &indir_index);
 
-			if (indir_index)
-				index = LLVMBuildAdd(ctx->builder, index, indir_index, "");
+		ptr = get_shared_memory_ptr(ctx, idx, ctx->i32);
+		LLVMValueRef index = ctx->i32zero;
+		LLVMValueRef derived_ptr;
 
-			value = llvm_extract_elem(ctx, src, chan);
-			derived_ptr = LLVMBuildGEP(ctx->builder, ptr, &index, 1, "");
-			LLVMBuildStore(ctx->builder,
-			               to_integer(ctx, value), derived_ptr);
-		}
+		if (indir_index)
+			index = LLVMBuildAdd(ctx->builder, index, indir_index, "");
+		derived_ptr = LLVMBuildGEP(ctx->builder, ptr, &index, 1, "");
+		LLVMBuildStore(ctx->builder,
+			       to_integer(ctx, src), derived_ptr);
 		break;
 	}
 	default:
@@ -3037,103 +2245,20 @@ static int image_type_to_components_count(enum glsl_sampler_dim dim, bool array)
 		return array ? 2 : 1;
 	case GLSL_SAMPLER_DIM_2D:
 		return array ? 3 : 2;
-	case GLSL_SAMPLER_DIM_MS:
-		return array ? 4 : 3;
 	case GLSL_SAMPLER_DIM_3D:
 	case GLSL_SAMPLER_DIM_CUBE:
 		return 3;
 	case GLSL_SAMPLER_DIM_RECT:
 	case GLSL_SAMPLER_DIM_SUBPASS:
 		return 2;
-	case GLSL_SAMPLER_DIM_SUBPASS_MS:
-		return 3;
 	default:
 		break;
 	}
 	return 0;
 }
 
-
-
-/* Adjust the sample index according to FMASK.
- *
- * For uncompressed MSAA surfaces, FMASK should return 0x76543210,
- * which is the identity mapping. Each nibble says which physical sample
- * should be fetched to get that sample.
- *
- * For example, 0x11111100 means there are only 2 samples stored and
- * the second sample covers 3/4 of the pixel. When reading samples 0
- * and 1, return physical sample 0 (determined by the first two 0s
- * in FMASK), otherwise return physical sample 1.
- *
- * The sample index should be adjusted as follows:
- *   sample_index = (fmask >> (sample_index * 4)) & 0xF;
- */
-static LLVMValueRef adjust_sample_index_using_fmask(struct nir_to_llvm_context *ctx,
-						    LLVMValueRef coord_x, LLVMValueRef coord_y,
-						    LLVMValueRef coord_z,
-						    LLVMValueRef sample_index,
-						    LLVMValueRef fmask_desc_ptr)
-{
-	LLVMValueRef fmask_load_address[4];
-	LLVMValueRef res;
-
-	fmask_load_address[0] = coord_x;
-	fmask_load_address[1] = coord_y;
-	if (coord_z) {
-		fmask_load_address[2] = coord_z;
-		fmask_load_address[3] = LLVMGetUndef(ctx->i32);
-	}
-
-	struct ac_image_args args = {0};
-
-	args.opcode = ac_image_load;
-	args.da = coord_z ? true : false;
-	args.resource = fmask_desc_ptr;
-	args.dmask = 0xf;
-	args.addr = ac_build_gather_values(&ctx->ac, fmask_load_address, coord_z ? 4 : 2);
-
-	res = ac_build_image_opcode(&ctx->ac, &args);
-
-	res = to_integer(ctx, res);
-	LLVMValueRef four = LLVMConstInt(ctx->i32, 4, false);
-	LLVMValueRef F = LLVMConstInt(ctx->i32, 0xf, false);
-
-	LLVMValueRef fmask = LLVMBuildExtractElement(ctx->builder,
-						     res,
-						     ctx->i32zero, "");
-
-	LLVMValueRef sample_index4 =
-		LLVMBuildMul(ctx->builder, sample_index, four, "");
-	LLVMValueRef shifted_fmask =
-		LLVMBuildLShr(ctx->builder, fmask, sample_index4, "");
-	LLVMValueRef final_sample =
-		LLVMBuildAnd(ctx->builder, shifted_fmask, F, "");
-
-	/* Don't rewrite the sample index if WORD1.DATA_FORMAT of the FMASK
-	 * resource descriptor is 0 (invalid),
-	 */
-	LLVMValueRef fmask_desc =
-		LLVMBuildBitCast(ctx->builder, fmask_desc_ptr,
-				 ctx->v8i32, "");
-
-	LLVMValueRef fmask_word1 =
-		LLVMBuildExtractElement(ctx->builder, fmask_desc,
-					ctx->i32one, "");
-
-	LLVMValueRef word1_is_nonzero =
-		LLVMBuildICmp(ctx->builder, LLVMIntNE,
-			      fmask_word1, ctx->i32zero, "");
-
-	/* Replace the MSAA sample index. */
-	sample_index =
-		LLVMBuildSelect(ctx->builder, word1_is_nonzero,
-				final_sample, sample_index, "");
-	return sample_index;
-}
-
 static LLVMValueRef get_image_coords(struct nir_to_llvm_context *ctx,
-				     nir_intrinsic_instr *instr)
+				     nir_intrinsic_instr *instr, bool add_frag_pos)
 {
 	const struct glsl_type *type = instr->variables[0]->var->type;
 	if(instr->variables[0]->deref.child)
@@ -3146,39 +2271,10 @@ static LLVMValueRef get_image_coords(struct nir_to_llvm_context *ctx,
 		LLVMConstInt(ctx->i32, 2, false), LLVMConstInt(ctx->i32, 3, false),
 	};
 	LLVMValueRef res;
-	LLVMValueRef sample_index = llvm_extract_elem(ctx, get_src(ctx, instr->src[1]), 0);
-
 	int count;
-	enum glsl_sampler_dim dim = glsl_get_sampler_dim(type);
-	bool add_frag_pos = (dim == GLSL_SAMPLER_DIM_SUBPASS ||
-			     dim == GLSL_SAMPLER_DIM_SUBPASS_MS);
-	bool is_ms = (dim == GLSL_SAMPLER_DIM_MS ||
-		      dim == GLSL_SAMPLER_DIM_SUBPASS_MS);
-
-	count = image_type_to_components_count(dim,
+	count = image_type_to_components_count(glsl_get_sampler_dim(type),
 					       glsl_sampler_type_is_array(type));
 
-	if (is_ms) {
-		LLVMValueRef fmask_load_address[3];
-		int chan;
-
-		fmask_load_address[0] = LLVMBuildExtractElement(ctx->builder, src0, masks[0], "");
-		fmask_load_address[1] = LLVMBuildExtractElement(ctx->builder, src0, masks[1], "");
-		if (glsl_sampler_type_is_array(type))
-			fmask_load_address[2] = LLVMBuildExtractElement(ctx->builder, src0, masks[2], "");
-		else
-			fmask_load_address[2] = NULL;
-		if (add_frag_pos) {
-			for (chan = 0; chan < 2; ++chan)
-				fmask_load_address[chan] = LLVMBuildAdd(ctx->builder, fmask_load_address[chan], LLVMBuildFPToUI(ctx->builder, ctx->frag_pos[chan], ctx->i32, ""), "");
-		}
-		sample_index = adjust_sample_index_using_fmask(ctx,
-							       fmask_load_address[0],
-							       fmask_load_address[1],
-							       fmask_load_address[2],
-							       sample_index,
-							       get_sampler_desc(ctx, instr->variables[0], DESC_FMASK));
-	}
 	if (count == 1) {
 		if (instr->src[0].ssa->num_components)
 			res = LLVMBuildExtractElement(ctx->builder, src0, masks[0], "");
@@ -3186,8 +2282,6 @@ static LLVMValueRef get_image_coords(struct nir_to_llvm_context *ctx,
 			res = src0;
 	} else {
 		int chan;
-		if (is_ms)
-			count--;
 		for (chan = 0; chan < count; ++chan) {
 			coords[chan] = LLVMBuildExtractElement(ctx->builder, src0, masks[chan], "");
 		}
@@ -3196,20 +2290,76 @@ static LLVMValueRef get_image_coords(struct nir_to_llvm_context *ctx,
 			for (chan = 0; chan < count; ++chan)
 				coords[chan] = LLVMBuildAdd(ctx->builder, coords[chan], LLVMBuildFPToUI(ctx->builder, ctx->frag_pos[chan], ctx->i32, ""), "");
 		}
-		if (is_ms) {
-			coords[count] = sample_index;
-			count++;
-		}
-
 		if (count == 3) {
 			coords[3] = LLVMGetUndef(ctx->i32);
 			count = 4;
 		}
-		res = ac_build_gather_values(&ctx->ac, coords, count);
+		res = build_gather_values(ctx, coords, count);
 	}
 	return res;
 }
 
+static void build_type_name_for_intr(
+        LLVMTypeRef type,
+        char *buf, unsigned bufsize)
+{
+        LLVMTypeRef elem_type = type;
+
+        assert(bufsize >= 8);
+
+        if (LLVMGetTypeKind(type) == LLVMVectorTypeKind) {
+                int ret = snprintf(buf, bufsize, "v%u",
+                                        LLVMGetVectorSize(type));
+                if (ret < 0) {
+                        char *type_name = LLVMPrintTypeToString(type);
+                        fprintf(stderr, "Error building type name for: %s\n",
+                                type_name);
+                        return;
+                }
+                elem_type = LLVMGetElementType(type);
+                buf += ret;
+                bufsize -= ret;
+        }
+        switch (LLVMGetTypeKind(elem_type)) {
+        default: break;
+        case LLVMIntegerTypeKind:
+                snprintf(buf, bufsize, "i%d", LLVMGetIntTypeWidth(elem_type));
+                break;
+        case LLVMFloatTypeKind:
+                snprintf(buf, bufsize, "f32");
+                break;
+        case LLVMDoubleTypeKind:
+                snprintf(buf, bufsize, "f64");
+                break;
+        }
+}
+
+static void get_image_intr_name(const char *base_name,
+                                LLVMTypeRef data_type,
+                                LLVMTypeRef coords_type,
+                                LLVMTypeRef rsrc_type,
+                                char *out_name, unsigned out_len)
+{
+        char coords_type_name[8];
+
+        build_type_name_for_intr(coords_type, coords_type_name,
+                            sizeof(coords_type_name));
+
+        if (HAVE_LLVM <= 0x0309) {
+                snprintf(out_name, out_len, "%s.%s", base_name, coords_type_name);
+        } else {
+                char data_type_name[8];
+                char rsrc_type_name[8];
+
+                build_type_name_for_intr(data_type, data_type_name,
+                                        sizeof(data_type_name));
+                build_type_name_for_intr(rsrc_type, rsrc_type_name,
+                                        sizeof(rsrc_type_name));
+                snprintf(out_name, out_len, "%s.%s.%s.%s", base_name,
+                         data_type_name, coords_type_name, rsrc_type_name);
+        }
+}
+
 static LLVMValueRef visit_image_load(struct nir_to_llvm_context *ctx,
 				     nir_intrinsic_instr *instr)
 {
@@ -3227,44 +2377,45 @@ static LLVMValueRef visit_image_load(struct nir_to_llvm_context *ctx,
 		params[1] = LLVMBuildExtractElement(ctx->builder, get_src(ctx, instr->src[0]),
 						    LLVMConstInt(ctx->i32, 0, false), ""); /* vindex */
 		params[2] = LLVMConstInt(ctx->i32, 0, false); /* voffset */
-		params[3] = ctx->i1false;  /* glc */
-		params[4] = ctx->i1false;  /* slc */
-		res = ac_build_intrinsic(&ctx->ac, "llvm.amdgcn.buffer.load.format.v4f32", ctx->v4f32,
-					 params, 5, 0);
+		params[3] = LLVMConstInt(ctx->i1, 0, false);  /* glc */
+		params[4] = LLVMConstInt(ctx->i1, 0, false);  /* slc */
+		res = emit_llvm_intrinsic(ctx, "llvm.amdgcn.buffer.load.format.v4f32", ctx->v4f32,
+					  params, 5, 0);
 
 		res = trim_vector(ctx, res, instr->dest.ssa.num_components);
 		res = to_integer(ctx, res);
 	} else {
 		bool is_da = glsl_sampler_type_is_array(type) ||
 			     glsl_get_sampler_dim(type) == GLSL_SAMPLER_DIM_CUBE;
-		LLVMValueRef da = is_da ? ctx->i1true : ctx->i1false;
-		LLVMValueRef glc = ctx->i1false;
-		LLVMValueRef slc = ctx->i1false;
+		bool add_frag_pos = glsl_get_sampler_dim(type) == GLSL_SAMPLER_DIM_SUBPASS;
+		LLVMValueRef da = is_da ? ctx->i32one : ctx->i32zero;
+		LLVMValueRef glc = LLVMConstInt(ctx->i1, 0, false);
+		LLVMValueRef slc = LLVMConstInt(ctx->i1, 0, false);
 
-		params[0] = get_image_coords(ctx, instr);
+		params[0] = get_image_coords(ctx, instr, add_frag_pos);
 		params[1] = get_sampler_desc(ctx, instr->variables[0], DESC_IMAGE);
 		params[2] = LLVMConstInt(ctx->i32, 15, false); /* dmask */
 		if (HAVE_LLVM <= 0x0309) {
-			params[3] = ctx->i1false;  /* r128 */
+			params[3] = LLVMConstInt(ctx->i1, 0, false);  /* r128 */
 			params[4] = da;
 			params[5] = glc;
 			params[6] = slc;
 		} else {
-			LLVMValueRef lwe = ctx->i1false;
+			LLVMValueRef lwe = LLVMConstInt(ctx->i1, 0, false);
 			params[3] = glc;
 			params[4] = slc;
 			params[5] = lwe;
 			params[6] = da;
 		}
 
-		ac_get_image_intr_name("llvm.amdgcn.image.load",
-				       ctx->v4f32, /* vdata */
-				       LLVMTypeOf(params[0]), /* coords */
-				       LLVMTypeOf(params[1]), /* rsrc */
-				       intrinsic_name, sizeof(intrinsic_name));
+		get_image_intr_name("llvm.amdgcn.image.load",
+				    ctx->v4f32, /* vdata */
+				    LLVMTypeOf(params[0]), /* coords */
+				    LLVMTypeOf(params[1]), /* rsrc */
+				    intrinsic_name, sizeof(intrinsic_name));
 
-		res = ac_build_intrinsic(&ctx->ac, intrinsic_name, ctx->v4f32,
-					 params, 7, AC_FUNC_ATTR_READONLY);
+		res = emit_llvm_intrinsic(ctx, intrinsic_name, ctx->v4f32,
+					params, 7, LLVMReadOnlyAttribute);
 	}
 	return to_integer(ctx, res);
 }
@@ -3275,11 +2426,10 @@ static void visit_image_store(struct nir_to_llvm_context *ctx,
 	LLVMValueRef params[8];
 	char intrinsic_name[64];
 	const nir_variable *var = instr->variables[0]->var;
+	LLVMValueRef i1false = LLVMConstInt(ctx->i1, 0, 0);
+	LLVMValueRef i1true = LLVMConstInt(ctx->i1, 1, 0);
 	const struct glsl_type *type = glsl_without_array(var->type);
-	LLVMValueRef glc = ctx->i1false;
-	bool force_glc = ctx->options->chip_class == SI;
-	if (force_glc)
-		glc = ctx->i1true;
+
 	if (ctx->stage == MESA_SHADER_FRAGMENT)
 		ctx->shader_info->fs.writes_memory = true;
 
@@ -3289,41 +2439,42 @@ static void visit_image_store(struct nir_to_llvm_context *ctx,
 		params[2] = LLVMBuildExtractElement(ctx->builder, get_src(ctx, instr->src[0]),
 						    LLVMConstInt(ctx->i32, 0, false), ""); /* vindex */
 		params[3] = LLVMConstInt(ctx->i32, 0, false); /* voffset */
-		params[4] = glc;  /* glc */
-		params[5] = ctx->i1false;  /* slc */
-		ac_build_intrinsic(&ctx->ac, "llvm.amdgcn.buffer.store.format.v4f32", ctx->voidt,
-				   params, 6, 0);
+		params[4] = i1false;  /* glc */
+		params[5] = i1false;  /* slc */
+		emit_llvm_intrinsic(ctx, "llvm.amdgcn.buffer.store.format.v4f32", ctx->voidt,
+				    params, 6, 0);
 	} else {
 		bool is_da = glsl_sampler_type_is_array(type) ||
 			     glsl_get_sampler_dim(type) == GLSL_SAMPLER_DIM_CUBE;
-		LLVMValueRef da = is_da ? ctx->i1true : ctx->i1false;
-		LLVMValueRef slc = ctx->i1false;
+		LLVMValueRef da = is_da ? i1true : i1false;
+		LLVMValueRef glc = i1false;
+		LLVMValueRef slc = i1false;
 
 		params[0] = to_float(ctx, get_src(ctx, instr->src[2]));
-		params[1] = get_image_coords(ctx, instr); /* coords */
+		params[1] = get_image_coords(ctx, instr, false); /* coords */
 		params[2] = get_sampler_desc(ctx, instr->variables[0], DESC_IMAGE);
 		params[3] = LLVMConstInt(ctx->i32, 15, false); /* dmask */
 		if (HAVE_LLVM <= 0x0309) {
-			params[4] = ctx->i1false;  /* r128 */
+			params[4] = i1false;  /* r128 */
 			params[5] = da;
 			params[6] = glc;
 			params[7] = slc;
 		} else {
-			LLVMValueRef lwe = ctx->i1false;
+			LLVMValueRef lwe = i1false;
 			params[4] = glc;
 			params[5] = slc;
 			params[6] = lwe;
 			params[7] = da;
 		}
 
-		ac_get_image_intr_name("llvm.amdgcn.image.store",
-				       LLVMTypeOf(params[0]), /* vdata */
-				       LLVMTypeOf(params[1]), /* coords */
-				       LLVMTypeOf(params[2]), /* rsrc */
-				       intrinsic_name, sizeof(intrinsic_name));
+		get_image_intr_name("llvm.amdgcn.image.store",
+				    LLVMTypeOf(params[0]), /* vdata */
+				    LLVMTypeOf(params[1]), /* coords */
+				    LLVMTypeOf(params[2]), /* rsrc */
+				    intrinsic_name, sizeof(intrinsic_name));
 
-		ac_build_intrinsic(&ctx->ac, intrinsic_name, ctx->voidt,
-				   params, 8, 0);
+		emit_llvm_intrinsic(ctx, intrinsic_name, ctx->voidt,
+				    params, 8, 0);
 	}
 
 }
@@ -3334,15 +2485,39 @@ static LLVMValueRef visit_image_atomic(struct nir_to_llvm_context *ctx,
 	LLVMValueRef params[6];
 	int param_count = 0;
 	const nir_variable *var = instr->variables[0]->var;
-
+	LLVMValueRef i1false = LLVMConstInt(ctx->i1, 0, 0);
+	LLVMValueRef i1true = LLVMConstInt(ctx->i1, 1, 0);
+	const char *base_name = "llvm.amdgcn.image.atomic";
 	const char *atomic_name;
-	char intrinsic_name[41];
+	LLVMValueRef coords;
+	char intrinsic_name[32], coords_type[8];
 	const struct glsl_type *type = glsl_without_array(var->type);
-	MAYBE_UNUSED int length;
 
 	if (ctx->stage == MESA_SHADER_FRAGMENT)
 		ctx->shader_info->fs.writes_memory = true;
 
+	params[param_count++] = get_src(ctx, instr->src[2]);
+	if (instr->intrinsic == nir_intrinsic_image_atomic_comp_swap)
+		params[param_count++] = get_src(ctx, instr->src[3]);
+
+	if (glsl_get_sampler_dim(type) == GLSL_SAMPLER_DIM_BUF) {
+		params[param_count++] = get_sampler_desc(ctx, instr->variables[0], DESC_BUFFER);
+		coords = params[param_count++] = LLVMBuildExtractElement(ctx->builder, get_src(ctx, instr->src[0]),
+									LLVMConstInt(ctx->i32, 0, false), ""); /* vindex */
+		params[param_count++] = ctx->i32zero; /* voffset */
+		params[param_count++] = i1false;  /* glc */
+		params[param_count++] = i1false;  /* slc */
+	} else {
+		bool da = glsl_sampler_type_is_array(type) ||
+		          glsl_get_sampler_dim(type) == GLSL_SAMPLER_DIM_CUBE;
+
+		coords = params[param_count++] = get_image_coords(ctx, instr, false);
+		params[param_count++] = get_sampler_desc(ctx, instr->variables[0], DESC_IMAGE);
+		params[param_count++] = i1false; /* r128 */
+		params[param_count++] = da ? i1true : i1false;      /* da */
+		params[param_count++] = i1false;  /* slc */
+	}
+
 	switch (instr->intrinsic) {
 	case nir_intrinsic_image_atomic_add:
 		atomic_name = "add";
@@ -3371,46 +2546,19 @@ static LLVMValueRef visit_image_atomic(struct nir_to_llvm_context *ctx,
 	default:
 		abort();
 	}
+	build_int_type_name(LLVMTypeOf(coords),
+			    coords_type, sizeof(coords_type));
 
-	if (instr->intrinsic == nir_intrinsic_image_atomic_comp_swap)
-		params[param_count++] = get_src(ctx, instr->src[3]);
-	params[param_count++] = get_src(ctx, instr->src[2]);
-
-	if (glsl_get_sampler_dim(type) == GLSL_SAMPLER_DIM_BUF) {
-		params[param_count++] = get_sampler_desc(ctx, instr->variables[0], DESC_BUFFER);
-		params[param_count++] = LLVMBuildExtractElement(ctx->builder, get_src(ctx, instr->src[0]),
-								LLVMConstInt(ctx->i32, 0, false), ""); /* vindex */
-		params[param_count++] = ctx->i32zero; /* voffset */
-		params[param_count++] = ctx->i1false;  /* slc */
-
-		length = snprintf(intrinsic_name, sizeof(intrinsic_name),
-				  "llvm.amdgcn.buffer.atomic.%s", atomic_name);
-	} else {
-		char coords_type[8];
-
-		bool da = glsl_sampler_type_is_array(type) ||
-		          glsl_get_sampler_dim(type) == GLSL_SAMPLER_DIM_CUBE;
-
-		LLVMValueRef coords = params[param_count++] = get_image_coords(ctx, instr);
-		params[param_count++] = get_sampler_desc(ctx, instr->variables[0], DESC_IMAGE);
-		params[param_count++] = ctx->i1false; /* r128 */
-		params[param_count++] = da ? ctx->i1true : ctx->i1false;      /* da */
-		params[param_count++] = ctx->i1false;  /* slc */
-
-		build_int_type_name(LLVMTypeOf(coords),
-				    coords_type, sizeof(coords_type));
-
-		length = snprintf(intrinsic_name, sizeof(intrinsic_name),
-				  "llvm.amdgcn.image.atomic.%s.%s", atomic_name, coords_type);
-	}
-
-	return ac_build_intrinsic(&ctx->ac, intrinsic_name, ctx->i32, params, param_count, 0);
+	snprintf(intrinsic_name, sizeof(intrinsic_name),
+			 "%s.%s.%s", base_name, atomic_name, coords_type);
+	return emit_llvm_intrinsic(ctx, intrinsic_name, ctx->i32, params, param_count, 0);
 }
 
 static LLVMValueRef visit_image_size(struct nir_to_llvm_context *ctx,
 				     nir_intrinsic_instr *instr)
 {
 	LLVMValueRef res;
+	LLVMValueRef params[10];
 	const nir_variable *var = instr->variables[0]->var;
 	const struct glsl_type *type = instr->variables[0]->var->type;
 	bool da = glsl_sampler_type_is_array(var->type) ||
@@ -3420,16 +2568,19 @@ static LLVMValueRef visit_image_size(struct nir_to_llvm_context *ctx,
 
 	if (glsl_get_sampler_dim(type) == GLSL_SAMPLER_DIM_BUF)
 		return get_buffer_size(ctx, get_sampler_desc(ctx, instr->variables[0], DESC_BUFFER), true);
-
-	struct ac_image_args args = { 0 };
-
-	args.da = da;
-	args.dmask = 0xf;
-	args.resource = get_sampler_desc(ctx, instr->variables[0], DESC_IMAGE);
-	args.opcode = ac_image_get_resinfo;
-	args.addr = ctx->i32zero;
-
-	res = ac_build_image_opcode(&ctx->ac, &args);
+	params[0] = ctx->i32zero;
+	params[1] = get_sampler_desc(ctx, instr->variables[0], DESC_IMAGE);
+	params[2] = LLVMConstInt(ctx->i32, 15, false);
+	params[3] = ctx->i32zero;
+	params[4] = ctx->i32zero;
+	params[5] = da ? ctx->i32one : ctx->i32zero;
+	params[6] = ctx->i32zero;
+	params[7] = ctx->i32zero;
+	params[8] = ctx->i32zero;
+	params[9] = ctx->i32zero;
+
+	res = emit_llvm_intrinsic(ctx, "llvm.SI.getresinfo.i32", ctx->v4i32,
+				  params, 10, LLVMReadNoneAttribute);
 
 	if (glsl_get_sampler_dim(type) == GLSL_SAMPLER_DIM_CUBE &&
 	    glsl_sampler_type_is_array(type)) {
@@ -3442,33 +2593,20 @@ static LLVMValueRef visit_image_size(struct nir_to_llvm_context *ctx,
 	return res;
 }
 
-#define NOOP_WAITCNT 0xf7f
-#define LGKM_CNT 0x07f
-#define VM_CNT 0xf70
-
-static void emit_waitcnt(struct nir_to_llvm_context *ctx,
-			 unsigned simm16)
+static void emit_waitcnt(struct nir_to_llvm_context *ctx)
 {
 	LLVMValueRef args[1] = {
-		LLVMConstInt(ctx->i32, simm16, false),
+		LLVMConstInt(ctx->i32, 0xf70, false),
 	};
-	ac_build_intrinsic(&ctx->ac, "llvm.amdgcn.s.waitcnt",
-			   ctx->voidt, args, 1, 0);
+	emit_llvm_intrinsic(ctx, "llvm.amdgcn.s.waitcnt",
+			    ctx->voidt, args, 1, 0);
 }
 
 static void emit_barrier(struct nir_to_llvm_context *ctx)
 {
-	/* SI only (thanks to a hw bug workaround):
-	 * The real barrier instruction isn’t needed, because an entire patch
-	 * always fits into a single wave.
-	 */
-	if (ctx->options->chip_class == SI &&
-	    ctx->stage == MESA_SHADER_TESS_CTRL) {
-		emit_waitcnt(ctx, LGKM_CNT & VM_CNT);
-		return;
-	}
-	ac_build_intrinsic(&ctx->ac, "llvm.amdgcn.s.barrier",
-			   ctx->voidt, NULL, 0, AC_FUNC_ATTR_CONVERGENT);
+	// TODO tess
+	emit_llvm_intrinsic(ctx, "llvm.amdgcn.s.barrier",
+			    ctx->voidt, NULL, 0, 0);
 }
 
 static void emit_discard_if(struct nir_to_llvm_context *ctx,
@@ -3484,14 +2622,16 @@ static void emit_discard_if(struct nir_to_llvm_context *ctx,
 	cond = LLVMBuildSelect(ctx->builder, cond,
 			       LLVMConstReal(ctx->f32, -1.0f),
 			       ctx->f32zero, "");
-	ac_build_kill(&ctx->ac, cond);
+	emit_llvm_intrinsic(ctx, "llvm.AMDGPU.kill",
+			    LLVMVoidTypeInContext(ctx->context),
+			    &cond, 1, 0);
 }
 
 static LLVMValueRef
 visit_load_local_invocation_index(struct nir_to_llvm_context *ctx)
 {
 	LLVMValueRef result;
-	LLVMValueRef thread_id = ac_get_thread_id(&ctx->ac);
+	LLVMValueRef thread_id = get_thread_id(ctx);
 	result = LLVMBuildAnd(ctx->builder, ctx->tg_size,
 			      LLVMConstInt(ctx->i32, 0xfc0, false), "");
 
@@ -3589,26 +2729,15 @@ static LLVMValueRef lookup_interp_param(struct nir_to_llvm_context *ctx,
 static LLVMValueRef load_sample_position(struct nir_to_llvm_context *ctx,
 					 LLVMValueRef sample_id)
 {
-	LLVMValueRef result;
-	LLVMValueRef ptr = ac_build_gep0(&ctx->ac, ctx->ring_offsets, LLVMConstInt(ctx->i32, RING_PS_SAMPLE_POSITIONS, false));
-
-	ptr = LLVMBuildBitCast(ctx->builder, ptr,
-			       const_array(ctx->v2f32, 64), "");
-
-	sample_id = LLVMBuildAdd(ctx->builder, sample_id, ctx->sample_pos_offset, "");
-	result = ac_build_indexed_load(&ctx->ac, ptr, sample_id, false);
-
-	ctx->shader_info->fs.uses_sample_positions = true;
-	return result;
-}
+	/* offset = sample_id * 8  (8 = 2 floats containing samplepos.xy) */
+	LLVMValueRef offset0 = LLVMBuildMul(ctx->builder, sample_id, LLVMConstInt(ctx->i32, 8, false), "");
+	LLVMValueRef offset1 = LLVMBuildAdd(ctx->builder, offset0, LLVMConstInt(ctx->i32, 4, false), "");
+	LLVMValueRef result[2];
 
-static LLVMValueRef load_sample_pos(struct nir_to_llvm_context *ctx)
-{
-	LLVMValueRef values[2];
+	result[0] = build_indexed_load_const(ctx, ctx->sample_positions, offset0);
+	result[1] = build_indexed_load_const(ctx, ctx->sample_positions, offset1);
 
-	values[0] = emit_ffract(ctx, ctx->frag_pos[0]);
-	values[1] = emit_ffract(ctx, ctx->frag_pos[1]);
-	return ac_build_gather_values(&ctx->ac, values, 2);
+	return build_gather_values(ctx, result, 2);
 }
 
 static LLVMValueRef visit_interp(struct nir_to_llvm_context *ctx,
@@ -3619,6 +2748,7 @@ static LLVMValueRef visit_interp(struct nir_to_llvm_context *ctx,
 	unsigned location;
 	unsigned chan;
 	LLVMValueRef src_c0, src_c1;
+	const char *intr_name;
 	LLVMValueRef src0;
 	int input_index = instr->variables[0]->var->data.location - VARYING_SLOT_VAR0;
 	switch (instr->intrinsic) {
@@ -3627,7 +2757,7 @@ static LLVMValueRef visit_interp(struct nir_to_llvm_context *ctx,
 		break;
 	case nir_intrinsic_interp_var_at_sample:
 	case nir_intrinsic_interp_var_at_offset:
-		location = INTERP_CENTER;
+		location = INTERP_SAMPLE;
 		src0 = get_src(ctx, instr->src[0]);
 		break;
 	default:
@@ -3652,7 +2782,7 @@ static LLVMValueRef visit_interp(struct nir_to_llvm_context *ctx,
 	interp_param = lookup_interp_param(ctx, instr->variables[0]->var->data.interpolation, location);
 	attr_number = LLVMConstInt(ctx->i32, input_index, false);
 
-	if (location == INTERP_SAMPLE || location == INTERP_CENTER) {
+	if (location == INTERP_SAMPLE) {
 		LLVMValueRef ij_out[2];
 		LLVMValueRef ddxy_out = emit_ddxy_interp(ctx, interp_param);
 
@@ -3687,127 +2817,23 @@ static LLVMValueRef visit_interp(struct nir_to_llvm_context *ctx,
 			ij_out[i] = LLVMBuildBitCast(ctx->builder,
 						     temp2, ctx->i32, "");
 		}
-		interp_param = ac_build_gather_values(&ctx->ac, ij_out, 2);
+		interp_param = build_gather_values(ctx, ij_out, 2);
 
 	}
-
+	intr_name = interp_param ? "llvm.SI.fs.interp" : "llvm.SI.fs.constant";
 	for (chan = 0; chan < 2; chan++) {
+		LLVMValueRef args[4];
 		LLVMValueRef llvm_chan = LLVMConstInt(ctx->i32, chan, false);
 
-		if (interp_param) {
-			interp_param = LLVMBuildBitCast(ctx->builder,
-							interp_param, LLVMVectorType(ctx->f32, 2), "");
-			LLVMValueRef i = LLVMBuildExtractElement(
-				ctx->builder, interp_param, ctx->i32zero, "");
-			LLVMValueRef j = LLVMBuildExtractElement(
-				ctx->builder, interp_param, ctx->i32one, "");
-
-			result[chan] = ac_build_fs_interp(&ctx->ac,
-							  llvm_chan, attr_number,
-							  ctx->prim_mask, i, j);
-		} else {
-			result[chan] = ac_build_fs_interp_mov(&ctx->ac,
-							      LLVMConstInt(ctx->i32, 2, false),
-							      llvm_chan, attr_number,
-							      ctx->prim_mask);
-		}
+		args[0] = llvm_chan;
+		args[1] = attr_number;
+		args[2] = ctx->prim_mask;
+		args[3] = interp_param;
+		result[chan] = emit_llvm_intrinsic(ctx, intr_name,
+						   ctx->f32, args, args[3] ? 4 : 3,
+						   LLVMReadNoneAttribute);
 	}
-	return ac_build_gather_values(&ctx->ac, result, 2);
-}
-
-static void
-visit_emit_vertex(struct nir_to_llvm_context *ctx,
-		  nir_intrinsic_instr *instr)
-{
-	LLVMValueRef gs_next_vertex;
-	LLVMValueRef can_emit, kill;
-	int idx;
-
-	assert(instr->const_index[0] == 0);
-	/* Write vertex attribute values to GSVS ring */
-	gs_next_vertex = LLVMBuildLoad(ctx->builder,
-				       ctx->gs_next_vertex,
-				       "");
-
-	/* If this thread has already emitted the declared maximum number of
-	 * vertices, kill it: excessive vertex emissions are not supposed to
-	 * have any effect, and GS threads have no externally observable
-	 * effects other than emitting vertices.
-	 */
-	can_emit = LLVMBuildICmp(ctx->builder, LLVMIntULT, gs_next_vertex,
-				 LLVMConstInt(ctx->i32, ctx->gs_max_out_vertices, false), "");
-
-	kill = LLVMBuildSelect(ctx->builder, can_emit,
-			       LLVMConstReal(ctx->f32, 1.0f),
-			       LLVMConstReal(ctx->f32, -1.0f), "");
-	ac_build_kill(&ctx->ac, kill);
-
-	/* loop num outputs */
-	idx = 0;
-	for (unsigned i = 0; i < RADEON_LLVM_MAX_OUTPUTS; ++i) {
-		LLVMValueRef *out_ptr = &ctx->outputs[i * 4];
-		int length = 4;
-		int slot = idx;
-		int slot_inc = 1;
-
-		if (!(ctx->output_mask & (1ull << i)))
-			continue;
-
-		if (i == VARYING_SLOT_CLIP_DIST0) {
-			/* pack clip and cull into a single set of slots */
-			length = ctx->num_output_clips + ctx->num_output_culls;
-			if (length > 4)
-				slot_inc = 2;
-		}
-		for (unsigned j = 0; j < length; j++) {
-			LLVMValueRef out_val = LLVMBuildLoad(ctx->builder,
-							     out_ptr[j], "");
-			LLVMValueRef voffset = LLVMConstInt(ctx->i32, (slot * 4 + j) * ctx->gs_max_out_vertices, false);
-			voffset = LLVMBuildAdd(ctx->builder, voffset, gs_next_vertex, "");
-			voffset = LLVMBuildMul(ctx->builder, voffset, LLVMConstInt(ctx->i32, 4, false), "");
-
-			out_val = LLVMBuildBitCast(ctx->builder, out_val, ctx->i32, "");
-
-			ac_build_buffer_store_dword(&ctx->ac, ctx->gsvs_ring,
-						    out_val, 1,
-						    voffset, ctx->gs2vs_offset, 0,
-						    1, 1, true, true);
-		}
-		idx += slot_inc;
-	}
-
-	gs_next_vertex = LLVMBuildAdd(ctx->builder, gs_next_vertex,
-				      ctx->i32one, "");
-	LLVMBuildStore(ctx->builder, gs_next_vertex, ctx->gs_next_vertex);
-
-	ac_build_sendmsg(&ctx->ac, AC_SENDMSG_GS_OP_EMIT | AC_SENDMSG_GS | (0 << 8), ctx->gs_wave_id);
-}
-
-static void
-visit_end_primitive(struct nir_to_llvm_context *ctx,
-		    nir_intrinsic_instr *instr)
-{
-	ac_build_sendmsg(&ctx->ac, AC_SENDMSG_GS_OP_CUT | AC_SENDMSG_GS | (0 << 8), ctx->gs_wave_id);
-}
-
-static LLVMValueRef
-visit_load_tess_coord(struct nir_to_llvm_context *ctx,
-		      nir_intrinsic_instr *instr)
-{
-	LLVMValueRef coord[4] = {
-		ctx->tes_u,
-		ctx->tes_v,
-		ctx->f32zero,
-		ctx->f32zero,
-	};
-
-	if (ctx->tes_primitive_mode == GL_TRIANGLES)
-		coord[2] = LLVMBuildFSub(ctx->builder, ctx->f32one,
-					LLVMBuildFAdd(ctx->builder, coord[0], coord[1], ""), "");
-
-	LLVMValueRef result = ac_build_gather_values(&ctx->ac, coord, instr->num_components);
-	return LLVMBuildBitCast(ctx->builder, result,
-				get_def_type(ctx, &instr->dest.ssa), "");
+	return build_gather_values(ctx, result, 2);
 }
 
 static void visit_intrinsic(struct nir_to_llvm_context *ctx,
@@ -3835,35 +2861,8 @@ static void visit_intrinsic(struct nir_to_llvm_context *ctx,
 	case nir_intrinsic_load_base_instance:
 		result = ctx->start_instance;
 		break;
-	case nir_intrinsic_load_draw_id:
-		result = ctx->draw_index;
-		break;
-	case nir_intrinsic_load_invocation_id:
-		if (ctx->stage == MESA_SHADER_TESS_CTRL)
-			result = unpack_param(ctx, ctx->tcs_rel_ids, 8, 5);
-		else
-			result = ctx->gs_invocation_id;
-		break;
-	case nir_intrinsic_load_primitive_id:
-		if (ctx->stage == MESA_SHADER_GEOMETRY)
-			result = ctx->gs_prim_id;
-		else if (ctx->stage == MESA_SHADER_TESS_CTRL)
-			result = ctx->tcs_patch_id;
-		else if (ctx->stage == MESA_SHADER_TESS_EVAL)
-			result = ctx->tes_patch_id;
-		else
-			fprintf(stderr, "Unknown primitive id intrinsic: %d", ctx->stage);
-		break;
 	case nir_intrinsic_load_sample_id:
-		ctx->shader_info->fs.force_persample = true;
-		result = unpack_param(ctx, ctx->ancillary, 8, 4);
-		break;
-	case nir_intrinsic_load_sample_pos:
-		ctx->shader_info->fs.force_persample = true;
-		result = load_sample_pos(ctx);
-		break;
-	case nir_intrinsic_load_sample_mask_in:
-		result = ctx->sample_coverage;
+		result = ctx->ancillary;
 		break;
 	case nir_intrinsic_load_front_face:
 		result = ctx->front_face;
@@ -3904,7 +2903,7 @@ static void visit_intrinsic(struct nir_to_llvm_context *ctx,
 		result = visit_atomic_ssbo(ctx, instr);
 		break;
 	case nir_intrinsic_load_ubo:
-		result = visit_load_ubo_buffer(ctx, instr);
+		result = visit_load_buffer(ctx, instr);
 		break;
 	case nir_intrinsic_get_buffer_size:
 		result = visit_get_buffer_size(ctx, instr);
@@ -3936,15 +2935,15 @@ static void visit_intrinsic(struct nir_to_llvm_context *ctx,
 		break;
 	case nir_intrinsic_discard:
 		ctx->shader_info->fs.can_discard = true;
-		ac_build_intrinsic(&ctx->ac, "llvm.AMDGPU.kilp",
-				   ctx->voidt,
-				   NULL, 0, AC_FUNC_ATTR_LEGACY);
+		emit_llvm_intrinsic(ctx, "llvm.AMDGPU.kilp",
+				    LLVMVoidTypeInContext(ctx->context),
+				    NULL, 0, 0);
 		break;
 	case nir_intrinsic_discard_if:
 		emit_discard_if(ctx, instr);
 		break;
 	case nir_intrinsic_memory_barrier:
-		emit_waitcnt(ctx, VM_CNT);
+		emit_waitcnt(ctx);
 		break;
 	case nir_intrinsic_barrier:
 		emit_barrier(ctx);
@@ -3966,18 +2965,6 @@ static void visit_intrinsic(struct nir_to_llvm_context *ctx,
 	case nir_intrinsic_interp_var_at_offset:
 		result = visit_interp(ctx, instr);
 		break;
-	case nir_intrinsic_emit_vertex:
-		visit_emit_vertex(ctx, instr);
-		break;
-	case nir_intrinsic_end_primitive:
-		visit_end_primitive(ctx, instr);
-		break;
-	case nir_intrinsic_load_tess_coord:
-		result = visit_load_tess_coord(ctx, instr);
-		break;
-	case nir_intrinsic_load_patch_vertices_in:
-		result = LLVMConstInt(ctx->i32, ctx->options->key.tcs.input_vertices, false);
-		break;
 	default:
 		fprintf(stderr, "Unknown intrinsic: ");
 		nir_print_instr(&instr->instr, stderr);
@@ -4002,8 +2989,8 @@ static LLVMValueRef get_sampler_desc(struct nir_to_llvm_context *ctx,
 	unsigned type_size;
 	LLVMBuilderRef builder = ctx->builder;
 	LLVMTypeRef type;
+	LLVMValueRef indices[2];
 	LLVMValueRef index = NULL;
-	unsigned constant_index = 0;
 
 	assert(deref->var->data.binding < layout->binding_count);
 
@@ -4028,8 +3015,6 @@ static LLVMValueRef get_sampler_desc(struct nir_to_llvm_context *ctx,
 		type = ctx->v4i32;
 		type_size = 16;
 		break;
-	default:
-		unreachable("invalid desc_type\n");
 	}
 
 	if (deref->deref.child) {
@@ -4040,23 +3025,6 @@ static LLVMValueRef get_sampler_desc(struct nir_to_llvm_context *ctx,
 		if (child->deref_array_type == nir_deref_array_type_indirect) {
 			index = get_src(ctx, child->indirect);
 		}
-
-		constant_index = child->base_offset;
-	}
-	if (desc_type == DESC_SAMPLER && binding->immutable_samplers_offset &&
-	    (!index || binding->immutable_samplers_equal)) {
-		if (binding->immutable_samplers_equal)
-			constant_index = 0;
-
-		const uint32_t *samplers = radv_immutable_samplers(layout, binding);
-
-		LLVMValueRef constants[] = {
-			LLVMConstInt(ctx->i32, samplers[constant_index * 4 + 0], 0),
-			LLVMConstInt(ctx->i32, samplers[constant_index * 4 + 1], 0),
-			LLVMConstInt(ctx->i32, samplers[constant_index * 4 + 2], 0),
-			LLVMConstInt(ctx->i32, samplers[constant_index * 4 + 3], 0),
-		};
-		return ac_build_gather_values(&ctx->ac, constants, 4);
 	}
 
 	assert(stride % type_size == 0);
@@ -4065,21 +3033,23 @@ static LLVMValueRef get_sampler_desc(struct nir_to_llvm_context *ctx,
 		index = ctx->i32zero;
 
 	index = LLVMBuildMul(builder, index, LLVMConstInt(ctx->i32, stride / type_size, 0), "");
-
-	list = ac_build_gep0(&ctx->ac, list, LLVMConstInt(ctx->i32, offset, 0));
+	indices[0] = ctx->i32zero;
+	indices[1] = LLVMConstInt(ctx->i32, offset, 0);
+	list = LLVMBuildGEP(builder, list, indices, 2, "");
 	list = LLVMBuildPointerCast(builder, list, const_array(type, 0), "");
 
-	return ac_build_indexed_load_const(&ctx->ac, list, index);
+	return build_indexed_load_const(ctx, list, index);
 }
 
 static void set_tex_fetch_args(struct nir_to_llvm_context *ctx,
-			       struct ac_image_args *args,
+			       struct ac_tex_info *tinfo,
 			       nir_tex_instr *instr,
 			       nir_texop op,
 			       LLVMValueRef res_ptr, LLVMValueRef samp_ptr,
 			       LLVMValueRef *param, unsigned count,
 			       unsigned dmask)
 {
+	int num_args;
 	unsigned is_rect = 0;
 	bool da = instr->is_array || instr->sampler_dim == GLSL_SAMPLER_DIM_CUBE;
 
@@ -4090,50 +3060,42 @@ static void set_tex_fetch_args(struct nir_to_llvm_context *ctx,
 		param[count++] = LLVMGetUndef(ctx->i32);
 
 	if (count > 1)
-		args->addr = ac_build_gather_values(&ctx->ac, param, count);
+		tinfo->args[0] = build_gather_values(ctx, param, count);
 	else
-		args->addr = param[0];
+		tinfo->args[0] = param[0];
+
+	tinfo->args[1] = res_ptr;
+	num_args = 2;
 
-	args->resource = res_ptr;
-	args->sampler = samp_ptr;
+	if (op == nir_texop_txf ||
+	    op == nir_texop_txf_ms ||
+	    op == nir_texop_query_levels ||
+	    op == nir_texop_texture_samples ||
+	    op == nir_texop_txs)
+		tinfo->dst_type = ctx->v4i32;
+	else {
+		tinfo->dst_type = ctx->v4f32;
+		tinfo->args[num_args++] = samp_ptr;
+	}
 
 	if (instr->sampler_dim == GLSL_SAMPLER_DIM_BUF && op == nir_texop_txf) {
-		args->addr = param[0];
+		tinfo->args[0] = res_ptr;
+		tinfo->args[1] = LLVMConstInt(ctx->i32, 0, false);
+		tinfo->args[2] = param[0];
+		tinfo->arg_count = 3;
 		return;
 	}
 
-	args->dmask = dmask;
-	args->unorm = is_rect;
-	args->da = da;
-}
+	tinfo->args[num_args++] = LLVMConstInt(ctx->i32, dmask, 0);
+	tinfo->args[num_args++] = LLVMConstInt(ctx->i32, is_rect, 0); /* unorm */
+	tinfo->args[num_args++] = LLVMConstInt(ctx->i32, 0, 0); /* r128 */
+	tinfo->args[num_args++] = LLVMConstInt(ctx->i32, da ? 1 : 0, 0);
+	tinfo->args[num_args++] = LLVMConstInt(ctx->i32, 0, 0); /* glc */
+	tinfo->args[num_args++] = LLVMConstInt(ctx->i32, 0, 0); /* slc */
+	tinfo->args[num_args++] = LLVMConstInt(ctx->i32, 0, 0); /* tfe */
+	tinfo->args[num_args++] = LLVMConstInt(ctx->i32, 0, 0); /* lwe */
 
-/* Disable anisotropic filtering if BASE_LEVEL == LAST_LEVEL.
- *
- * SI-CI:
- *   If BASE_LEVEL == LAST_LEVEL, the shader must disable anisotropic
- *   filtering manually. The driver sets img7 to a mask clearing
- *   MAX_ANISO_RATIO if BASE_LEVEL == LAST_LEVEL. The shader must do:
- *     s_and_b32 samp0, samp0, img7
- *
- * VI:
- *   The ANISO_OVERRIDE sampler field enables this fix in TA.
- */
-static LLVMValueRef sici_fix_sampler_aniso(struct nir_to_llvm_context *ctx,
-                                           LLVMValueRef res, LLVMValueRef samp)
-{
-	LLVMBuilderRef builder = ctx->builder;
-	LLVMValueRef img7, samp0;
-
-	if (ctx->options->chip_class >= VI)
-		return samp;
-
-	img7 = LLVMBuildExtractElement(builder, res,
-	                               LLVMConstInt(ctx->i32, 7, 0), "");
-	samp0 = LLVMBuildExtractElement(builder, samp,
-	                                LLVMConstInt(ctx->i32, 0, 0), "");
-	samp0 = LLVMBuildAnd(builder, samp0, img7, "");
-	return LLVMBuildInsertElement(builder, samp, samp0,
-	                              LLVMConstInt(ctx->i32, 0, 0), "");
+	tinfo->arg_count = num_args;
 }
 
 static void tex_fetch_ptrs(struct nir_to_llvm_context *ctx,
@@ -4150,32 +3112,144 @@ static void tex_fetch_ptrs(struct nir_to_llvm_context *ctx,
 			*samp_ptr = get_sampler_desc(ctx, instr->sampler, DESC_SAMPLER);
 		else
 			*samp_ptr = get_sampler_desc(ctx, instr->texture, DESC_SAMPLER);
-		if (instr->sampler_dim < GLSL_SAMPLER_DIM_RECT)
-			*samp_ptr = sici_fix_sampler_aniso(ctx, *res_ptr, *samp_ptr);
 	}
 	if (fmask_ptr && !instr->sampler && (instr->op == nir_texop_txf_ms ||
 					     instr->op == nir_texop_samples_identical))
 		*fmask_ptr = get_sampler_desc(ctx, instr->texture, DESC_FMASK);
 }
 
-static LLVMValueRef apply_round_slice(struct nir_to_llvm_context *ctx,
-				      LLVMValueRef coord)
+static LLVMValueRef build_cube_intrinsic(struct nir_to_llvm_context *ctx,
+					 LLVMValueRef *in)
 {
-	coord = to_float(ctx, coord);
-	coord = ac_build_intrinsic(&ctx->ac, "llvm.rint.f32", ctx->f32, &coord, 1, 0);
-	coord = to_integer(ctx, coord);
-	return coord;
+
+	LLVMValueRef v, cube_vec;
+
+	if (1) {
+		LLVMTypeRef f32 = LLVMTypeOf(in[0]);
+		LLVMValueRef out[4];
+
+		out[0] = emit_llvm_intrinsic(ctx, "llvm.amdgcn.cubetc",
+					     f32, in, 3, LLVMReadNoneAttribute);
+		out[1] = emit_llvm_intrinsic(ctx, "llvm.amdgcn.cubesc",
+					     f32, in, 3, LLVMReadNoneAttribute);
+		out[2] = emit_llvm_intrinsic(ctx, "llvm.amdgcn.cubema",
+					     f32, in, 3, LLVMReadNoneAttribute);
+		out[3] = emit_llvm_intrinsic(ctx, "llvm.amdgcn.cubeid",
+					     f32, in, 3, LLVMReadNoneAttribute);
+
+		return build_gather_values(ctx, out, 4);
+	} else {
+		LLVMValueRef c[4];
+		c[0] = in[0];
+		c[1] = in[1];
+		c[2] = in[2];
+		c[3] = LLVMGetUndef(LLVMTypeOf(in[0]));
+		cube_vec = build_gather_values(ctx, c, 4);
+		v = emit_llvm_intrinsic(ctx, "llvm.AMDGPU.cube", LLVMTypeOf(cube_vec),
+					&cube_vec, 1, LLVMReadNoneAttribute);
+	}
+	return v;
+}
+
+static void cube_to_2d_coords(struct nir_to_llvm_context *ctx,
+			      LLVMValueRef *in, LLVMValueRef *out)
+{
+	LLVMValueRef coords[4];
+	LLVMValueRef mad_args[3];
+	LLVMValueRef v;
+	LLVMValueRef tmp;
+	int i;
+
+	v = build_cube_intrinsic(ctx, in);
+	for (i = 0; i < 4; i++)
+		coords[i] = LLVMBuildExtractElement(ctx->builder, v,
+						    LLVMConstInt(ctx->i32, i, false), "");
+
+	coords[2] = emit_llvm_intrinsic(ctx, "llvm.fabs.f32", ctx->f32,
+					&coords[2], 1, LLVMReadNoneAttribute);
+	coords[2] = emit_fdiv(ctx, ctx->f32one, coords[2]);
+
+	mad_args[1] = coords[2];
+	mad_args[2] = LLVMConstReal(ctx->f32, 1.5);
+	mad_args[0] = coords[0];
+
+	/* emit MAD */
+	tmp = LLVMBuildFMul(ctx->builder, mad_args[0], mad_args[1], "");
+	coords[0] = LLVMBuildFAdd(ctx->builder, tmp, mad_args[2], "");
+
+	mad_args[0] = coords[1];
+
+	/* emit MAD */
+	tmp = LLVMBuildFMul(ctx->builder, mad_args[0], mad_args[1], "");
+	coords[1] = LLVMBuildFAdd(ctx->builder, tmp, mad_args[2], "");
+
+	/* apply xyz = yxw swizzle to cooords */
+	out[0] = coords[1];
+	out[1] = coords[0];
+	out[2] = coords[3];
+}
+
+static void emit_prepare_cube_coords(struct nir_to_llvm_context *ctx,
+				     LLVMValueRef *coords_arg, int num_coords,
+				     bool is_deriv,
+				     bool is_array, LLVMValueRef *derivs_arg)
+{
+	LLVMValueRef coords[4];
+	int i;
+	cube_to_2d_coords(ctx, coords_arg, coords);
+
+	if (is_deriv && derivs_arg) {
+		LLVMValueRef derivs[4];
+		int axis;
+
+		/* Convert cube derivatives to 2D derivatives. */
+		for (axis = 0; axis < 2; axis++) {
+			LLVMValueRef shifted_cube_coords[4], shifted_coords[4];
+
+			/* Shift the cube coordinates by the derivatives to get
+			 * the cube coordinates of the "neighboring pixel".
+			 */
+			for (i = 0; i < 3; i++)
+				shifted_cube_coords[i] =
+					LLVMBuildFAdd(ctx->builder, coords_arg[i],
+						      derivs_arg[axis*3+i], "");
+			shifted_cube_coords[3] = LLVMGetUndef(ctx->f32);
+
+			/* Project the shifted cube coordinates onto the face. */
+			cube_to_2d_coords(ctx, shifted_cube_coords,
+					  shifted_coords);
+
+			/* Subtract both sets of 2D coordinates to get 2D derivatives.
+			 * This won't work if the shifted coordinates ended up
+			 * in a different face.
+			 */
+			for (i = 0; i < 2; i++)
+				derivs[axis * 2 + i] =
+					LLVMBuildFSub(ctx->builder, shifted_coords[i],
+						      coords[i], "");
+		}
+
+		memcpy(derivs_arg, derivs, sizeof(derivs));
+	}
+
+	if (is_array) {
+		/* for cube arrays coord.z = coord.w(array_index) * 8 + face */
+		/* coords_arg.w component - array_index for cube arrays */
+		LLVMValueRef tmp = LLVMBuildFMul(ctx->builder, coords_arg[3], LLVMConstReal(ctx->f32, 8.0), "");
+		coords[2] = LLVMBuildFAdd(ctx->builder, tmp, coords[2], "");
+	}
+
+	memcpy(coords_arg, coords, sizeof(coords));
 }
 
 static void visit_tex(struct nir_to_llvm_context *ctx, nir_tex_instr *instr)
 {
 	LLVMValueRef result = NULL;
-	struct ac_image_args args = { 0 };
+	struct ac_tex_info tinfo = { 0 };
 	unsigned dmask = 0xf;
 	LLVMValueRef address[16];
 	LLVMValueRef coords[5];
-	LLVMValueRef coord = NULL, lod = NULL, comparator = NULL;
-	LLVMValueRef bias = NULL, offsets = NULL;
+	LLVMValueRef coord = NULL, lod = NULL, comparitor = NULL, bias, offsets = NULL;
 	LLVMValueRef res_ptr, samp_ptr, fmask_ptr = NULL, sample_index = NULL;
 	LLVMValueRef ddx = NULL, ddy = NULL;
 	LLVMValueRef derivs[6];
@@ -4191,8 +3265,8 @@ static void visit_tex(struct nir_to_llvm_context *ctx, nir_tex_instr *instr)
 			break;
 		case nir_tex_src_projector:
 			break;
-		case nir_tex_src_comparator:
-			comparator = get_src(ctx, instr->src[i].src);
+		case nir_tex_src_comparitor:
+			comparitor = get_src(ctx, instr->src[i].src);
 			break;
 		case nir_tex_src_offset:
 			offsets = get_src(ctx, instr->src[i].src);
@@ -4224,11 +3298,6 @@ static void visit_tex(struct nir_to_llvm_context *ctx, nir_tex_instr *instr)
 		}
 	}
 
-	if (instr->op == nir_texop_txs && instr->sampler_dim == GLSL_SAMPLER_DIM_BUF) {
-		result = get_buffer_size(ctx, res_ptr, true);
-		goto write_result;
-	}
-
 	if (instr->op == nir_texop_texture_samples) {
 		LLVMValueRef res, samples, is_msaa;
 		res = LLVMBuildBitCast(ctx->builder, res_ptr, ctx->v8i32, "");
@@ -4262,7 +3331,7 @@ static void visit_tex(struct nir_to_llvm_context *ctx, nir_tex_instr *instr)
 		for (chan = 0; chan < 3; ++chan)
 			offset[chan] = ctx->i32zero;
 
-		args.offset = true;
+		tinfo.has_offset = true;
 		for (chan = 0; chan < get_llvm_num_components(offsets); chan++) {
 			offset[chan] = llvm_extract_elem(ctx, offsets, chan);
 			offset[chan] = LLVMBuildAnd(ctx->builder, offset[chan],
@@ -4282,8 +3351,8 @@ static void visit_tex(struct nir_to_llvm_context *ctx, nir_tex_instr *instr)
 	}
 
 	/* Pack depth comparison value */
-	if (instr->is_shadow && comparator) {
-		address[count++] = llvm_extract_elem(ctx, comparator, 0);
+	if (instr->is_shadow && comparitor) {
+		address[count++] = llvm_extract_elem(ctx, comparitor, 0);
 	}
 
 	/* pack derivatives */
@@ -4303,21 +3372,17 @@ static void visit_tex(struct nir_to_llvm_context *ctx, nir_tex_instr *instr)
 		}
 
 		for (unsigned i = 0; i < num_deriv_comp; i++) {
-			derivs[i] = to_float(ctx, llvm_extract_elem(ctx, ddx, i));
-			derivs[num_deriv_comp + i] = to_float(ctx, llvm_extract_elem(ctx, ddy, i));
+			derivs[i * 2] = to_float(ctx, llvm_extract_elem(ctx, ddx, i));
+			derivs[i * 2 + 1] = to_float(ctx, llvm_extract_elem(ctx, ddy, i));
 		}
 	}
 
 	if (instr->sampler_dim == GLSL_SAMPLER_DIM_CUBE && coord) {
-		if (instr->is_array && instr->op != nir_texop_lod)
-			coords[3] = apply_round_slice(ctx, coords[3]);
 		for (chan = 0; chan < instr->coord_components; chan++)
 			coords[chan] = to_float(ctx, coords[chan]);
 		if (instr->coord_components == 3)
 			coords[3] = LLVMGetUndef(ctx->f32);
-		ac_prepare_cube_coords(&ctx->ac,
-			instr->op == nir_texop_txd, instr->is_array,
-			coords, derivs);
+		emit_prepare_cube_coords(ctx, coords, instr->coord_components, instr->op == nir_texop_txd, instr->is_array, derivs);
 		if (num_deriv_comp)
 			num_deriv_comp--;
 	}
@@ -4330,18 +3395,15 @@ static void visit_tex(struct nir_to_llvm_context *ctx, nir_tex_instr *instr)
 	/* Pack texture coordinates */
 	if (coord) {
 		address[count++] = coords[0];
-		if (instr->coord_components > 1) {
-			if (instr->sampler_dim == GLSL_SAMPLER_DIM_1D && instr->is_array && instr->op != nir_texop_txf) {
-				coords[1] = apply_round_slice(ctx, coords[1]);
-			}
+		if (instr->coord_components > 1)
 			address[count++] = coords[1];
-		}
 		if (instr->coord_components > 2) {
 			/* This seems like a bit of a hack - but it passes Vulkan CTS with it */
-			if (instr->sampler_dim != GLSL_SAMPLER_DIM_3D &&
-			    instr->sampler_dim != GLSL_SAMPLER_DIM_CUBE &&
-			    instr->op != nir_texop_txf) {
-				coords[2] = apply_round_slice(ctx, coords[2]);
+			if (instr->sampler_dim != GLSL_SAMPLER_DIM_3D && instr->op != nir_texop_txf) {
+				coords[2] = to_float(ctx, coords[2]);
+				coords[2] = emit_llvm_intrinsic(ctx, "llvm.rint.f32", ctx->f32, &coords[2],
+								1, 0);
+				coords[2] = to_integer(ctx, coords[2]);
 			}
 			address[count++] = coords[2];
 		}
@@ -4367,7 +3429,7 @@ static void visit_tex(struct nir_to_llvm_context *ctx, nir_tex_instr *instr)
 
 	if (instr->op == nir_texop_samples_identical) {
 		LLVMValueRef txf_address[4];
-		struct ac_image_args txf_args = { 0 };
+		struct ac_tex_info txf_info = { 0 };
 		unsigned txf_count = count;
 		memcpy(txf_address, address, sizeof(txf_address));
 
@@ -4375,26 +3437,81 @@ static void visit_tex(struct nir_to_llvm_context *ctx, nir_tex_instr *instr)
 			txf_address[2] = ctx->i32zero;
 		txf_address[3] = ctx->i32zero;
 
-		set_tex_fetch_args(ctx, &txf_args, instr, nir_texop_txf,
+		set_tex_fetch_args(ctx, &txf_info, instr, nir_texop_txf,
 				   fmask_ptr, NULL,
 				   txf_address, txf_count, 0xf);
 
-		result = build_tex_intrinsic(ctx, instr, &txf_args);
+		result = build_tex_intrinsic(ctx, instr, &txf_info);
 
 		result = LLVMBuildExtractElement(ctx->builder, result, ctx->i32zero, "");
 		result = emit_int_cmp(ctx, LLVMIntEQ, result, ctx->i32zero);
 		goto write_result;
 	}
 
-	if (instr->sampler_dim == GLSL_SAMPLER_DIM_MS &&
-	    instr->op != nir_texop_txs) {
+	/* Adjust the sample index according to FMASK.
+	 *
+	 * For uncompressed MSAA surfaces, FMASK should return 0x76543210,
+	 * which is the identity mapping. Each nibble says which physical sample
+	 * should be fetched to get that sample.
+	 *
+	 * For example, 0x11111100 means there are only 2 samples stored and
+	 * the second sample covers 3/4 of the pixel. When reading samples 0
+	 * and 1, return physical sample 0 (determined by the first two 0s
+	 * in FMASK), otherwise return physical sample 1.
+	 *
+	 * The sample index should be adjusted as follows:
+	 *   sample_index = (fmask >> (sample_index * 4)) & 0xF;
+	 */
+	if (instr->sampler_dim == GLSL_SAMPLER_DIM_MS) {
+		LLVMValueRef txf_address[4];
+		struct ac_tex_info txf_info = { 0 };
+		unsigned txf_count = count;
+		memcpy(txf_address, address, sizeof(txf_address));
+
+		if (!instr->is_array)
+			txf_address[2] = ctx->i32zero;
+		txf_address[3] = ctx->i32zero;
+
+		set_tex_fetch_args(ctx, &txf_info, instr, nir_texop_txf,
+				   fmask_ptr, NULL,
+				   txf_address, txf_count, 0xf);
+
+		result = build_tex_intrinsic(ctx, instr, &txf_info);
+		LLVMValueRef four = LLVMConstInt(ctx->i32, 4, false);
+		LLVMValueRef F = LLVMConstInt(ctx->i32, 0xf, false);
+
+		LLVMValueRef fmask = LLVMBuildExtractElement(ctx->builder,
+							     result,
+							     ctx->i32zero, "");
+
 		unsigned sample_chan = instr->is_array ? 3 : 2;
-		address[sample_chan] = adjust_sample_index_using_fmask(ctx,
-								       address[0],
-								       address[1],
-								       instr->is_array ? address[2] : NULL,
-								       address[sample_chan],
-								       fmask_ptr);
+
+		LLVMValueRef sample_index4 =
+			LLVMBuildMul(ctx->builder, address[sample_chan], four, "");
+		LLVMValueRef shifted_fmask =
+			LLVMBuildLShr(ctx->builder, fmask, sample_index4, "");
+		LLVMValueRef final_sample =
+			LLVMBuildAnd(ctx->builder, shifted_fmask, F, "");
+
+		/* Don't rewrite the sample index if WORD1.DATA_FORMAT of the FMASK
+		 * resource descriptor is 0 (invalid),
+		 */
+		LLVMValueRef fmask_desc =
+			LLVMBuildBitCast(ctx->builder, fmask_ptr,
+					 ctx->v8i32, "");
+
+		LLVMValueRef fmask_word1 =
+			LLVMBuildExtractElement(ctx->builder, fmask_desc,
+						ctx->i32one, "");
+
+		LLVMValueRef word1_is_nonzero =
+			LLVMBuildICmp(ctx->builder, LLVMIntNE,
+				      fmask_word1, ctx->i32zero, "");
+
+		/* Replace the MSAA sample index. */
+		address[sample_chan] =
+			LLVMBuildSelect(ctx->builder, word1_is_nonzero,
+					final_sample, address[sample_chan], "");
 	}
 
 	if (offsets && instr->op == nir_texop_txf) {
@@ -4421,14 +3538,14 @@ static void visit_tex(struct nir_to_llvm_context *ctx, nir_tex_instr *instr)
 		else
 			dmask = 1 << instr->component;
 	}
-	set_tex_fetch_args(ctx, &args, instr, instr->op,
+	set_tex_fetch_args(ctx, &tinfo, instr, instr->op,
 			   res_ptr, samp_ptr, address, count, dmask);
 
-	result = build_tex_intrinsic(ctx, instr, &args);
+	result = build_tex_intrinsic(ctx, instr, &tinfo);
 
 	if (instr->op == nir_texop_query_levels)
 		result = LLVMBuildExtractElement(ctx->builder, result, LLVMConstInt(ctx->i32, 3, false), "");
-	else if (instr->is_shadow && instr->op != nir_texop_txs && instr->op != nir_texop_lod && instr->op != nir_texop_tg4)
+	else if (instr->is_shadow && instr->op != nir_texop_txs && instr->op != nir_texop_lod)
 		result = LLVMBuildExtractElement(ctx->builder, result, ctx->i32zero, "");
 	else if (instr->op == nir_texop_txs &&
 		 instr->sampler_dim == GLSL_SAMPLER_DIM_CUBE &&
@@ -4641,6 +3758,7 @@ handle_vs_input_decl(struct nir_to_llvm_context *ctx,
 	LLVMValueRef t_list_ptr = ctx->vertex_buffers;
 	LLVMValueRef t_offset;
 	LLVMValueRef t_list;
+	LLVMValueRef args[3];
 	LLVMValueRef input;
 	LLVMValueRef buffer_index;
 	int index = variable->data.location - VERT_ATTRIB_GENERIC0;
@@ -4661,12 +3779,13 @@ handle_vs_input_decl(struct nir_to_llvm_context *ctx,
 	for (unsigned i = 0; i < attrib_count; ++i, ++idx) {
 		t_offset = LLVMConstInt(ctx->i32, index + i, false);
 
-		t_list = ac_build_indexed_load_const(&ctx->ac, t_list_ptr, t_offset);
-
-		input = ac_build_buffer_load_format(&ctx->ac, t_list,
-						    buffer_index,
-						    LLVMConstInt(ctx->i32, 0, false),
-						    true);
+		t_list = build_indexed_load_const(ctx, t_list_ptr, t_offset);
+		args[0] = t_list;
+		args[1] = LLVMConstInt(ctx->i32, 0, false);
+		args[2] = buffer_index;
+		input = emit_llvm_intrinsic(ctx,
+			"llvm.SI.vs.load.input", ctx->v4f32, args, 3,
+			LLVMReadNoneAttribute | LLVMNoUnwindAttribute);
 
 		for (unsigned chan = 0; chan < 4; chan++) {
 			LLVMValueRef llvm_chan = LLVMConstInt(ctx->i32, chan, false);
@@ -4677,16 +3796,16 @@ handle_vs_input_decl(struct nir_to_llvm_context *ctx,
 	}
 }
 
+
 static void interp_fs_input(struct nir_to_llvm_context *ctx,
 			    unsigned attr,
 			    LLVMValueRef interp_param,
 			    LLVMValueRef prim_mask,
 			    LLVMValueRef result[4])
 {
+	const char *intr_name;
 	LLVMValueRef attr_number;
 	unsigned chan;
-	LLVMValueRef i, j;
-	bool interp = interp_param != NULL;
 
 	attr_number = LLVMConstInt(ctx->i32, attr, false);
 
@@ -4700,31 +3819,19 @@ static void interp_fs_input(struct nir_to_llvm_context *ctx,
 	 * fs.interp cannot be used on integers, because they can be equal
 	 * to NaN.
 	 */
-	if (interp) {
-		interp_param = LLVMBuildBitCast(ctx->builder, interp_param,
-						LLVMVectorType(ctx->f32, 2), "");
-
-		i = LLVMBuildExtractElement(ctx->builder, interp_param,
-						ctx->i32zero, "");
-		j = LLVMBuildExtractElement(ctx->builder, interp_param,
-						ctx->i32one, "");
-	}
+	intr_name = interp_param ? "llvm.SI.fs.interp" : "llvm.SI.fs.constant";
 
 	for (chan = 0; chan < 4; chan++) {
+		LLVMValueRef args[4];
 		LLVMValueRef llvm_chan = LLVMConstInt(ctx->i32, chan, false);
 
-		if (interp) {
-			result[chan] = ac_build_fs_interp(&ctx->ac,
-							  llvm_chan,
-							  attr_number,
-							  prim_mask, i, j);
-		} else {
-			result[chan] = ac_build_fs_interp_mov(&ctx->ac,
-							      LLVMConstInt(ctx->i32, 2, false),
-							      llvm_chan,
-							      attr_number,
-							      prim_mask);
-		}
+		args[0] = llvm_chan;
+		args[1] = attr_number;
+		args[2] = prim_mask;
+		args[3] = interp_param;
+		result[chan] = emit_llvm_intrinsic(ctx, intr_name,
+						   ctx->f32, args, args[3] ? 4 : 3,
+						  LLVMReadNoneAttribute | LLVMNoUnwindAttribute);
 	}
 }
 
@@ -4739,18 +3846,9 @@ handle_fs_input_decl(struct nir_to_llvm_context *ctx,
 	variable->data.driver_location = idx * 4;
 	ctx->input_mask |= ((1ull << attrib_count) - 1) << variable->data.location;
 
-	if (glsl_get_base_type(glsl_without_array(variable->type)) == GLSL_TYPE_FLOAT) {
-		unsigned interp_type;
-		if (variable->data.sample) {
-			interp_type = INTERP_SAMPLE;
-			ctx->shader_info->fs.force_persample = true;
-		} else if (variable->data.centroid)
-			interp_type = INTERP_CENTROID;
-		else
-			interp_type = INTERP_CENTER;
-
-		interp = lookup_interp_param(ctx, variable->data.interpolation, interp_type);
-	} else
+	if (glsl_get_base_type(glsl_without_array(variable->type)) == GLSL_TYPE_FLOAT)
+		interp = lookup_interp_param(ctx, variable->data.interpolation, INTERP_CENTER);
+	else
 		interp = NULL;
 
 	for (unsigned i = 0; i < attrib_count; ++i)
@@ -4787,8 +3885,7 @@ handle_fs_inputs_pre(struct nir_to_llvm_context *ctx,
 		if (!(ctx->input_mask & (1ull << i)))
 			continue;
 
-		if (i >= VARYING_SLOT_VAR0 || i == VARYING_SLOT_PNTC ||
-		    i == VARYING_SLOT_PRIMITIVE_ID || i == VARYING_SLOT_LAYER) {
+		if (i >= VARYING_SLOT_VAR0 || i == VARYING_SLOT_PNTC) {
 			interp_param = *inputs;
 			interp_fs_input(ctx, index, interp_param, ctx->prim_mask,
 					inputs);
@@ -4800,16 +3897,12 @@ handle_fs_inputs_pre(struct nir_to_llvm_context *ctx,
 			for(int i = 0; i < 3; ++i)
 				inputs[i] = ctx->frag_pos[i];
 
-			inputs[3] = ac_build_fdiv(&ctx->ac, ctx->f32one, ctx->frag_pos[3]);
+			inputs[3] = emit_fdiv(ctx, ctx->f32one, ctx->frag_pos[3]);
 		}
 	}
 	ctx->shader_info->fs.num_interp = index;
 	if (ctx->input_mask & (1 << VARYING_SLOT_PNTC))
 		ctx->shader_info->fs.has_pcoord = true;
-	if (ctx->input_mask & (1 << VARYING_SLOT_PRIMITIVE_ID))
-		ctx->shader_info->fs.prim_id_input = true;
-	if (ctx->input_mask & (1 << VARYING_SLOT_LAYER))
-		ctx->shader_info->fs.layer_input = true;
 	ctx->shader_info->fs.input_mask = ctx->input_mask >> VARYING_SLOT_VAR0;
 }
 
@@ -4853,35 +3946,27 @@ static void
 handle_shader_output_decl(struct nir_to_llvm_context *ctx,
 			  struct nir_variable *variable)
 {
-	int idx = variable->data.location + variable->data.index;
+	int idx = variable->data.location;
 	unsigned attrib_count = glsl_count_attribute_slots(variable->type, false);
-	uint64_t mask_attribs;
-	variable->data.driver_location = idx * 4;
 
-	/* tess ctrl has it's own load/store paths for outputs */
-	if (ctx->stage == MESA_SHADER_TESS_CTRL)
-		return;
+	variable->data.driver_location = idx * 4;
 
-	mask_attribs = ((1ull << attrib_count) - 1) << idx;
-	if (ctx->stage == MESA_SHADER_VERTEX ||
-	    ctx->stage == MESA_SHADER_TESS_EVAL ||
-	    ctx->stage == MESA_SHADER_GEOMETRY) {
-		if (idx == VARYING_SLOT_CLIP_DIST0) {
-			int length = ctx->num_output_clips + ctx->num_output_culls;
-			if (ctx->stage == MESA_SHADER_VERTEX) {
-				ctx->shader_info->vs.outinfo.clip_dist_mask = (1 << ctx->num_output_clips) - 1;
-				ctx->shader_info->vs.outinfo.cull_dist_mask = (1 << ctx->num_output_culls) - 1;
-			}
-			if (ctx->stage == MESA_SHADER_TESS_EVAL) {
-				ctx->shader_info->tes.outinfo.clip_dist_mask = (1 << ctx->num_output_clips) - 1;
-				ctx->shader_info->tes.outinfo.cull_dist_mask = (1 << ctx->num_output_culls) - 1;
+	if (ctx->stage == MESA_SHADER_VERTEX) {
+
+		if (idx == VARYING_SLOT_CLIP_DIST0 ||
+		    idx == VARYING_SLOT_CULL_DIST0) {
+			int length = glsl_get_length(variable->type);
+			if (idx == VARYING_SLOT_CLIP_DIST0) {
+				ctx->shader_info->vs.clip_dist_mask = (1 << length) - 1;
+				ctx->num_clips = length;
+			} else if (idx == VARYING_SLOT_CULL_DIST0) {
+				ctx->shader_info->vs.cull_dist_mask = (1 << length) - 1;
+				ctx->num_culls = length;
 			}
-
 			if (length > 4)
 				attrib_count = 2;
 			else
 				attrib_count = 1;
-			mask_attribs = 1ull << idx;
 		}
 	}
 
@@ -4891,7 +3976,7 @@ handle_shader_output_decl(struct nir_to_llvm_context *ctx,
 		                       si_build_alloca_undef(ctx, ctx->f32, "");
 		}
 	}
-	ctx->output_mask |= mask_attribs;
+	ctx->output_mask |= ((1ull << attrib_count) - 1) << variable->data.location;
 }
 
 static void
@@ -4921,8 +4006,8 @@ static LLVMValueRef
 emit_float_saturate(struct nir_to_llvm_context *ctx, LLVMValueRef v, float lo, float hi)
 {
 	v = to_float(ctx, v);
-	v = emit_intrin_2f_param(ctx, "llvm.maxnum.f32", ctx->f32, v, LLVMConstReal(ctx->f32, lo));
-	return emit_intrin_2f_param(ctx, "llvm.minnum.f32", ctx->f32, v, LLVMConstReal(ctx->f32, hi));
+	v = emit_intrin_2f_param(ctx, "llvm.maxnum.f32", v, LLVMConstReal(ctx->f32, lo));
+	return emit_intrin_2f_param(ctx, "llvm.minnum.f32", v, LLVMConstReal(ctx->f32, hi));
 }
 
 
@@ -4943,25 +4028,23 @@ static void
 si_llvm_init_export_args(struct nir_to_llvm_context *ctx,
 			 LLVMValueRef *values,
 			 unsigned target,
-			 struct ac_export_args *args)
+			 LLVMValueRef *args)
 {
 	/* Default is 0xf. Adjusted below depending on the format. */
-	args->enabled_channels = 0xf;
-
+	args[0] = LLVMConstInt(ctx->i32, target != V_008DFC_SQ_EXP_NULL ? 0xf : 0, false);
 	/* Specify whether the EXEC mask represents the valid mask */
-	args->valid_mask = 0;
+	args[1] = LLVMConstInt(ctx->i32, 0, false);
 
 	/* Specify whether this is the last export */
-	args->done = 0;
-
+	args[2] = LLVMConstInt(ctx->i32, 0, false);
 	/* Specify the target we are exporting */
-	args->target = target;
+	args[3] = LLVMConstInt(ctx->i32, target, false);
 
-	args->compr = false;
-	args->out[0] = LLVMGetUndef(ctx->f32);
-	args->out[1] = LLVMGetUndef(ctx->f32);
-	args->out[2] = LLVMGetUndef(ctx->f32);
-	args->out[3] = LLVMGetUndef(ctx->f32);
+	args[4] = LLVMConstInt(ctx->i32, 0, false); /* COMPR flag */
+	args[5] = LLVMGetUndef(ctx->f32);
+	args[6] = LLVMGetUndef(ctx->f32);
+	args[7] = LLVMGetUndef(ctx->f32);
+	args[8] = LLVMGetUndef(ctx->f32);
 
 	if (!values)
 		return;
@@ -4974,29 +4057,29 @@ si_llvm_init_export_args(struct nir_to_llvm_context *ctx,
 
 		switch(col_format) {
 		case V_028714_SPI_SHADER_ZERO:
-			args->enabled_channels = 0; /* writemask */
-			args->target = V_008DFC_SQ_EXP_NULL;
+			args[0] = LLVMConstInt(ctx->i32, 0x0, 0);
+			args[3] = LLVMConstInt(ctx->i32, V_008DFC_SQ_EXP_NULL, 0);
 			break;
 
 		case V_028714_SPI_SHADER_32_R:
-			args->enabled_channels = 1;
-			args->out[0] = values[0];
+			args[0] = LLVMConstInt(ctx->i32, 0x1, 0);
+			args[5] = values[0];
 			break;
 
 		case V_028714_SPI_SHADER_32_GR:
-			args->enabled_channels = 0x3;
-			args->out[0] = values[0];
-			args->out[1] = values[1];
+			args[0] = LLVMConstInt(ctx->i32, 0x3, 0);
+			args[5] = values[0];
+			args[6] = values[1];
 			break;
 
 		case V_028714_SPI_SHADER_32_AR:
-			args->enabled_channels = 0x9;
-			args->out[0] = values[0];
-			args->out[3] = values[3];
+			args[0] = LLVMConstInt(ctx->i32, 0x9, 0);
+			args[5] = values[0];
+			args[8] = values[3];
 			break;
 
 		case V_028714_SPI_SHADER_FP16_ABGR:
-			args->compr = 1;
+			args[4] = ctx->i32one;
 
 			for (unsigned chan = 0; chan < 2; chan++) {
 				LLVMValueRef pack_args[2] = {
@@ -5005,14 +4088,16 @@ si_llvm_init_export_args(struct nir_to_llvm_context *ctx,
 				};
 				LLVMValueRef packed;
 
-				packed = ac_build_cvt_pkrtz_f16(&ctx->ac, pack_args);
-				args->out[chan] = packed;
+				packed = emit_llvm_intrinsic(ctx, "llvm.SI.packf16",
+							     ctx->i32, pack_args, 2,
+							     LLVMReadNoneAttribute);
+				args[chan + 5] = packed;
 			}
 			break;
 
 		case V_028714_SPI_SHADER_UNORM16_ABGR:
 			for (unsigned chan = 0; chan < 4; chan++) {
-				val[chan] = ac_build_clamp(&ctx->ac, values[chan]);
+				val[chan] = emit_float_saturate(ctx, values[chan], 0, 1);
 				val[chan] = LLVMBuildFMul(ctx->builder, val[chan],
 							LLVMConstReal(ctx->f32, 65535), "");
 				val[chan] = LLVMBuildFAdd(ctx->builder, val[chan],
@@ -5021,9 +4106,9 @@ si_llvm_init_export_args(struct nir_to_llvm_context *ctx,
 							ctx->i32, "");
 			}
 
-			args->compr = 1;
-			args->out[0] = emit_pack_int16(ctx, val[0], val[1]);
-			args->out[1] = emit_pack_int16(ctx, val[2], val[3]);
+			args[4] = ctx->i32one;
+			args[5] = emit_pack_int16(ctx, val[0], val[1]);
+			args[6] = emit_pack_int16(ctx, val[2], val[3]);
 			break;
 
 		case V_028714_SPI_SHADER_SNORM16_ABGR:
@@ -5042,9 +4127,9 @@ si_llvm_init_export_args(struct nir_to_llvm_context *ctx,
 				val[chan] = LLVMBuildFPToSI(ctx->builder, val[chan], ctx->i32, "");
 			}
 
-			args->compr = 1;
-			args->out[0] = emit_pack_int16(ctx, val[0], val[1]);
-			args->out[1] = emit_pack_int16(ctx, val[2], val[3]);
+			args[4] = ctx->i32one;
+			args[5] = emit_pack_int16(ctx, val[0], val[1]);
+			args[6] = emit_pack_int16(ctx, val[2], val[3]);
 			break;
 
 		case V_028714_SPI_SHADER_UINT16_ABGR: {
@@ -5055,9 +4140,9 @@ si_llvm_init_export_args(struct nir_to_llvm_context *ctx,
 				val[chan] = emit_minmax_int(ctx, LLVMIntULT, val[chan], max);
 			}
 
-			args->compr = 1;
-			args->out[0] = emit_pack_int16(ctx, val[0], val[1]);
-			args->out[1] = emit_pack_int16(ctx, val[2], val[3]);
+			args[4] = ctx->i32one;
+			args[5] = emit_pack_int16(ctx, val[0], val[1]);
+			args[6] = emit_pack_int16(ctx, val[2], val[3]);
 			break;
 		}
 
@@ -5072,63 +4157,70 @@ si_llvm_init_export_args(struct nir_to_llvm_context *ctx,
 				val[chan] = emit_minmax_int(ctx, LLVMIntSGT, val[chan], min);
 			}
 
-			args->compr = 1;
-			args->out[0] = emit_pack_int16(ctx, val[0], val[1]);
-			args->out[1] = emit_pack_int16(ctx, val[2], val[3]);
+			args[4] = ctx->i32one;
+			args[5] = emit_pack_int16(ctx, val[0], val[1]);
+			args[6] = emit_pack_int16(ctx, val[2], val[3]);
 			break;
 		}
 
 		default:
 		case V_028714_SPI_SHADER_32_ABGR:
-			memcpy(&args->out[0], values, sizeof(values[0]) * 4);
+			memcpy(&args[5], values, sizeof(values[0]) * 4);
 			break;
 		}
 	} else
-		memcpy(&args->out[0], values, sizeof(values[0]) * 4);
+		memcpy(&args[5], values, sizeof(values[0]) * 4);
 
-	for (unsigned i = 0; i < 4; ++i)
-		args->out[i] = to_float(ctx, args->out[i]);
+	for (unsigned i = 5; i < 9; ++i)
+		args[i] = to_float(ctx, args[i]);
 }
 
 static void
 handle_vs_outputs_post(struct nir_to_llvm_context *ctx,
-		       struct ac_vs_output_info *outinfo)
+		      struct nir_shader *nir)
 {
 	uint32_t param_count = 0;
 	unsigned target;
 	unsigned pos_idx, num_pos_exports = 0;
-	struct ac_export_args args, pos_args[4] = {};
-	LLVMValueRef psize_value = NULL, layer_value = NULL, viewport_index_value = NULL;
+	LLVMValueRef args[9];
+	LLVMValueRef pos_args[4][9] = { { 0 } };
+	LLVMValueRef psize_value = 0;
 	int i;
+	const uint64_t clip_mask = ctx->output_mask & ((1ull << VARYING_SLOT_CLIP_DIST0) |
+						       (1ull << VARYING_SLOT_CLIP_DIST1) |
+						       (1ull << VARYING_SLOT_CULL_DIST0) |
+						       (1ull << VARYING_SLOT_CULL_DIST1));
 
-	outinfo->prim_id_output = 0xffffffff;
-	outinfo->layer_output = 0xffffffff;
-	if (ctx->output_mask & (1ull << VARYING_SLOT_CLIP_DIST0)) {
+	if (clip_mask) {
 		LLVMValueRef slots[8];
 		unsigned j;
 
-		if (outinfo->cull_dist_mask)
-			outinfo->cull_dist_mask <<= ctx->num_output_clips;
+		if (ctx->shader_info->vs.cull_dist_mask)
+			ctx->shader_info->vs.cull_dist_mask <<= ctx->num_clips;
 
 		i = VARYING_SLOT_CLIP_DIST0;
-		for (j = 0; j < ctx->num_output_clips + ctx->num_output_culls; j++)
+		for (j = 0; j < ctx->num_clips; j++)
 			slots[j] = to_float(ctx, LLVMBuildLoad(ctx->builder,
 							       ctx->outputs[radeon_llvm_reg_index_soa(i, j)], ""));
+		i = VARYING_SLOT_CULL_DIST0;
+		for (j = 0; j < ctx->num_culls; j++)
+			slots[ctx->num_clips + j] = to_float(ctx, LLVMBuildLoad(ctx->builder,
+									   ctx->outputs[radeon_llvm_reg_index_soa(i, j)], ""));
 
-		for (i = ctx->num_output_clips + ctx->num_output_culls; i < 8; i++)
+		for (i = ctx->num_clips + ctx->num_culls; i < 8; i++)
 			slots[i] = LLVMGetUndef(ctx->f32);
 
-		if (ctx->num_output_clips + ctx->num_output_culls > 4) {
+		if (ctx->num_clips + ctx->num_culls > 4) {
 			target = V_008DFC_SQ_EXP_POS + 3;
-			si_llvm_init_export_args(ctx, &slots[4], target, &args);
-			memcpy(&pos_args[target - V_008DFC_SQ_EXP_POS],
-			       &args, sizeof(args));
+			si_llvm_init_export_args(ctx, &slots[4], target, args);
+			memcpy(pos_args[target - V_008DFC_SQ_EXP_POS],
+			       args, sizeof(args));
 		}
 
 		target = V_008DFC_SQ_EXP_POS + 2;
-		si_llvm_init_export_args(ctx, &slots[0], target, &args);
-		memcpy(&pos_args[target - V_008DFC_SQ_EXP_POS],
-		       &args, sizeof(args));
+		si_llvm_init_export_args(ctx, &slots[0], target, args);
+		memcpy(pos_args[target - V_008DFC_SQ_EXP_POS],
+		       args, sizeof(args));
 
 	}
 
@@ -5143,419 +4235,103 @@ handle_vs_outputs_post(struct nir_to_llvm_context *ctx,
 
 		if (i == VARYING_SLOT_POS) {
 			target = V_008DFC_SQ_EXP_POS;
-		} else if (i == VARYING_SLOT_CLIP_DIST0) {
+		} else if (i == VARYING_SLOT_CLIP_DIST0 ||
+			   i == VARYING_SLOT_CLIP_DIST1 ||
+			   i == VARYING_SLOT_CULL_DIST0 ||
+			   i == VARYING_SLOT_CULL_DIST1) {
 			continue;
 		} else if (i == VARYING_SLOT_PSIZ) {
-			outinfo->writes_pointsize = true;
+			ctx->shader_info->vs.writes_pointsize = true;
 			psize_value = values[0];
 			continue;
-		} else if (i == VARYING_SLOT_LAYER) {
-			outinfo->writes_layer = true;
-			layer_value = values[0];
-			outinfo->layer_output = param_count;
-			target = V_008DFC_SQ_EXP_PARAM + param_count;
-			param_count++;
-		} else if (i == VARYING_SLOT_VIEWPORT) {
-			outinfo->writes_viewport_index = true;
-			viewport_index_value = values[0];
-			continue;
-		} else if (i == VARYING_SLOT_PRIMITIVE_ID) {
-			outinfo->prim_id_output = param_count;
-			target = V_008DFC_SQ_EXP_PARAM + param_count;
-			param_count++;
 		} else if (i >= VARYING_SLOT_VAR0) {
-			outinfo->export_mask |= 1u << (i - VARYING_SLOT_VAR0);
+			ctx->shader_info->vs.export_mask |= 1u << (i - VARYING_SLOT_VAR0);
 			target = V_008DFC_SQ_EXP_PARAM + param_count;
 			param_count++;
 		}
 
-		si_llvm_init_export_args(ctx, values, target, &args);
+		si_llvm_init_export_args(ctx, values, target, args);
 
 		if (target >= V_008DFC_SQ_EXP_POS &&
 		    target <= (V_008DFC_SQ_EXP_POS + 3)) {
-			memcpy(&pos_args[target - V_008DFC_SQ_EXP_POS],
-			       &args, sizeof(args));
+			memcpy(pos_args[target - V_008DFC_SQ_EXP_POS],
+			       args, sizeof(args));
 		} else {
-			ac_build_export(&ctx->ac, &args);
+			emit_llvm_intrinsic(ctx,
+					    "llvm.SI.export",
+					    LLVMVoidTypeInContext(ctx->context),
+					    args, 9, 0);
 		}
 	}
 
 	/* We need to add the position output manually if it's missing. */
-	if (!pos_args[0].out[0]) {
-		pos_args[0].enabled_channels = 0xf;
-		pos_args[0].valid_mask = 0;
-		pos_args[0].done = 0;
-		pos_args[0].target = V_008DFC_SQ_EXP_POS;
-		pos_args[0].compr = 0;
-		pos_args[0].out[0] = ctx->f32zero; /* X */
-		pos_args[0].out[1] = ctx->f32zero; /* Y */
-		pos_args[0].out[2] = ctx->f32zero; /* Z */
-		pos_args[0].out[3] = ctx->f32one;  /* W */
-	}
-
-	uint32_t mask = ((outinfo->writes_pointsize == true ? 1 : 0) |
-			 (outinfo->writes_layer == true ? 4 : 0) |
-			 (outinfo->writes_viewport_index == true ? 8 : 0));
-	if (mask) {
-		pos_args[1].enabled_channels = mask;
-		pos_args[1].valid_mask = 0;
-		pos_args[1].done = 0;
-		pos_args[1].target = V_008DFC_SQ_EXP_POS + 1;
-		pos_args[1].compr = 0;
-		pos_args[1].out[0] = ctx->f32zero; /* X */
-		pos_args[1].out[1] = ctx->f32zero; /* Y */
-		pos_args[1].out[2] = ctx->f32zero; /* Z */
-		pos_args[1].out[3] = ctx->f32zero;  /* W */
-
-		if (outinfo->writes_pointsize == true)
-			pos_args[1].out[0] = psize_value;
-		if (outinfo->writes_layer == true)
-			pos_args[1].out[2] = layer_value;
-		if (outinfo->writes_viewport_index == true)
-			pos_args[1].out[3] = viewport_index_value;
+	if (!pos_args[0][0]) {
+		pos_args[0][0] = LLVMConstInt(ctx->i32, 0xf, false);
+		pos_args[0][1] = ctx->i32zero; /* EXEC mask */
+		pos_args[0][2] = ctx->i32zero; /* last export? */
+		pos_args[0][3] = LLVMConstInt(ctx->i32, V_008DFC_SQ_EXP_POS, false);
+		pos_args[0][4] = ctx->i32zero; /* COMPR flag */
+		pos_args[0][5] = ctx->f32zero; /* X */
+		pos_args[0][6] = ctx->f32zero; /* Y */
+		pos_args[0][7] = ctx->f32zero; /* Z */
+		pos_args[0][8] = ctx->f32one;  /* W */
+	}
+
+	if (ctx->shader_info->vs.writes_pointsize == true) {
+		pos_args[1][0] = LLVMConstInt(ctx->i32, (ctx->shader_info->vs.writes_pointsize == true), false); /* writemask */
+		pos_args[1][1] = ctx->i32zero;  /* EXEC mask */
+		pos_args[1][2] = ctx->i32zero;  /* last export? */
+		pos_args[1][3] = LLVMConstInt(ctx->i32, V_008DFC_SQ_EXP_POS + 1, false);
+		pos_args[1][4] = ctx->i32zero;  /* COMPR flag */
+		pos_args[1][5] = ctx->f32zero; /* X */
+		pos_args[1][6] = ctx->f32zero; /* Y */
+		pos_args[1][7] = ctx->f32zero; /* Z */
+		pos_args[1][8] = ctx->f32zero;  /* W */
+
+		if (ctx->shader_info->vs.writes_pointsize == true)
+			pos_args[1][5] = psize_value;
 	}
 	for (i = 0; i < 4; i++) {
-		if (pos_args[i].out[0])
+		if (pos_args[i][0])
 			num_pos_exports++;
 	}
 
 	pos_idx = 0;
 	for (i = 0; i < 4; i++) {
-		if (!pos_args[i].out[0])
+		if (!pos_args[i][0])
 			continue;
 
 		/* Specify the target we are exporting */
-		pos_args[i].target = V_008DFC_SQ_EXP_POS + pos_idx++;
+		pos_args[i][3] = LLVMConstInt(ctx->i32, V_008DFC_SQ_EXP_POS + pos_idx++, false);
 		if (pos_idx == num_pos_exports)
-			pos_args[i].done = 1;
-		ac_build_export(&ctx->ac, &pos_args[i]);
-	}
-
-	outinfo->pos_exports = num_pos_exports;
-	outinfo->param_exports = param_count;
-}
-
-static void
-handle_es_outputs_post(struct nir_to_llvm_context *ctx,
-		       struct ac_es_output_info *outinfo)
-{
-	int j;
-	uint64_t max_output_written = 0;
-	for (unsigned i = 0; i < RADEON_LLVM_MAX_OUTPUTS; ++i) {
-		LLVMValueRef *out_ptr = &ctx->outputs[i * 4];
-		int param_index;
-		int length = 4;
-
-		if (!(ctx->output_mask & (1ull << i)))
-			continue;
-
-		if (i == VARYING_SLOT_CLIP_DIST0)
-			length = ctx->num_output_clips + ctx->num_output_culls;
-
-		param_index = shader_io_get_unique_index(i);
-
-		max_output_written = MAX2(param_index + (length > 4), max_output_written);
-
-		for (j = 0; j < length; j++) {
-			LLVMValueRef out_val = LLVMBuildLoad(ctx->builder, out_ptr[j], "");
-			out_val = LLVMBuildBitCast(ctx->builder, out_val, ctx->i32, "");
-
-			ac_build_buffer_store_dword(&ctx->ac,
-					       ctx->esgs_ring,
-					       out_val, 1,
-					       NULL, ctx->es2gs_offset,
-					       (4 * param_index + j) * 4,
-					       1, 1, true, true);
-		}
-	}
-	outinfo->esgs_itemsize = (max_output_written + 1) * 16;
-}
-
-static void
-handle_ls_outputs_post(struct nir_to_llvm_context *ctx)
-{
-	LLVMValueRef vertex_id = ctx->rel_auto_id;
-	LLVMValueRef vertex_dw_stride = unpack_param(ctx, ctx->ls_out_layout, 13, 8);
-	LLVMValueRef base_dw_addr = LLVMBuildMul(ctx->builder, vertex_id,
-						 vertex_dw_stride, "");
-
-	for (unsigned i = 0; i < RADEON_LLVM_MAX_OUTPUTS; ++i) {
-		LLVMValueRef *out_ptr = &ctx->outputs[i * 4];
-		int length = 4;
-
-		if (!(ctx->output_mask & (1ull << i)))
-			continue;
-
-		if (i == VARYING_SLOT_CLIP_DIST0)
-			length = ctx->num_output_clips + ctx->num_output_culls;
-		int param = shader_io_get_unique_index(i);
-		mark_tess_output(ctx, false, param);
-		if (length > 4)
-			mark_tess_output(ctx, false, param + 1);
-		LLVMValueRef dw_addr = LLVMBuildAdd(ctx->builder, base_dw_addr,
-						    LLVMConstInt(ctx->i32, param * 4, false),
-						    "");
-		for (unsigned j = 0; j < length; j++) {
-			lds_store(ctx, dw_addr,
-				  LLVMBuildLoad(ctx->builder, out_ptr[j], ""));
-			dw_addr = LLVMBuildAdd(ctx->builder, dw_addr, ctx->i32one, "");
-		}
-	}
-}
-
-struct ac_build_if_state
-{
-	struct nir_to_llvm_context *ctx;
-	LLVMValueRef condition;
-	LLVMBasicBlockRef entry_block;
-	LLVMBasicBlockRef true_block;
-	LLVMBasicBlockRef false_block;
-	LLVMBasicBlockRef merge_block;
-};
-
-static LLVMBasicBlockRef
-ac_build_insert_new_block(struct nir_to_llvm_context *ctx, const char *name)
-{
-	LLVMBasicBlockRef current_block;
-	LLVMBasicBlockRef next_block;
-	LLVMBasicBlockRef new_block;
-
-	/* get current basic block */
-	current_block = LLVMGetInsertBlock(ctx->builder);
-
-	/* chqeck if there's another block after this one */
-	next_block = LLVMGetNextBasicBlock(current_block);
-	if (next_block) {
-		/* insert the new block before the next block */
-		new_block = LLVMInsertBasicBlockInContext(ctx->context, next_block, name);
-	}
-	else {
-		/* append new block after current block */
-		LLVMValueRef function = LLVMGetBasicBlockParent(current_block);
-		new_block = LLVMAppendBasicBlockInContext(ctx->context, function, name);
-	}
-	return new_block;
-}
-
-static void
-ac_nir_build_if(struct ac_build_if_state *ifthen,
-		struct nir_to_llvm_context *ctx,
-		LLVMValueRef condition)
-{
-	LLVMBasicBlockRef block = LLVMGetInsertBlock(ctx->builder);
-
-	memset(ifthen, 0, sizeof *ifthen);
-	ifthen->ctx = ctx;
-	ifthen->condition = condition;
-	ifthen->entry_block = block;
-
-	/* create endif/merge basic block for the phi functions */
-	ifthen->merge_block = ac_build_insert_new_block(ctx, "endif-block");
-
-	/* create/insert true_block before merge_block */
-	ifthen->true_block =
-		LLVMInsertBasicBlockInContext(ctx->context,
-					      ifthen->merge_block,
-					      "if-true-block");
-
-	/* successive code goes into the true block */
-	LLVMPositionBuilderAtEnd(ctx->builder, ifthen->true_block);
-}
-
-/**
- * End a conditional.
- */
-static void
-ac_nir_build_endif(struct ac_build_if_state *ifthen)
-{
-	LLVMBuilderRef builder = ifthen->ctx->builder;
-
-	/* Insert branch to the merge block from current block */
-	LLVMBuildBr(builder, ifthen->merge_block);
-
-	/*
-	 * Now patch in the various branch instructions.
-	 */
-
-	/* Insert the conditional branch instruction at the end of entry_block */
-	LLVMPositionBuilderAtEnd(builder, ifthen->entry_block);
-	if (ifthen->false_block) {
-		/* we have an else clause */
-		LLVMBuildCondBr(builder, ifthen->condition,
-				ifthen->true_block, ifthen->false_block);
-	}
-	else {
-		/* no else clause */
-		LLVMBuildCondBr(builder, ifthen->condition,
-				ifthen->true_block, ifthen->merge_block);
+			pos_args[i][2] = ctx->i32one;
+		emit_llvm_intrinsic(ctx,
+				    "llvm.SI.export",
+				    LLVMVoidTypeInContext(ctx->context),
+				    pos_args[i], 9, 0);
 	}
 
-	/* Resume building code at end of the ifthen->merge_block */
-	LLVMPositionBuilderAtEnd(builder, ifthen->merge_block);
-}
-
-static void
-write_tess_factors(struct nir_to_llvm_context *ctx)
-{
-	unsigned stride, outer_comps, inner_comps;
-	struct ac_build_if_state if_ctx, inner_if_ctx;
-	LLVMValueRef invocation_id = unpack_param(ctx, ctx->tcs_rel_ids, 8, 5);
-	LLVMValueRef rel_patch_id = unpack_param(ctx, ctx->tcs_rel_ids, 0, 8);
-	unsigned tess_inner_index, tess_outer_index;
-	LLVMValueRef lds_base, lds_inner, lds_outer, byteoffset, buffer;
-	LLVMValueRef out[6], vec0, vec1, tf_base, inner[4], outer[4];
-	int i;
-	emit_barrier(ctx);
-
-	switch (ctx->options->key.tcs.primitive_mode) {
-	case GL_ISOLINES:
-		stride = 2;
-		outer_comps = 2;
-		inner_comps = 0;
-		break;
-	case GL_TRIANGLES:
-		stride = 4;
-		outer_comps = 3;
-		inner_comps = 1;
-		break;
-	case GL_QUADS:
-		stride = 6;
-		outer_comps = 4;
-		inner_comps = 2;
-		break;
-	default:
-		return;
-	}
-
-	ac_nir_build_if(&if_ctx, ctx,
-			LLVMBuildICmp(ctx->builder, LLVMIntEQ,
-				      invocation_id, ctx->i32zero, ""));
-
-	tess_inner_index = shader_io_get_unique_index(VARYING_SLOT_TESS_LEVEL_INNER);
-	tess_outer_index = shader_io_get_unique_index(VARYING_SLOT_TESS_LEVEL_OUTER);
-
-	mark_tess_output(ctx, true, tess_inner_index);
-	mark_tess_output(ctx, true, tess_outer_index);
-	lds_base = get_tcs_out_current_patch_data_offset(ctx);
-	lds_inner = LLVMBuildAdd(ctx->builder, lds_base,
-				 LLVMConstInt(ctx->i32, tess_inner_index * 4, false), "");
-	lds_outer = LLVMBuildAdd(ctx->builder, lds_base,
-				 LLVMConstInt(ctx->i32, tess_outer_index * 4, false), "");
-
-	for (i = 0; i < 4; i++) {
-		inner[i] = LLVMGetUndef(ctx->i32);
-		outer[i] = LLVMGetUndef(ctx->i32);
-	}
-
-	// LINES reverseal
-	if (ctx->options->key.tcs.primitive_mode == GL_ISOLINES) {
-		outer[0] = out[1] = lds_load(ctx, lds_outer);
-		lds_outer = LLVMBuildAdd(ctx->builder, lds_outer,
-					 LLVMConstInt(ctx->i32, 1, false), "");
-		outer[1] = out[0] = lds_load(ctx, lds_outer);
-	} else {
-		for (i = 0; i < outer_comps; i++) {
-			outer[i] = out[i] =
-				lds_load(ctx, lds_outer);
-			lds_outer = LLVMBuildAdd(ctx->builder, lds_outer,
-						 LLVMConstInt(ctx->i32, 1, false), "");
-		}
-		for (i = 0; i < inner_comps; i++) {
-			inner[i] = out[outer_comps+i] =
-				lds_load(ctx, lds_inner);
-			lds_inner = LLVMBuildAdd(ctx->builder, lds_inner,
-						 LLVMConstInt(ctx->i32, 1, false), "");
-		}
-	}
-
-	/* Convert the outputs to vectors for stores. */
-	vec0 = ac_build_gather_values(&ctx->ac, out, MIN2(stride, 4));
-	vec1 = NULL;
-
-	if (stride > 4)
-		vec1 = ac_build_gather_values(&ctx->ac, out + 4, stride - 4);
-
-
-	buffer = ctx->hs_ring_tess_factor;
-	tf_base = ctx->tess_factor_offset;
-	byteoffset = LLVMBuildMul(ctx->builder, rel_patch_id,
-				  LLVMConstInt(ctx->i32, 4 * stride, false), "");
-
-	ac_nir_build_if(&inner_if_ctx, ctx,
-		    LLVMBuildICmp(ctx->builder, LLVMIntEQ,
-				  rel_patch_id, ctx->i32zero, ""));
-
-	/* Store the dynamic HS control word. */
-	ac_build_buffer_store_dword(&ctx->ac, buffer,
-				    LLVMConstInt(ctx->i32, 0x80000000, false),
-				    1, ctx->i32zero, tf_base,
-				    0, 1, 0, true, false);
-	ac_nir_build_endif(&inner_if_ctx);
-
-	/* Store the tessellation factors. */
-	ac_build_buffer_store_dword(&ctx->ac, buffer, vec0,
-				    MIN2(stride, 4), byteoffset, tf_base,
-				    4, 1, 0, true, false);
-	if (vec1)
-		ac_build_buffer_store_dword(&ctx->ac, buffer, vec1,
-					    stride - 4, byteoffset, tf_base,
-					    20, 1, 0, true, false);
-
-	//TODO store to offchip for TES to read - only if TES reads them
-	if (1) {
-		LLVMValueRef inner_vec, outer_vec, tf_outer_offset;
-		LLVMValueRef tf_inner_offset;
-		unsigned param_outer, param_inner;
-
-		param_outer = shader_io_get_unique_index(VARYING_SLOT_TESS_LEVEL_OUTER);
-		tf_outer_offset = get_tcs_tes_buffer_address(ctx, NULL,
-							     LLVMConstInt(ctx->i32, param_outer, 0));
-
-		outer_vec = ac_build_gather_values(&ctx->ac, outer,
-						   util_next_power_of_two(outer_comps));
-
-		ac_build_buffer_store_dword(&ctx->ac, ctx->hs_ring_tess_offchip, outer_vec,
-					    outer_comps, tf_outer_offset,
-					    ctx->oc_lds, 0, 1, 0, true, false);
-		if (inner_comps) {
-			param_inner = shader_io_get_unique_index(VARYING_SLOT_TESS_LEVEL_INNER);
-			tf_inner_offset = get_tcs_tes_buffer_address(ctx, NULL,
-								     LLVMConstInt(ctx->i32, param_inner, 0));
-
-			inner_vec = inner_comps == 1 ? inner[0] :
-				ac_build_gather_values(&ctx->ac, inner, inner_comps);
-			ac_build_buffer_store_dword(&ctx->ac, ctx->hs_ring_tess_offchip, inner_vec,
-						    inner_comps, tf_inner_offset,
-						    ctx->oc_lds, 0, 1, 0, true, false);
-		}
-	}
-	ac_nir_build_endif(&if_ctx);
-}
-
-static void
-handle_tcs_outputs_post(struct nir_to_llvm_context *ctx)
-{
-	write_tess_factors(ctx);
+	ctx->shader_info->vs.pos_exports = num_pos_exports;
+	ctx->shader_info->vs.param_exports = param_count;
 }
 
 static void
 si_export_mrt_color(struct nir_to_llvm_context *ctx,
 		    LLVMValueRef *color, unsigned param, bool is_last)
 {
-
-	struct ac_export_args args;
-
+	LLVMValueRef args[9];
 	/* Export */
 	si_llvm_init_export_args(ctx, color, param,
-				 &args);
+				 args);
 
 	if (is_last) {
-		args.valid_mask = 1; /* whether the EXEC mask is valid */
-		args.done = 1; /* DONE bit */
-	} else if (!args.enabled_channels)
+		args[1] = ctx->i32one; /* whether the EXEC mask is valid */
+		args[2] = ctx->i32one; /* DONE bit */
+	} else if (args[0] == ctx->i32zero)
 		return; /* unnecessary NULL export */
 
-	ac_build_export(&ctx->ac, &args);
+	emit_llvm_intrinsic(ctx, "llvm.SI.export",
+			    ctx->voidt, args, 9, 0);
 }
 
 static void
@@ -5563,46 +4339,48 @@ si_export_mrt_z(struct nir_to_llvm_context *ctx,
 		LLVMValueRef depth, LLVMValueRef stencil,
 		LLVMValueRef samplemask)
 {
-	struct ac_export_args args;
-
-	args.enabled_channels = 0;
-	args.valid_mask = 1;
-	args.done = 1;
-	args.target = V_008DFC_SQ_EXP_MRTZ;
-	args.compr = false;
+	LLVMValueRef args[9];
+	unsigned mask = 0;
+	args[1] = ctx->i32one; /* whether the EXEC mask is valid */
+	args[2] = ctx->i32one; /* DONE bit */
+	/* Specify the target we are exporting */
+	args[3] = LLVMConstInt(ctx->i32, V_008DFC_SQ_EXP_MRTZ, false);
 
-	args.out[0] = LLVMGetUndef(ctx->f32); /* R, depth */
-	args.out[1] = LLVMGetUndef(ctx->f32); /* G, stencil test val[0:7], stencil op val[8:15] */
-	args.out[2] = LLVMGetUndef(ctx->f32); /* B, sample mask */
-	args.out[3] = LLVMGetUndef(ctx->f32); /* A, alpha to mask */
+	args[4] = ctx->i32zero; /* COMP flag */
+	args[5] = LLVMGetUndef(ctx->f32); /* R, depth */
+	args[6] = LLVMGetUndef(ctx->f32); /* G, stencil test val[0:7], stencil op val[8:15] */
+	args[7] = LLVMGetUndef(ctx->f32); /* B, sample mask */
+	args[8] = LLVMGetUndef(ctx->f32); /* A, alpha to mask */
 
 	if (depth) {
-		args.out[0] = depth;
-		args.enabled_channels |= 0x1;
+		args[5] = depth;
+		mask |= 0x1;
 	}
 
 	if (stencil) {
-		args.out[1] = stencil;
-		args.enabled_channels |= 0x2;
+		args[6] = stencil;
+		mask |= 0x2;
 	}
 
 	if (samplemask) {
-		args.out[2] = samplemask;
-		args.enabled_channels |= 0x4;
+		args[7] = samplemask;
+		mask |= 0x04;
 	}
 
-	/* SI (except OLAND and HAINAN) has a bug that it only looks
+	/* SI (except OLAND) has a bug that it only looks
 	 * at the X writemask component. */
 	if (ctx->options->chip_class == SI &&
-	    ctx->options->family != CHIP_OLAND &&
-	    ctx->options->family != CHIP_HAINAN)
-		args.enabled_channels |= 0x1;
+	    ctx->options->family != CHIP_OLAND)
+		mask |= 0x01;
 
-	ac_build_export(&ctx->ac, &args);
+	args[0] = LLVMConstInt(ctx->i32, mask, false);
+	emit_llvm_intrinsic(ctx, "llvm.SI.export",
+			    ctx->voidt, args, 9, 0);
 }
 
 static void
-handle_fs_outputs_post(struct nir_to_llvm_context *ctx)
+handle_fs_outputs_post(struct nir_to_llvm_context *ctx,
+		       struct nir_shader *nir)
 {
 	unsigned index = 0;
 	LLVMValueRef depth = NULL, stencil = NULL, samplemask = NULL;
@@ -5621,17 +4399,13 @@ handle_fs_outputs_post(struct nir_to_llvm_context *ctx)
 			ctx->shader_info->fs.writes_stencil = true;
 			stencil = to_float(ctx, LLVMBuildLoad(ctx->builder,
 							      ctx->outputs[radeon_llvm_reg_index_soa(i, 0)], ""));
-		} else if (i == FRAG_RESULT_SAMPLE_MASK) {
-			ctx->shader_info->fs.writes_sample_mask = true;
-			samplemask = to_float(ctx, LLVMBuildLoad(ctx->builder,
-								  ctx->outputs[radeon_llvm_reg_index_soa(i, 0)], ""));
 		} else {
 			bool last = false;
 			for (unsigned j = 0; j < 4; j++)
 				values[j] = to_float(ctx, LLVMBuildLoad(ctx->builder,
 									ctx->outputs[radeon_llvm_reg_index_soa(i, j)], ""));
 
-			if (!ctx->shader_info->fs.writes_z && !ctx->shader_info->fs.writes_stencil && !ctx->shader_info->fs.writes_sample_mask)
+			if (!ctx->shader_info->fs.writes_z && !ctx->shader_info->fs.writes_stencil)
 				last = ctx->output_mask <= ((1ull << (i + 1)) - 1);
 
 			si_export_mrt_color(ctx, values, V_008DFC_SQ_EXP_MRT + index, last);
@@ -5639,7 +4413,7 @@ handle_fs_outputs_post(struct nir_to_llvm_context *ctx)
 		}
 	}
 
-	if (depth || stencil || samplemask)
+	if (depth || stencil)
 		si_export_mrt_z(ctx, depth, stencil, samplemask);
 	else if (!index)
 		si_export_mrt_color(ctx, NULL, V_008DFC_SQ_EXP_NULL, true);
@@ -5648,37 +4422,15 @@ handle_fs_outputs_post(struct nir_to_llvm_context *ctx)
 }
 
 static void
-emit_gs_epilogue(struct nir_to_llvm_context *ctx)
-{
-	ac_build_sendmsg(&ctx->ac, AC_SENDMSG_GS_OP_NOP | AC_SENDMSG_GS_DONE, ctx->gs_wave_id);
-}
-
-static void
-handle_shader_outputs_post(struct nir_to_llvm_context *ctx)
+handle_shader_outputs_post(struct nir_to_llvm_context *ctx,
+			   struct nir_shader *nir)
 {
 	switch (ctx->stage) {
 	case MESA_SHADER_VERTEX:
-		if (ctx->options->key.vs.as_ls)
-			handle_ls_outputs_post(ctx);
-		else if (ctx->options->key.vs.as_es)
-			handle_es_outputs_post(ctx, &ctx->shader_info->vs.es_info);
-		else
-			handle_vs_outputs_post(ctx, &ctx->shader_info->vs.outinfo);
+		handle_vs_outputs_post(ctx, nir);
 		break;
 	case MESA_SHADER_FRAGMENT:
-		handle_fs_outputs_post(ctx);
-		break;
-	case MESA_SHADER_GEOMETRY:
-		emit_gs_epilogue(ctx);
-		break;
-	case MESA_SHADER_TESS_CTRL:
-		handle_tcs_outputs_post(ctx);
-		break;
-	case MESA_SHADER_TESS_EVAL:
-		if (ctx->options->key.tes.as_es)
-			handle_es_outputs_post(ctx, &ctx->shader_info->tes.es_info);
-		else
-			handle_vs_outputs_post(ctx, &ctx->shader_info->tes.outinfo);
+		handle_fs_outputs_post(ctx, nir);
 		break;
 	default:
 		break;
@@ -5720,39 +4472,6 @@ static void ac_llvm_finalize_module(struct nir_to_llvm_context * ctx)
 	LLVMDisposePassManager(passmgr);
 }
 
-static void
-ac_setup_rings(struct nir_to_llvm_context *ctx)
-{
-	if ((ctx->stage == MESA_SHADER_VERTEX && ctx->options->key.vs.as_es) ||
-	    (ctx->stage == MESA_SHADER_TESS_EVAL && ctx->options->key.tes.as_es)) {
-		ctx->esgs_ring = ac_build_indexed_load_const(&ctx->ac, ctx->ring_offsets, LLVMConstInt(ctx->i32, RING_ESGS_VS, false));
-	}
-
-	if (ctx->is_gs_copy_shader) {
-		ctx->gsvs_ring = ac_build_indexed_load_const(&ctx->ac, ctx->ring_offsets, LLVMConstInt(ctx->i32, RING_GSVS_VS, false));
-	}
-	if (ctx->stage == MESA_SHADER_GEOMETRY) {
-		LLVMValueRef tmp;
-		ctx->esgs_ring = ac_build_indexed_load_const(&ctx->ac, ctx->ring_offsets, LLVMConstInt(ctx->i32, RING_ESGS_GS, false));
-		ctx->gsvs_ring = ac_build_indexed_load_const(&ctx->ac, ctx->ring_offsets, LLVMConstInt(ctx->i32, RING_GSVS_GS, false));
-
-		ctx->gsvs_ring = LLVMBuildBitCast(ctx->builder, ctx->gsvs_ring, ctx->v4i32, "");
-
-		ctx->gsvs_ring = LLVMBuildInsertElement(ctx->builder, ctx->gsvs_ring, ctx->gsvs_num_entries, LLVMConstInt(ctx->i32, 2, false), "");
-		tmp = LLVMBuildExtractElement(ctx->builder, ctx->gsvs_ring, ctx->i32one, "");
-		tmp = LLVMBuildOr(ctx->builder, tmp, ctx->gsvs_ring_stride, "");
-		ctx->gsvs_ring = LLVMBuildInsertElement(ctx->builder, ctx->gsvs_ring, tmp, ctx->i32one, "");
-
-		ctx->gsvs_ring = LLVMBuildBitCast(ctx->builder, ctx->gsvs_ring, ctx->v16i8, "");
-	}
-
-	if (ctx->stage == MESA_SHADER_TESS_CTRL ||
-	    ctx->stage == MESA_SHADER_TESS_EVAL) {
-		ctx->hs_ring_tess_offchip = ac_build_indexed_load_const(&ctx->ac, ctx->ring_offsets, LLVMConstInt(ctx->i32, RING_HS_TESS_OFFCHIP, false));
-		ctx->hs_ring_tess_factor = ac_build_indexed_load_const(&ctx->ac, ctx->ring_offsets, LLVMConstInt(ctx->i32, RING_HS_TESS_FACTOR, false));
-	}
-}
-
 static
 LLVMModuleRef ac_translate_nir_to_llvm(LLVMTargetMachineRef tm,
                                        struct nir_shader *nir,
@@ -5761,39 +4480,20 @@ LLVMModuleRef ac_translate_nir_to_llvm(LLVMTargetMachineRef tm,
 {
 	struct nir_to_llvm_context ctx = {0};
 	struct nir_function *func;
-	unsigned i;
 	ctx.options = options;
 	ctx.shader_info = shader_info;
 	ctx.context = LLVMContextCreate();
 	ctx.module = LLVMModuleCreateWithNameInContext("shader", ctx.context);
 
-	ac_llvm_context_init(&ctx.ac, ctx.context);
-	ctx.ac.module = ctx.module;
-
-	ctx.has_ds_bpermute = ctx.options->chip_class >= VI;
-
 	memset(shader_info, 0, sizeof(*shader_info));
 
-	LLVMSetTarget(ctx.module, options->supports_spill ? "amdgcn-mesa-mesa3d" : "amdgcn--");
-
-	LLVMTargetDataRef data_layout = LLVMCreateTargetDataLayout(tm);
-	char *data_layout_str = LLVMCopyStringRepOfTargetData(data_layout);
-	LLVMSetDataLayout(ctx.module, data_layout_str);
-	LLVMDisposeTargetData(data_layout);
-	LLVMDisposeMessage(data_layout_str);
-
+	LLVMSetTarget(ctx.module, "amdgcn--");
 	setup_types(&ctx);
 
 	ctx.builder = LLVMCreateBuilderInContext(ctx.context);
-	ctx.ac.builder = ctx.builder;
 	ctx.stage = nir->stage;
 
-	for (i = 0; i < AC_UD_MAX_SETS; i++)
-		shader_info->user_sgprs_locs.descriptor_sets[i].sgpr_idx = -1;
-	for (i = 0; i < AC_UD_MAX_UD; i++)
-		shader_info->user_sgprs_locs.shader_data[i].sgpr_idx = -1;
-
-	create_function(&ctx);
+	create_function(&ctx, nir);
 
 	if (nir->stage == MESA_SHADER_COMPUTE) {
 		int num_shared = 0;
@@ -5809,7 +4509,7 @@ LLVMModuleRef ac_translate_nir_to_llvm(LLVMTargetMachineRef tm,
 				idx++;
 			}
 
-			shared_size *= 16;
+			shared_size *= 4;
 			var = LLVMAddGlobalInAddressSpace(ctx.module,
 							  LLVMArrayType(ctx.i8, shared_size),
 							  "compute_lds",
@@ -5817,25 +4517,14 @@ LLVMModuleRef ac_translate_nir_to_llvm(LLVMTargetMachineRef tm,
 			LLVMSetAlignment(var, 4);
 			ctx.shared_memory = LLVMBuildBitCast(ctx.builder, var, i8p, "");
 		}
-	} else if (nir->stage == MESA_SHADER_GEOMETRY) {
-		ctx.gs_next_vertex = ac_build_alloca(&ctx, ctx.i32, "gs_next_vertex");
-
-		ctx.gs_max_out_vertices = nir->info->gs.vertices_out;
-	} else if (nir->stage == MESA_SHADER_TESS_EVAL) {
-		ctx.tes_primitive_mode = nir->info->tess.primitive_mode;
 	}
 
-	ac_setup_rings(&ctx);
-
 	nir_foreach_variable(variable, &nir->inputs)
 		handle_shader_input_decl(&ctx, variable);
 
 	if (nir->stage == MESA_SHADER_FRAGMENT)
 		handle_fs_inputs_pre(&ctx, nir);
 
-	ctx.num_output_clips = nir->info->clip_distance_array_size;
-	ctx.num_output_culls = nir->info->cull_distance_array_size;
-
 	nir_foreach_variable(variable, &nir->outputs)
 		handle_shader_output_decl(&ctx, variable);
 
@@ -5851,7 +4540,7 @@ LLVMModuleRef ac_translate_nir_to_llvm(LLVMTargetMachineRef tm,
 	visit_cf_list(&ctx, &func->impl->body);
 	phi_post_pass(&ctx);
 
-	handle_shader_outputs_post(&ctx);
+	handle_shader_outputs_post(&ctx, nir);
 	LLVMBuildRetVoid(ctx.builder);
 
 	ac_llvm_finalize_module(&ctx);
@@ -5859,18 +4548,6 @@ LLVMModuleRef ac_translate_nir_to_llvm(LLVMTargetMachineRef tm,
 	ralloc_free(ctx.defs);
 	ralloc_free(ctx.phis);
 
-	if (nir->stage == MESA_SHADER_GEOMETRY) {
-		unsigned addclip = ctx.num_output_clips + ctx.num_output_culls > 4;
-		shader_info->gs.gsvs_vertex_size = (util_bitcount64(ctx.output_mask) + addclip) * 16;
-		shader_info->gs.max_gsvs_emit_size = shader_info->gs.gsvs_vertex_size *
-			nir->info->gs.vertices_out;
-	} else if (nir->stage == MESA_SHADER_TESS_CTRL) {
-		shader_info->tcs.outputs_written = ctx.tess_outputs_written;
-		shader_info->tcs.patch_outputs_written = ctx.tess_patch_outputs_written;
-	} else if (nir->stage == MESA_SHADER_VERTEX && ctx.options->key.vs.as_ls) {
-		shader_info->vs.outputs_written = ctx.tess_outputs_written;
-	}
-
 	return ctx.module;
 }
 
@@ -5932,16 +4609,19 @@ out:
 	return retval;
 }
 
-static void ac_compile_llvm_module(LLVMTargetMachineRef tm,
-				   LLVMModuleRef llvm_module,
-				   struct ac_shader_binary *binary,
-				   struct ac_shader_config *config,
-				   struct ac_shader_variant_info *shader_info,
-				   gl_shader_stage stage,
-				   bool dump_shader, bool supports_spill)
+void ac_compile_nir_shader(LLVMTargetMachineRef tm,
+                           struct ac_shader_binary *binary,
+                           struct ac_shader_config *config,
+                           struct ac_shader_variant_info *shader_info,
+                           struct nir_shader *nir,
+                           const struct ac_nir_compiler_options *options,
+			   bool dump_shader)
 {
+
+	LLVMModuleRef llvm_module = ac_translate_nir_to_llvm(tm, nir, shader_info,
+	                                                     options);
 	if (dump_shader)
-		ac_dump_module(llvm_module);
+		LLVMDumpModule(llvm_module);
 
 	memset(binary, 0, sizeof(*binary));
 	int v = ac_llvm_compile(llvm_module, binary, tm);
@@ -5952,13 +4632,13 @@ static void ac_compile_llvm_module(LLVMTargetMachineRef tm,
 	if (dump_shader)
 		fprintf(stderr, "disasm:\n%s\n", binary->disasm_string);
 
-	ac_shader_binary_read_config(binary, config, 0, supports_spill);
+	ac_shader_binary_read_config(binary, config, 0);
 
 	LLVMContextRef ctx = LLVMGetModuleContext(llvm_module);
 	LLVMDisposeModule(llvm_module);
 	LLVMContextDispose(ctx);
 
-	if (stage == MESA_SHADER_FRAGMENT) {
+	if (nir->stage == MESA_SHADER_FRAGMENT) {
 		shader_info->num_input_vgprs = 0;
 		if (G_0286CC_PERSP_SAMPLE_ENA(config->spi_ps_input_addr))
 			shader_info->num_input_vgprs += 2;
@@ -5998,149 +4678,11 @@ static void ac_compile_llvm_module(LLVMTargetMachineRef tm,
 	/* +3 for scratch wave offset and VCC */
 	config->num_sgprs = MAX2(config->num_sgprs,
 	                         shader_info->num_input_sgprs + 3);
-}
-
-void ac_compile_nir_shader(LLVMTargetMachineRef tm,
-                           struct ac_shader_binary *binary,
-                           struct ac_shader_config *config,
-                           struct ac_shader_variant_info *shader_info,
-                           struct nir_shader *nir,
-                           const struct ac_nir_compiler_options *options,
-			   bool dump_shader)
-{
-
-	LLVMModuleRef llvm_module = ac_translate_nir_to_llvm(tm, nir, shader_info,
-	                                                     options);
-
-	ac_compile_llvm_module(tm, llvm_module, binary, config, shader_info, nir->stage, dump_shader, options->supports_spill);
-	switch (nir->stage) {
-	case MESA_SHADER_COMPUTE:
+	if (nir->stage == MESA_SHADER_COMPUTE) {
 		for (int i = 0; i < 3; ++i)
-			shader_info->cs.block_size[i] = nir->info->cs.local_size[i];
-		break;
-	case MESA_SHADER_FRAGMENT:
-		shader_info->fs.early_fragment_test = nir->info->fs.early_fragment_tests;
-		break;
-	case MESA_SHADER_GEOMETRY:
-		shader_info->gs.vertices_in = nir->info->gs.vertices_in;
-		shader_info->gs.vertices_out = nir->info->gs.vertices_out;
-		shader_info->gs.output_prim = nir->info->gs.output_primitive;
-		shader_info->gs.invocations = nir->info->gs.invocations;
-		break;
-	case MESA_SHADER_TESS_EVAL:
-		shader_info->tes.primitive_mode = nir->info->tess.primitive_mode;
-		shader_info->tes.spacing = nir->info->tess.spacing;
-		shader_info->tes.ccw = nir->info->tess.ccw;
-		shader_info->tes.point_mode = nir->info->tess.point_mode;
-		shader_info->tes.as_es = options->key.tes.as_es;
-		break;
-	case MESA_SHADER_TESS_CTRL:
-		shader_info->tcs.tcs_vertices_out = nir->info->tess.tcs_vertices_out;
-		break;
-	case MESA_SHADER_VERTEX:
-		shader_info->vs.as_es = options->key.vs.as_es;
-		shader_info->vs.as_ls = options->key.vs.as_ls;
-		/* in LS mode we need at least 1, invocation id needs 3, handled elsewhere */
-		if (options->key.vs.as_ls)
-			shader_info->vs.vgpr_comp_cnt = MAX2(1, shader_info->vs.vgpr_comp_cnt);
-		break;
-	default:
-		break;
-	}
-}
-
-static void
-ac_gs_copy_shader_emit(struct nir_to_llvm_context *ctx)
-{
-	LLVMValueRef args[9];
-	args[0] = ctx->gsvs_ring;
-	args[1] = LLVMBuildMul(ctx->builder, ctx->vertex_id, LLVMConstInt(ctx->i32, 4, false), "");
-	args[3] = ctx->i32zero;
-	args[4] = ctx->i32one;  /* OFFEN */
-	args[5] = ctx->i32zero; /* IDXEN */
-	args[6] = ctx->i32one;  /* GLC */
-	args[7] = ctx->i32one;  /* SLC */
-	args[8] = ctx->i32zero; /* TFE */
-
-	int idx = 0;
-
-	for (unsigned i = 0; i < RADEON_LLVM_MAX_OUTPUTS; ++i) {
-		int length = 4;
-		int slot = idx;
-		int slot_inc = 1;
-		if (!(ctx->output_mask & (1ull << i)))
-			continue;
-
-		if (i == VARYING_SLOT_CLIP_DIST0) {
-			/* unpack clip and cull from a single set of slots */
-			length = ctx->num_output_clips + ctx->num_output_culls;
-			if (length > 4)
-				slot_inc = 2;
-		}
-
-		for (unsigned j = 0; j < length; j++) {
-			LLVMValueRef value;
-			args[2] = LLVMConstInt(ctx->i32,
-					       (slot * 4 + j) *
-					       ctx->gs_max_out_vertices * 16 * 4, false);
-
-			value = ac_build_intrinsic(&ctx->ac,
-						   "llvm.SI.buffer.load.dword.i32.i32",
-						   ctx->i32, args, 9,
-						   AC_FUNC_ATTR_READONLY |
-						   AC_FUNC_ATTR_LEGACY);
-
-			LLVMBuildStore(ctx->builder,
-				       to_float(ctx, value), ctx->outputs[radeon_llvm_reg_index_soa(i, j)]);
-		}
-		idx += slot_inc;
+			shader_info->cs.block_size[i] = nir->info.cs.local_size[i];
 	}
-	handle_vs_outputs_post(ctx, &ctx->shader_info->vs.outinfo);
-}
 
-void ac_create_gs_copy_shader(LLVMTargetMachineRef tm,
-			      struct nir_shader *geom_shader,
-			      struct ac_shader_binary *binary,
-			      struct ac_shader_config *config,
-			      struct ac_shader_variant_info *shader_info,
-			      const struct ac_nir_compiler_options *options,
-			      bool dump_shader)
-{
-	struct nir_to_llvm_context ctx = {0};
-	ctx.context = LLVMContextCreate();
-	ctx.module = LLVMModuleCreateWithNameInContext("shader", ctx.context);
-	ctx.options = options;
-	ctx.shader_info = shader_info;
-
-	ac_llvm_context_init(&ctx.ac, ctx.context);
-	ctx.ac.module = ctx.module;
-
-	ctx.is_gs_copy_shader = true;
-	LLVMSetTarget(ctx.module, "amdgcn--");
-	setup_types(&ctx);
-
-	ctx.builder = LLVMCreateBuilderInContext(ctx.context);
-	ctx.ac.builder = ctx.builder;
-	ctx.stage = MESA_SHADER_VERTEX;
-
-	create_function(&ctx);
-
-	ctx.gs_max_out_vertices = geom_shader->info->gs.vertices_out;
-	ac_setup_rings(&ctx);
-
-	ctx.num_output_clips = geom_shader->info->clip_distance_array_size;
-	ctx.num_output_culls = geom_shader->info->cull_distance_array_size;
-
-	nir_foreach_variable(variable, &geom_shader->outputs)
-		handle_shader_output_decl(&ctx, variable);
-
-	ac_gs_copy_shader_emit(&ctx);
-
-	LLVMBuildRetVoid(ctx.builder);
-
-	ac_llvm_finalize_module(&ctx);
-
-	ac_compile_llvm_module(tm, ctx.module, binary, config, shader_info,
-			       MESA_SHADER_VERTEX,
-			       dump_shader, options->supports_spill);
+	if (nir->stage == MESA_SHADER_FRAGMENT)
+		shader_info->fs.early_fragment_test = nir->info.fs.early_fragment_tests;
 }