diff options
| author | Jonathan Gray <jsg@cvs.openbsd.org> | 2019-07-01 08:11:40 +0000 |
|---|---|---|
| committer | Jonathan Gray <jsg@cvs.openbsd.org> | 2019-07-01 08:11:40 +0000 |
| commit | c7ec8fd03c9d9b7fb0a4d639c24926d91e3c2b57 (patch) | |
| tree | b180da48692d02168ff59f637cb02ab33bb7d3db /lib/mesa/src/freedreno | |
| parent | 191ed0bbe942b47b2078dfb4a202aaed260860b8 (diff) | |
Import Mesa 19.0.8
Diffstat (limited to 'lib/mesa/src/freedreno')
| -rw-r--r-- | lib/mesa/src/freedreno/ir3/ir3_compiler_nir.c | 5 |
1 files changed, 3 insertions, 2 deletions
diff --git a/lib/mesa/src/freedreno/ir3/ir3_compiler_nir.c b/lib/mesa/src/freedreno/ir3/ir3_compiler_nir.c index fd6417356..fc882c2d2 100644 --- a/lib/mesa/src/freedreno/ir3/ir3_compiler_nir.c +++ b/lib/mesa/src/freedreno/ir3/ir3_compiler_nir.c @@ -686,8 +686,8 @@ emit_intrinsic_load_ubo(struct ir3_context *ctx, nir_intrinsic_instr *intr, base_lo = create_uniform(b, ubo + (src0->regs[1]->iim_val * ptrsz)); base_hi = create_uniform(b, ubo + (src0->regs[1]->iim_val * ptrsz) + 1); } else { - base_lo = create_uniform_indirect(b, ubo, ir3_get_addr(ctx, src0, 4)); - base_hi = create_uniform_indirect(b, ubo + 1, ir3_get_addr(ctx, src0, 4)); + base_lo = create_uniform_indirect(b, ubo, ir3_get_addr(ctx, src0, ptrsz)); + base_hi = create_uniform_indirect(b, ubo + 1, ir3_get_addr(ctx, src0, ptrsz)); } /* note: on 32bit gpu's base_hi is ignored and DCE'd */ @@ -1511,6 +1511,7 @@ emit_intrinsic_barrier(struct ir3_context *ctx, nir_intrinsic_instr *intr) barrier->cat7.g = true; barrier->cat7.r = true; barrier->cat7.w = true; + barrier->cat7.l = true; barrier->barrier_class = IR3_BARRIER_IMAGE_W | IR3_BARRIER_BUFFER_W; barrier->barrier_conflict = |