Import Mesa 21.3.7

31 files changed, 226 insertions, 224 deletions

diff --git a/lib/mesa/src/gallium/drivers/r300/compiler/r300_fragprog_swizzle.c b/lib/mesa/src/gallium/drivers/r300/compiler/r300_fragprog_swizzle.c
index 89cb9b6d9..da2a484d2 100644
--- a/lib/mesa/src/gallium/drivers/r300/compiler/r300_fragprog_swizzle.c
+++ b/lib/mesa/src/gallium/drivers/r300/compiler/r300_fragprog_swizzle.c
@@ -195,7 +195,7 @@ static void r300_swizzle_split(
 	}
 }
 
-struct rc_swizzle_caps r300_swizzle_caps = {
+const struct rc_swizzle_caps r300_swizzle_caps = {
 	.IsNative = r300_swizzle_is_native,
 	.Split = r300_swizzle_split
 };
diff --git a/lib/mesa/src/gallium/drivers/r300/compiler/r300_fragprog_swizzle.h b/lib/mesa/src/gallium/drivers/r300/compiler/r300_fragprog_swizzle.h
index f2635be14..b12594418 100644
--- a/lib/mesa/src/gallium/drivers/r300/compiler/r300_fragprog_swizzle.h
+++ b/lib/mesa/src/gallium/drivers/r300/compiler/r300_fragprog_swizzle.h
@@ -30,7 +30,7 @@
 
 #include "radeon_swizzle.h"
 
-extern struct rc_swizzle_caps r300_swizzle_caps;
+extern const struct rc_swizzle_caps r300_swizzle_caps;
 
 unsigned int r300FPTranslateRGBSwizzle(unsigned int src, unsigned int swizzle);
 unsigned int r300FPTranslateAlphaSwizzle(unsigned int src, unsigned int swizzle);
diff --git a/lib/mesa/src/gallium/drivers/r300/compiler/r3xx_fragprog.c b/lib/mesa/src/gallium/drivers/r300/compiler/r3xx_fragprog.c
index d03462c52..5c7a1e630 100644
--- a/lib/mesa/src/gallium/drivers/r300/compiler/r3xx_fragprog.c
+++ b/lib/mesa/src/gallium/drivers/r300/compiler/r3xx_fragprog.c
@@ -120,7 +120,6 @@ void r3xx_compile_fragment_program(struct r300_fragment_program_compiler* c)
 		/* This transformation needs to be done before any of the IF
 		 * instructions are modified. */
 		{"transform KILP",		1, 1,		rc_transform_KILL,		NULL},
-		{"unroll loops",		1, is_r500,	rc_unroll_loops,		NULL},
 		{"transform loops",		1, !is_r500,	rc_transform_loops,		NULL},
 		{"emulate branches",		1, !is_r500,	rc_emulate_branches,		NULL},
 		{"force alpha to one",		1, alpha2one,	rc_local_transform,		force_alpha_to_one},
diff --git a/lib/mesa/src/gallium/drivers/r300/compiler/r3xx_vertprog.c b/lib/mesa/src/gallium/drivers/r300/compiler/r3xx_vertprog.c
index bd4b16117..93eec205c 100644
--- a/lib/mesa/src/gallium/drivers/r300/compiler/r3xx_vertprog.c
+++ b/lib/mesa/src/gallium/drivers/r300/compiler/r3xx_vertprog.c
@@ -22,6 +22,7 @@
 
 #include "radeon_compiler.h"
 
+#include <stdbool.h>
 #include <stdio.h>
 
 #include "r300_reg.h"
@@ -369,7 +370,7 @@ static void translate_vertex_program(struct radeon_compiler *c, void *user)
 	struct r300_vertex_program_compiler *compiler = (struct r300_vertex_program_compiler*)c;
 	struct rc_instruction *rci;
 
-	unsigned loops[R500_PVS_MAX_LOOP_DEPTH];
+	unsigned loops[R500_PVS_MAX_LOOP_DEPTH] = {};
 	unsigned loop_depth = 0;
 
 	compiler->code->pos_end = 0;	/* Not supported yet */
@@ -559,15 +560,33 @@ struct temporary_allocation {
 	struct rc_instruction * LastRead;
 };
 
+static int get_reg(struct radeon_compiler *c, struct temporary_allocation *ta, bool *hwtemps,
+                   unsigned int orig)
+{
+    if (!ta[orig].Allocated) {
+        int j;
+        for (j = 0; j < c->max_temp_regs; ++j)
+        {
+            if (!hwtemps[j])
+                break;
+        }
+        ta[orig].Allocated = 1;
+        ta[orig].HwTemp = j;
+        hwtemps[ta[orig].HwTemp] = true;
+    }
+
+    return ta[orig].HwTemp;
+}
+
 static void allocate_temporary_registers(struct radeon_compiler *c, void *user)
 {
 	struct r300_vertex_program_compiler *compiler = (struct r300_vertex_program_compiler*)c;
 	struct rc_instruction *inst;
 	struct rc_instruction *end_loop = NULL;
 	unsigned int num_orig_temps = 0;
-	char hwtemps[RC_REGISTER_MAX_INDEX];
+	bool hwtemps[RC_REGISTER_MAX_INDEX];
 	struct temporary_allocation * ta;
-	unsigned int i, j;
+	unsigned int i;
 
 	memset(hwtemps, 0, sizeof(hwtemps));
 
@@ -638,28 +657,17 @@ static void allocate_temporary_registers(struct radeon_compiler *c, void *user)
 		for (i = 0; i < opcode->NumSrcRegs; ++i) {
 			if (inst->U.I.SrcReg[i].File == RC_FILE_TEMPORARY) {
 				unsigned int orig = inst->U.I.SrcReg[i].Index;
-				inst->U.I.SrcReg[i].Index = ta[orig].HwTemp;
+				inst->U.I.SrcReg[i].Index = get_reg(c, ta, hwtemps, orig);
 
 				if (ta[orig].Allocated && inst == ta[orig].LastRead)
-					hwtemps[ta[orig].HwTemp] = 0;
+					hwtemps[ta[orig].HwTemp] = false;
 			}
 		}
 
 		if (opcode->HasDstReg) {
 			if (inst->U.I.DstReg.File == RC_FILE_TEMPORARY) {
 				unsigned int orig = inst->U.I.DstReg.Index;
-
-				if (!ta[orig].Allocated) {
-					for(j = 0; j < c->max_temp_regs; ++j) {
-						if (!hwtemps[j])
-							break;
-					}
-					ta[orig].Allocated = 1;
-					ta[orig].HwTemp = j;
-					hwtemps[ta[orig].HwTemp] = 1;
-				}
-
-				inst->U.I.DstReg.Index = ta[orig].HwTemp;
+				inst->U.I.DstReg.Index = get_reg(c, ta, hwtemps, orig);
 			}
 		}
 	}
@@ -695,10 +703,10 @@ static int transform_nonnative_modifiers(
 			new_inst->U.I.SrcReg[1] = inst->U.I.SrcReg[i];
 			new_inst->U.I.SrcReg[1].Negate ^= RC_MASK_XYZW;
 
-			memset(&inst->U.I.SrcReg[i], 0, sizeof(inst->U.I.SrcReg[i]));
 			inst->U.I.SrcReg[i].File = RC_FILE_TEMPORARY;
 			inst->U.I.SrcReg[i].Index = temp;
 			inst->U.I.SrcReg[i].Swizzle = RC_SWIZZLE_XYZW;
+			inst->U.I.SrcReg[i].RelAddr = 0;
 		}
 	}
 	return 1;
@@ -724,10 +732,13 @@ static int transform_source_conflicts(
 			inst_mov->U.I.DstReg.File = RC_FILE_TEMPORARY;
 			inst_mov->U.I.DstReg.Index = tmpreg;
 			inst_mov->U.I.SrcReg[0] = inst->U.I.SrcReg[2];
+			inst_mov->U.I.SrcReg[0].Swizzle = RC_SWIZZLE_XYZW;
+			inst_mov->U.I.SrcReg[0].Negate = 0;
+			inst_mov->U.I.SrcReg[0].Abs = 0;
 
-			reset_srcreg(&inst->U.I.SrcReg[2]);
 			inst->U.I.SrcReg[2].File = RC_FILE_TEMPORARY;
 			inst->U.I.SrcReg[2].Index = tmpreg;
+			inst->U.I.SrcReg[2].RelAddr = false;
 		}
 	}
 
@@ -739,10 +750,13 @@ static int transform_source_conflicts(
 			inst_mov->U.I.DstReg.File = RC_FILE_TEMPORARY;
 			inst_mov->U.I.DstReg.Index = tmpreg;
 			inst_mov->U.I.SrcReg[0] = inst->U.I.SrcReg[1];
+			inst_mov->U.I.SrcReg[0].Swizzle = RC_SWIZZLE_XYZW;
+			inst_mov->U.I.SrcReg[0].Negate = 0;
+			inst_mov->U.I.SrcReg[0].Abs = 0;
 
-			reset_srcreg(&inst->U.I.SrcReg[1]);
 			inst->U.I.SrcReg[1].File = RC_FILE_TEMPORARY;
 			inst->U.I.SrcReg[1].Index = tmpreg;
+			inst->U.I.SrcReg[1].RelAddr = false;
 		}
 	}
 
@@ -755,8 +769,8 @@ static void rc_vs_add_artificial_outputs(struct radeon_compiler *c, void *user)
 	int i;
 
 	for(i = 0; i < 32; ++i) {
-		if ((compiler->RequiredOutputs & (1 << i)) &&
-		    !(compiler->Base.Program.OutputsWritten & (1 << i))) {
+		if ((compiler->RequiredOutputs & (1U << i)) &&
+		    !(compiler->Base.Program.OutputsWritten & (1U << i))) {
 			struct rc_instruction * inst = rc_insert_new_instruction(&compiler->Base, compiler->Base.Program.Instructions.Prev);
 			inst->U.I.Opcode = RC_OPCODE_MOV;
 
@@ -768,7 +782,7 @@ static void rc_vs_add_artificial_outputs(struct radeon_compiler *c, void *user)
 			inst->U.I.SrcReg[0].Index = 0;
 			inst->U.I.SrcReg[0].Swizzle = RC_SWIZZLE_XYZW;
 
-			compiler->Base.Program.OutputsWritten |= 1 << i;
+			compiler->Base.Program.OutputsWritten |= 1U << i;
 		}
 	}
 }
@@ -780,7 +794,7 @@ static void dataflow_outputs_mark_used(void * userdata, void * data,
 	int i;
 
 	for(i = 0; i < 32; ++i) {
-		if (c->RequiredOutputs & (1 << i))
+		if (c->RequiredOutputs & (1U << i))
 			callback(data, i, RC_MASK_XYZW);
 	}
 }
@@ -864,7 +878,7 @@ static void rc_emulate_negative_addressing(struct radeon_compiler *compiler, voi
 		transform_negative_addressing(c, lastARL, inst, min_offset);
 }
 
-struct rc_swizzle_caps r300_vertprog_swizzle_caps = {
+const struct rc_swizzle_caps r300_vertprog_swizzle_caps = {
 	.IsNative = &swizzle_is_native,
 	.Split = 0 /* should never be called */
 };
diff --git a/lib/mesa/src/gallium/drivers/r300/compiler/r3xx_vertprog_dump.c b/lib/mesa/src/gallium/drivers/r300/compiler/r3xx_vertprog_dump.c
index 3cffe4458..dde74795b 100644
--- a/lib/mesa/src/gallium/drivers/r300/compiler/r3xx_vertprog_dump.c
+++ b/lib/mesa/src/gallium/drivers/r300/compiler/r3xx_vertprog_dump.c
@@ -26,7 +26,7 @@
 
 #include <stdio.h>
 
-static char* r300_vs_ve_ops[] = {
+static const char* r300_vs_ve_ops[] = {
 	/* R300 vector ops */
 	"                 VE_NO_OP",
 	"           VE_DOT_PRODUCT",
@@ -63,7 +63,7 @@ static char* r300_vs_ve_ops[] = {
 	"               (reserved)",
 };
 
-static char* r300_vs_me_ops[] = {
+static const char* r300_vs_me_ops[] = {
 	/* R300 math ops */
 	"                 ME_NO_OP",
 	"          ME_EXP_BASE2_DX",
@@ -101,14 +101,14 @@ static char* r300_vs_me_ops[] = {
 };
 
 /* XXX refactor to avoid clashing symbols */
-static char* r300_vs_src_debug[] = {
+static const char* r300_vs_src_debug[] = {
 	"t",
 	"i",
 	"c",
 	"a",
 };
 
-static char* r300_vs_dst_debug[] = {
+static const char* r300_vs_dst_debug[] = {
 	"t",
 	"a0",
 	"o",
@@ -119,7 +119,7 @@ static char* r300_vs_dst_debug[] = {
 	"u",
 };
 
-static char* r300_vs_swiz_debug[] = {
+static const char* r300_vs_swiz_debug[] = {
 	"X",
 	"Y",
 	"Z",
diff --git a/lib/mesa/src/gallium/drivers/r300/compiler/r500_fragprog.c b/lib/mesa/src/gallium/drivers/r300/compiler/r500_fragprog.c
index 8198ff2a3..8a110f091 100644
--- a/lib/mesa/src/gallium/drivers/r300/compiler/r500_fragprog.c
+++ b/lib/mesa/src/gallium/drivers/r300/compiler/r500_fragprog.c
@@ -44,16 +44,15 @@ int r500_transform_IF(
 	struct rc_instruction * inst_if,
 	void *data)
 {
+	if (inst_if->U.I.Opcode != RC_OPCODE_IF)
+		return 0;
+
 	struct rc_variable * writer;
 	struct rc_list * writer_list, * list_ptr;
 	struct rc_list * var_list = rc_get_variables(c);
 	unsigned int generic_if = 0;
 	unsigned int alu_chan;
 
-	if (inst_if->U.I.Opcode != RC_OPCODE_IF) {
-		return 0;
-	}
-
 	writer_list = rc_variable_list_get_writers(
 			var_list, inst_if->Type, &inst_if->U.I.SrcReg[0]);
 	if (!writer_list) {
@@ -220,8 +219,6 @@ static int r500_swizzle_is_native(rc_opcode opcode, struct rc_src_register reg)
 			return 1;
 
 		return 0;
-	} else if (reg.File == RC_FILE_INLINE) {
-		return 1;
 	} else {
 		/* ALU instructions support almost everything */
 		relevant = 0;
@@ -266,7 +263,7 @@ static void r500_swizzle_split(struct rc_src_register src, unsigned int usemask,
 	}
 }
 
-struct rc_swizzle_caps r500_swizzle_caps = {
+const struct rc_swizzle_caps r500_swizzle_caps = {
 	.IsNative = r500_swizzle_is_native,
 	.Split = r500_swizzle_split
 };
diff --git a/lib/mesa/src/gallium/drivers/r300/compiler/r500_fragprog.h b/lib/mesa/src/gallium/drivers/r300/compiler/r500_fragprog.h
index 6aa448cc6..1c30dc0e8 100644
--- a/lib/mesa/src/gallium/drivers/r300/compiler/r500_fragprog.h
+++ b/lib/mesa/src/gallium/drivers/r300/compiler/r500_fragprog.h
@@ -40,7 +40,7 @@ extern void r500BuildFragmentProgramHwCode(struct radeon_compiler *c, void *user
 
 extern void r500FragmentProgramDump(struct radeon_compiler *c, void *user);
 
-extern struct rc_swizzle_caps r500_swizzle_caps;
+extern const struct rc_swizzle_caps r500_swizzle_caps;
 
 extern int r500_transform_IF(
 	struct radeon_compiler * c,
diff --git a/lib/mesa/src/gallium/drivers/r300/compiler/radeon_compiler.c b/lib/mesa/src/gallium/drivers/r300/compiler/radeon_compiler.c
index 081cd2d0d..78902d980 100644
--- a/lib/mesa/src/gallium/drivers/r300/compiler/radeon_compiler.c
+++ b/lib/mesa/src/gallium/drivers/r300/compiler/radeon_compiler.c
@@ -123,12 +123,12 @@ void rc_calculate_inputs_outputs(struct radeon_compiler * c)
 
 		for (i = 0; i < opcode->NumSrcRegs; ++i) {
 			if (inst->U.I.SrcReg[i].File == RC_FILE_INPUT)
-				c->Program.InputsRead |= 1 << inst->U.I.SrcReg[i].Index;
+				c->Program.InputsRead |= 1U << inst->U.I.SrcReg[i].Index;
 		}
 
 		if (opcode->HasDstReg) {
 			if (inst->U.I.DstReg.File == RC_FILE_OUTPUT)
-				c->Program.OutputsWritten |= 1 << inst->U.I.DstReg.Index;
+				c->Program.OutputsWritten |= 1U << inst->U.I.DstReg.Index;
 		}
 	}
 }
@@ -141,7 +141,7 @@ void rc_move_input(struct radeon_compiler * c, unsigned input, struct rc_src_reg
 {
 	struct rc_instruction * inst;
 
-	c->Program.InputsRead &= ~(1 << input);
+	c->Program.InputsRead &= ~(1U << input);
 
 	for(inst = c->Program.Instructions.Next; inst != &c->Program.Instructions; inst = inst->Next) {
 		const struct rc_opcode_info * opcode = rc_get_opcode_info(inst->U.I.Opcode);
@@ -157,7 +157,7 @@ void rc_move_input(struct radeon_compiler * c, unsigned input, struct rc_src_reg
 					inst->U.I.SrcReg[i].Abs = new_input.Abs;
 				}
 
-				c->Program.InputsRead |= 1 << new_input.Index;
+				c->Program.InputsRead |= 1U << new_input.Index;
 			}
 		}
 	}
@@ -173,7 +173,7 @@ void rc_move_output(struct radeon_compiler * c, unsigned output, unsigned new_ou
 {
 	struct rc_instruction * inst;
 
-	c->Program.OutputsWritten &= ~(1 << output);
+	c->Program.OutputsWritten &= ~(1U << output);
 
 	for(inst = c->Program.Instructions.Next; inst != &c->Program.Instructions; inst = inst->Next) {
 		const struct rc_opcode_info * opcode = rc_get_opcode_info(inst->U.I.Opcode);
@@ -183,7 +183,7 @@ void rc_move_output(struct radeon_compiler * c, unsigned output, unsigned new_ou
 				inst->U.I.DstReg.Index = new_output;
 				inst->U.I.DstReg.WriteMask &= writemask;
 
-				c->Program.OutputsWritten |= 1 << new_output;
+				c->Program.OutputsWritten |= 1U << new_output;
 			}
 		}
 	}
@@ -227,7 +227,7 @@ void rc_copy_output(struct radeon_compiler * c, unsigned output, unsigned dup_ou
 	inst->U.I.SrcReg[0].Index = tempreg;
 	inst->U.I.SrcReg[0].Swizzle = RC_SWIZZLE_XYZW;
 
-	c->Program.OutputsWritten |= 1 << dup_output;
+	c->Program.OutputsWritten |= 1U << dup_output;
 }
 
 
@@ -243,8 +243,8 @@ void rc_transform_fragment_wpos(struct radeon_compiler * c, unsigned wpos, unsig
 	struct rc_instruction * inst_mad;
 	struct rc_instruction * inst;
 
-	c->Program.InputsRead &= ~(1 << wpos);
-	c->Program.InputsRead |= 1 << new_input;
+	c->Program.InputsRead &= ~(1U << wpos);
+	c->Program.InputsRead |= 1U << new_input;
 
 	/* perspective divide */
 	inst_rcp = rc_insert_new_instruction(c, &c->Program.Instructions);
diff --git a/lib/mesa/src/gallium/drivers/r300/compiler/radeon_compiler.h b/lib/mesa/src/gallium/drivers/r300/compiler/radeon_compiler.h
index 9dc6855be..7089bcbea 100644
--- a/lib/mesa/src/gallium/drivers/r300/compiler/radeon_compiler.h
+++ b/lib/mesa/src/gallium/drivers/r300/compiler/radeon_compiler.h
@@ -68,7 +68,7 @@ struct radeon_compiler {
 	 * of the compiler
 	 */
 	/*@{*/
-	struct rc_swizzle_caps * SwizzleCaps;
+	const struct rc_swizzle_caps * SwizzleCaps;
 	/*@}*/
 
 	struct emulate_loop_state loop_state;
diff --git a/lib/mesa/src/gallium/drivers/r300/compiler/radeon_dataflow_deadcode.c b/lib/mesa/src/gallium/drivers/r300/compiler/radeon_dataflow_deadcode.c
index 678e14758..708e3e96d 100644
--- a/lib/mesa/src/gallium/drivers/r300/compiler/radeon_dataflow_deadcode.c
+++ b/lib/mesa/src/gallium/drivers/r300/compiler/radeon_dataflow_deadcode.c
@@ -253,8 +253,13 @@ void rc_dataflow_deadcode(struct radeon_compiler * c, void *user)
 				if(opcode->HasDstReg){
 					int src = 0;
 					unsigned int srcmasks[3];
-					rc_compute_sources_for_writemask(ptr,
-						ptr->U.I.DstReg.WriteMask, srcmasks);
+					unsigned int writemask = ptr->U.I.DstReg.WriteMask;
+					if (ptr->U.I.WriteALUResult == RC_ALURESULT_X)
+						writemask |= RC_MASK_X;
+					else if (ptr->U.I.WriteALUResult == RC_ALURESULT_W)
+						writemask |= RC_MASK_W;
+
+					rc_compute_sources_for_writemask(ptr, writemask, srcmasks);
 					for(src=0; src < opcode->NumSrcRegs; src++){
 						mark_used(&s,
 							ptr->U.I.SrcReg[src].File,
diff --git a/lib/mesa/src/gallium/drivers/r300/compiler/radeon_emulate_loops.c b/lib/mesa/src/gallium/drivers/r300/compiler/radeon_emulate_loops.c
index a7f773c26..ef627b95c 100644
--- a/lib/mesa/src/gallium/drivers/r300/compiler/radeon_emulate_loops.c
+++ b/lib/mesa/src/gallium/drivers/r300/compiler/radeon_emulate_loops.c
@@ -499,22 +499,6 @@ void rc_transform_loops(struct radeon_compiler *c, void *user)
 	}
 }
 
-void rc_unroll_loops(struct radeon_compiler *c, void *user)
-{
-	struct rc_instruction * inst;
-	struct loop_info loop;
-
-	for(inst = c->Program.Instructions.Next;
-			inst != &c->Program.Instructions; inst = inst->Next) {
-
-		if (inst->U.I.Opcode == RC_OPCODE_BGNLOOP) {
-			if (build_loop_info(c, &loop, inst)) {
-				try_unroll_loop(c, &loop);
-			}
-		}
-	}
-}
-
 void rc_emulate_loops(struct radeon_compiler *c, void *user)
 {
 	struct emulate_loop_state * s = &c->loop_state;
diff --git a/lib/mesa/src/gallium/drivers/r300/compiler/radeon_emulate_loops.h b/lib/mesa/src/gallium/drivers/r300/compiler/radeon_emulate_loops.h
index 01f02a612..cf0d63b45 100644
--- a/lib/mesa/src/gallium/drivers/r300/compiler/radeon_emulate_loops.h
+++ b/lib/mesa/src/gallium/drivers/r300/compiler/radeon_emulate_loops.h
@@ -50,8 +50,6 @@ struct emulate_loop_state {
 
 void rc_transform_loops(struct radeon_compiler *c, void *user);
 
-void rc_unroll_loops(struct radeon_compiler * c, void *user);
-
 void rc_emulate_loops(struct radeon_compiler * c, void *user);
 
 #endif /* RADEON_EMULATE_LOOPS_H */
diff --git a/lib/mesa/src/gallium/drivers/r300/compiler/radeon_opcodes.c b/lib/mesa/src/gallium/drivers/r300/compiler/radeon_opcodes.c
index 10033e028..3e08a0949 100644
--- a/lib/mesa/src/gallium/drivers/r300/compiler/radeon_opcodes.c
+++ b/lib/mesa/src/gallium/drivers/r300/compiler/radeon_opcodes.c
@@ -32,7 +32,7 @@
 
 #include "util/compiler.h"
 
-struct rc_opcode_info rc_opcodes[MAX_RC_OPCODE] = {
+const struct rc_opcode_info rc_opcodes[MAX_RC_OPCODE] = {
 	{
 		.Opcode = RC_OPCODE_NOP,
 		.Name = "NOP"
diff --git a/lib/mesa/src/gallium/drivers/r300/compiler/radeon_opcodes.h b/lib/mesa/src/gallium/drivers/r300/compiler/radeon_opcodes.h
index 1c4250507..3f695ff48 100644
--- a/lib/mesa/src/gallium/drivers/r300/compiler/radeon_opcodes.h
+++ b/lib/mesa/src/gallium/drivers/r300/compiler/radeon_opcodes.h
@@ -268,7 +268,7 @@ struct rc_opcode_info {
 	unsigned int IsStandardScalar:1;
 };
 
-extern struct rc_opcode_info rc_opcodes[MAX_RC_OPCODE];
+extern const struct rc_opcode_info rc_opcodes[MAX_RC_OPCODE];
 
 static inline const struct rc_opcode_info * rc_get_opcode_info(rc_opcode opcode)
 {
diff --git a/lib/mesa/src/gallium/drivers/r300/compiler/radeon_optimize.c b/lib/mesa/src/gallium/drivers/r300/compiler/radeon_optimize.c
index 5e3503b21..b248ce0c6 100644
--- a/lib/mesa/src/gallium/drivers/r300/compiler/radeon_optimize.c
+++ b/lib/mesa/src/gallium/drivers/r300/compiler/radeon_optimize.c
@@ -26,6 +26,8 @@
  *
  */
 
+#include "util/u_math.h"
+
 #include "radeon_dataflow.h"
 
 #include "radeon_compiler.h"
@@ -653,11 +655,12 @@ static int peephole_add_presub_inv(
 	/* XXX It would be nice to use is_src_uniform_constant here, but that
 	 * function only works if the register's file is RC_FILE_NONE */
 	for(i = 0; i < 4; i++ ) {
+		if (!(inst_add->U.I.DstReg.WriteMask & (1 << i)))
+			continue;
+
 		swz = GET_SWZ(inst_add->U.I.SrcReg[0].Swizzle, i);
-		if(((1 << i) & inst_add->U.I.DstReg.WriteMask)
-						&& swz != RC_SWIZZLE_ONE) {
+		if (swz != RC_SWIZZLE_ONE || inst_add->U.I.SrcReg[0].Negate & (1 << i))
 			return 0;
-		}
 	}
 
 	/* Check src1. */
@@ -832,8 +835,15 @@ static int peephole_mul_omod(
 		return 0;
 	}
 
-	/* Rewrite the instructions */
 	writemask_sum = rc_variable_writemask_sum(writer_list->Item);
+
+	/* rc_normal_rewrite_writemask can't expand a previous writemask to store
+	 * more channels replicated.
+	 */
+	if (util_bitcount(writemask_sum) < util_bitcount(inst_mul->U.I.DstReg.WriteMask))
+		return 0;
+
+	/* Rewrite the instructions */
 	for (var = writer_list->Item; var; var = var->Friend) {
 		struct rc_variable * writer = var;
 		unsigned conversion_swizzle = rc_make_conversion_swizzle(
diff --git a/lib/mesa/src/gallium/drivers/r300/compiler/radeon_pair_regalloc.c b/lib/mesa/src/gallium/drivers/r300/compiler/radeon_pair_regalloc.c
index e8f4087cb..d3a589c98 100644
--- a/lib/mesa/src/gallium/drivers/r300/compiler/radeon_pair_regalloc.c
+++ b/lib/mesa/src/gallium/drivers/r300/compiler/radeon_pair_regalloc.c
@@ -516,7 +516,7 @@ static void do_advanced_regalloc(struct regalloc_state * s)
 {
 
 	unsigned int i, input_node, node_count, node_index;
-	unsigned int * node_classes;
+	struct ra_class ** node_classes;
 	struct rc_instruction * inst;
 	struct rc_list * var_ptr;
 	struct rc_list * variables;
@@ -527,7 +527,7 @@ static void do_advanced_regalloc(struct regalloc_state * s)
 	variables = rc_get_variables(s->C);
 	node_count = rc_list_count(variables);
 	node_classes = memory_pool_malloc(&s->C->Pool,
-			node_count * sizeof(unsigned int));
+			node_count * sizeof(struct ra_class *));
 
 	for (var_ptr = variables, node_index = 0; var_ptr;
 					var_ptr = var_ptr->Next, node_index++) {
@@ -536,7 +536,7 @@ static void do_advanced_regalloc(struct regalloc_state * s)
 		rc_variable_compute_live_intervals(var_ptr->Item);
 
 		class_index = variable_get_class(var_ptr->Item,	rc_class_list);
-		node_classes[node_index] = ra_state->class_ids[class_index];
+		node_classes[node_index] = ra_state->classes[class_index];
 	}
 
 
@@ -699,15 +699,14 @@ void rc_init_regalloc_state(struct rc_regalloc_state *s)
 	/* Create the register classes */
 	for (i = 0; i < RC_REG_CLASS_COUNT; i++) {
 		const struct rc_class *class = &rc_class_list[i];
-		s->class_ids[class->ID] = ra_alloc_reg_class(s->regs);
+		s->classes[class->ID] = ra_alloc_reg_class(s->regs);
 
 		/* Assign registers to the classes */
 		for (index = 0; index < R500_PFS_NUM_TEMP_REGS; index++) {
 			for (j = 0; j < class->WritemaskCount; j++) {
 				int reg_id = get_reg_id(index,
 						class->Writemasks[j]);
-				ra_class_add_reg(s->regs,
-					s->class_ids[class->ID], reg_id);
+				ra_class_add_reg(s->classes[class->ID], reg_id);
 			}
 		}
 	}
@@ -722,8 +721,7 @@ void rc_init_regalloc_state(struct rc_regalloc_state *s)
 	for (i = 0; i < RC_REG_CLASS_COUNT; i++) {
 		ra_q_values[i] = MALLOC(RC_REG_CLASS_COUNT * sizeof(unsigned));
 		for (j = 0; j < RC_REG_CLASS_COUNT; j++) {
-			ra_q_values[s->class_ids[i]][s->class_ids[j]] =
-							q_values[i][j];
+			ra_q_values[i][j] = q_values[i][j];
 		}
 	}
 
diff --git a/lib/mesa/src/gallium/drivers/r300/compiler/radeon_program_alu.c b/lib/mesa/src/gallium/drivers/r300/compiler/radeon_program_alu.c
index c8aabc255..a2416c550 100644
--- a/lib/mesa/src/gallium/drivers/r300/compiler/radeon_program_alu.c
+++ b/lib/mesa/src/gallium/drivers/r300/compiler/radeon_program_alu.c
@@ -858,7 +858,7 @@ static void transform_r300_vertex_SSG(struct radeon_compiler* c,
 	 *   SLT tmp1, x, 0;
 	 *   ADD result, tmp0, -tmp1;
 	 */
-	struct rc_dst_register dst0 = try_to_reuse_dst(c, inst);
+	struct rc_dst_register dst0;
 	unsigned tmp1;
 
 	/* 0 < x */
@@ -1215,12 +1215,6 @@ int radeonTransformDeriv(struct radeon_compiler* c,
  *
  * === OR ===
  *
- * IF Temp[0].x -\
- * KILL         - > KIL -abs(Temp[0].x)
- * ENDIF        -/
- *
- * === OR ===
- *
  * IF Temp[0].x -> IF Temp[0].x
  * ...          -> ...
  * ELSE         -> ELSE
@@ -1265,21 +1259,6 @@ void rc_transform_KILL(struct radeon_compiler * c, void *user)
 			 * block, because -0.0 is considered negative. */
 			inst->U.I.SrcReg[0] =
 				negate(absolute(if_inst->U.I.SrcReg[0]));
-
-			if (inst->Prev->U.I.Opcode != RC_OPCODE_IF
-				&& inst->Next->U.I.Opcode != RC_OPCODE_ENDIF) {
-
-				/* Optimize the special case:
-				 * IF Temp[0].x
-				 * KILP
-				 * ENDIF
-				 */
-
-				/* Remove IF */
-				rc_remove_instruction(inst->Prev);
-				/* Remove ENDIF */
-				rc_remove_instruction(inst->Next);
-			}
 		}
 	}
 }
diff --git a/lib/mesa/src/gallium/drivers/r300/compiler/radeon_program_tex.c b/lib/mesa/src/gallium/drivers/r300/compiler/radeon_program_tex.c
index 17d6ee9ae..a7b3ad748 100644
--- a/lib/mesa/src/gallium/drivers/r300/compiler/radeon_program_tex.c
+++ b/lib/mesa/src/gallium/drivers/r300/compiler/radeon_program_tex.c
@@ -140,7 +140,7 @@ int radeonTransformTEX(
 
 	/* ARB_shadow & EXT_shadow_funcs */
 	if (inst->U.I.Opcode != RC_OPCODE_KIL &&
-		((c->Program.ShadowSamplers & (1 << inst->U.I.TexSrcUnit)) ||
+		((c->Program.ShadowSamplers & (1U << inst->U.I.TexSrcUnit)) ||
 		 (compiler->state.unit[inst->U.I.TexSrcUnit].compare_mode_enabled))) {
 		rc_compare_func comparefunc = compiler->state.unit[inst->U.I.TexSrcUnit].texture_compare_func;
 
diff --git a/lib/mesa/src/gallium/drivers/r300/compiler/radeon_regalloc.h b/lib/mesa/src/gallium/drivers/r300/compiler/radeon_regalloc.h
index 260a3caf9..6f12289e2 100644
--- a/lib/mesa/src/gallium/drivers/r300/compiler/radeon_regalloc.h
+++ b/lib/mesa/src/gallium/drivers/r300/compiler/radeon_regalloc.h
@@ -53,7 +53,7 @@ enum rc_reg_class {
 
 struct rc_regalloc_state {
 	struct ra_regs *regs;
-	unsigned class_ids[RC_REG_CLASS_COUNT];
+	struct ra_class *classes[RC_REG_CLASS_COUNT];
 };
 
 void rc_init_regalloc_state(struct rc_regalloc_state *s);
diff --git a/lib/mesa/src/gallium/drivers/r300/compiler/radeon_swizzle.h b/lib/mesa/src/gallium/drivers/r300/compiler/radeon_swizzle.h
index 9a048e4ea..f7a9baae1 100644
--- a/lib/mesa/src/gallium/drivers/r300/compiler/radeon_swizzle.h
+++ b/lib/mesa/src/gallium/drivers/r300/compiler/radeon_swizzle.h
@@ -54,6 +54,6 @@ struct rc_swizzle_caps {
 	void (*Split)(struct rc_src_register reg, unsigned int mask, struct rc_swizzle_split * split);
 };
 
-extern struct rc_swizzle_caps r300_vertprog_swizzle_caps;
+extern const struct rc_swizzle_caps r300_vertprog_swizzle_caps;
 
 #endif /* RADEON_SWIZZLE_H */
diff --git a/lib/mesa/src/gallium/drivers/r300/compiler/radeon_vert_fc.c b/lib/mesa/src/gallium/drivers/r300/compiler/radeon_vert_fc.c
index fded485aa..51ab6213f 100644
--- a/lib/mesa/src/gallium/drivers/r300/compiler/radeon_vert_fc.c
+++ b/lib/mesa/src/gallium/drivers/r300/compiler/radeon_vert_fc.c
@@ -257,10 +257,10 @@ void rc_vert_fc(struct radeon_compiler *c, void *user)
 			if (fc_state.BranchDepth != 0
 					|| fc_state.LoopDepth != 1) {
 				lower_endloop(inst, &fc_state);
+				/* Skip the new PRED_RESTORE */
+				inst = inst->Next;
 			}
 			fc_state.LoopDepth--;
-			/* Skip PRED_RESTORE */
-			inst = inst->Next;
 			break;
 		case RC_OPCODE_IF:
 			lower_if(inst, &fc_state);
diff --git a/lib/mesa/src/gallium/drivers/r300/r300_fs.c b/lib/mesa/src/gallium/drivers/r300/r300_fs.c
index ffb041e24..99d9aba76 100644
--- a/lib/mesa/src/gallium/drivers/r300/r300_fs.c
+++ b/lib/mesa/src/gallium/drivers/r300/r300_fs.c
@@ -199,7 +199,7 @@ static void get_external_state(
                 state->unit[i].wrap_mode = RC_WRAP_NONE;
             }
 
-            if (t->b.b.target == PIPE_TEXTURE_3D)
+            if (t->b.target == PIPE_TEXTURE_3D)
                 state->unit[i].clamp_and_scale_before_fetch = TRUE;
         }
     }
diff --git a/lib/mesa/src/gallium/drivers/r300/r300_reg.h b/lib/mesa/src/gallium/drivers/r300/r300_reg.h
index 05d85cf47..56be6d690 100644
--- a/lib/mesa/src/gallium/drivers/r300/r300_reg.h
+++ b/lib/mesa/src/gallium/drivers/r300/r300_reg.h
@@ -305,7 +305,7 @@ USE OR OTHER DEALINGS IN THE SOFTWARE.
 #define R300_VAP_PSC_SGN_NORM_CNTL                0x21dc
 #   define SGN_NORM_ZERO                                    0
 #   define SGN_NORM_ZERO_CLAMP_MINUS_ONE                    1
-#   define SGN_NORM_NO_ZERO                                 2
+#   define SGN_NORM_NO_ZERO                                 2U
 #   define R300_SGN_NORM_NO_ZERO (SGN_NORM_NO_ZERO | \
         (SGN_NORM_NO_ZERO << 2) | (SGN_NORM_NO_ZERO << 4) | \
         (SGN_NORM_NO_ZERO << 6) | (SGN_NORM_NO_ZERO << 8) | \
@@ -822,8 +822,8 @@ USE OR OTHER DEALINGS IN THE SOFTWARE.
 #	define R500_RS_COL_PTR(x)		        ((x) << 24)
 #       define R500_RS_COL_FMT(x)                       ((x) << 27)
 /* gap */
-#define R500_RS_IP_OFFSET_DIS 				(0 << 31)
-#define R500_RS_IP_OFFSET_EN 				(1 << 31)
+#define R500_RS_IP_OFFSET_DIS 				(0U << 31)
+#define R500_RS_IP_OFFSET_EN 				(1U << 31)
 
 /* gap */
 
@@ -2078,7 +2078,7 @@ USE OR OTHER DEALINGS IN THE SOFTWARE.
 #       define R300_ALU_OUTC_MOD_DIV8           (6 << R300_ALU_OUTC_MOD_SHIFT)
 
 #       define R300_ALU_OUTC_CLAMP              (1 << 30)
-#       define R300_ALU_INSERT_NOP              (1 << 31)
+#       define R300_ALU_INSERT_NOP              (1U << 31)
 
 #define R300_US_ALU_ALPHA_INST_0                 0x49C0
 #       define R300_ALU_ARGA_SRC0C_X            0
@@ -2311,7 +2311,7 @@ USE OR OTHER DEALINGS IN THE SOFTWARE.
 #       define R300_DISCARD_SRC_PIXELS_SRC_COLOR_1     (5 << 3)
 #       define R300_DISCARD_SRC_PIXELS_SRC_ALPHA_COLOR_1     (6 << 3)
 #       define R500_SRC_ALPHA_0_NO_READ                (1 << 30)
-#       define R500_SRC_ALPHA_1_NO_READ                (1 << 31)
+#       define R500_SRC_ALPHA_1_NO_READ                (1U << 31)
 
 /* the following are shared between CBLEND and ABLEND */
 #       define R300_FCN_MASK                         (3  << 12)
@@ -2666,8 +2666,8 @@ USE OR OTHER DEALINGS IN THE SOFTWARE.
 #	define R500_CONTIGUOUS_6XAA_SAMPLES_DISABLE          (1 << 17)
 #	define R500_PEQ_PACKING_DISABLE                      (0 << 18)
 #	define R500_PEQ_PACKING_ENABLE                       (1 << 18)
-#	define R500_COVERED_PTR_MASKING_DISABLE              (0 << 18)
-#	define R500_COVERED_PTR_MASKING_ENABLE               (1 << 18)
+#	define R500_COVERED_PTR_MASKING_DISABLE              (0 << 19)
+#	define R500_COVERED_PTR_MASKING_ENABLE               (1 << 19)
 
 
 /* gap */
@@ -3310,7 +3310,7 @@ enum {
 #   define R500_FC_KBOOL(x)				(x)
 #define R500_US_FC_CTRL					0x4624
 #   define R500_FC_TEST_EN				(1 << 30)
-#   define R500_FC_FULL_FC_EN				(1 << 31)
+#   define R500_FC_FULL_FC_EN				(1U << 31)
 #define R500_US_FC_INST_0				0x9800
 #   define R500_FC_OP_JUMP				(0 << 0)
 #   define R500_FC_OP_LOOP				(1 << 0)
@@ -3489,7 +3489,7 @@ enum {
 #define R300_PACKET3_INDX_BUFFER            0x00003300
 #    define R300_INDX_BUFFER_DST_SHIFT          0
 #    define R300_INDX_BUFFER_SKIP_SHIFT         16
-#    define R300_INDX_BUFFER_ONE_REG_WR		(1<<31)
+#    define R300_INDX_BUFFER_ONE_REG_WR		(1U << 31)
 
 /* Same as R300_PACKET3_3D_DRAW_VBUF but without VAP_VTX_FMT */
 #define R300_PACKET3_3D_DRAW_VBUF_2         0x00003400
diff --git a/lib/mesa/src/gallium/drivers/r300/r300_render_stencilref.c b/lib/mesa/src/gallium/drivers/r300/r300_render_stencilref.c
index 5135ce776..87d944d2e 100644
--- a/lib/mesa/src/gallium/drivers/r300/r300_render_stencilref.c
+++ b/lib/mesa/src/gallium/drivers/r300/r300_render_stencilref.c
@@ -36,8 +36,9 @@
 struct r300_stencilref_context {
     void (*draw_vbo)(struct pipe_context *pipe,
                      const struct pipe_draw_info *info,
+                     unsigned drawid_offset,
                      const struct pipe_draw_indirect_info *indirect,
-                     const struct pipe_draw_start_count *draws,
+                     const struct pipe_draw_start_count_bias *draws,
                      unsigned num_draws);
 
     uint32_t rs_cull_mode;
@@ -105,20 +106,21 @@ static void r300_stencilref_end(struct r300_context *r300)
 
 static void r300_stencilref_draw_vbo(struct pipe_context *pipe,
                                      const struct pipe_draw_info *info,
+                                     unsigned drawid_offset,
                                      const struct pipe_draw_indirect_info *indirect,
-                                     const struct pipe_draw_start_count *draws,
+                                     const struct pipe_draw_start_count_bias *draws,
                                      unsigned num_draws)
 {
     struct r300_context *r300 = r300_context(pipe);
     struct r300_stencilref_context *sr = r300->stencilref_fallback;
 
     if (!r300_stencilref_needed(r300)) {
-        sr->draw_vbo(pipe, info, NULL, draws, num_draws);
+        sr->draw_vbo(pipe, info, drawid_offset, NULL, draws, num_draws);
     } else {
         r300_stencilref_begin(r300);
-        sr->draw_vbo(pipe, info, NULL, draws, num_draws);
+        sr->draw_vbo(pipe, info, drawid_offset, NULL, draws, num_draws);
         r300_stencilref_switch_side(r300);
-        sr->draw_vbo(pipe, info, NULL, draws, num_draws);
+        sr->draw_vbo(pipe, info, drawid_offset, NULL, draws, num_draws);
         r300_stencilref_end(r300);
     }
 }
diff --git a/lib/mesa/src/gallium/drivers/r300/r300_resource.c b/lib/mesa/src/gallium/drivers/r300/r300_resource.c
index 3da5fefef..aa9018f5c 100644
--- a/lib/mesa/src/gallium/drivers/r300/r300_resource.c
+++ b/lib/mesa/src/gallium/drivers/r300/r300_resource.c
@@ -25,6 +25,7 @@
 
 #include "r300_context.h"
 #include "r300_texture.h"
+#include "r300_transfer.h"
 #include "r300_screen_buffer.h"
 
 static struct pipe_resource *
@@ -40,9 +41,11 @@ r300_resource_create(struct pipe_screen *screen,
 
 void r300_init_resource_functions(struct r300_context *r300)
 {
-   r300->context.transfer_map = u_transfer_map_vtbl;
+   r300->context.buffer_map = r300_buffer_transfer_map;
+   r300->context.texture_map = r300_texture_transfer_map;
    r300->context.transfer_flush_region = u_default_transfer_flush_region;
-   r300->context.transfer_unmap = u_transfer_unmap_vtbl;
+   r300->context.buffer_unmap = r300_buffer_transfer_unmap;
+   r300->context.texture_unmap = r300_texture_transfer_unmap;
    r300->context.buffer_subdata = u_default_buffer_subdata;
    r300->context.texture_subdata = u_default_texture_subdata;
    r300->context.create_surface = r300_create_surface;
@@ -54,5 +57,5 @@ void r300_init_screen_resource_functions(struct r300_screen *r300screen)
    r300screen->screen.resource_create = r300_resource_create;
    r300screen->screen.resource_from_handle = r300_texture_from_handle;
    r300screen->screen.resource_get_handle = r300_resource_get_handle;
-   r300screen->screen.resource_destroy = u_resource_destroy_vtbl;
+   r300screen->screen.resource_destroy = r300_resource_destroy;
 }
diff --git a/lib/mesa/src/gallium/drivers/r300/r300_screen_buffer.h b/lib/mesa/src/gallium/drivers/r300/r300_screen_buffer.h
index 14b849c8c..da37d34ce 100644
--- a/lib/mesa/src/gallium/drivers/r300/r300_screen_buffer.h
+++ b/lib/mesa/src/gallium/drivers/r300/r300_screen_buffer.h
@@ -41,6 +41,9 @@ void r300_upload_index_buffer(struct r300_context *r300,
 			      unsigned index_size, unsigned *start,
 			      unsigned count, const uint8_t *ptr);
 
+void r300_resource_destroy(struct pipe_screen *screen,
+                           struct pipe_resource *buf);
+
 struct pipe_resource *r300_buffer_create(struct pipe_screen *screen,
 					 const struct pipe_resource *templ);
 
@@ -51,4 +54,15 @@ static inline struct r300_buffer *r300_buffer(struct pipe_resource *buffer)
     return (struct r300_buffer *)buffer;
 }
 
+void *
+r300_buffer_transfer_map( struct pipe_context *context,
+                          struct pipe_resource *resource,
+                          unsigned level,
+                          unsigned usage,
+                          const struct pipe_box *box,
+                          struct pipe_transfer **ptransfer );
+
+void r300_buffer_transfer_unmap( struct pipe_context *pipe,
+                                 struct pipe_transfer *transfer );
+
 #endif
diff --git a/lib/mesa/src/gallium/drivers/r300/r300_state_derived.c b/lib/mesa/src/gallium/drivers/r300/r300_state_derived.c
index b46d1937b..0e1ab4c94 100644
--- a/lib/mesa/src/gallium/drivers/r300/r300_state_derived.c
+++ b/lib/mesa/src/gallium/drivers/r300/r300_state_derived.c
@@ -102,7 +102,7 @@ static void r300_draw_emit_all_attribs(struct r300_context* r300)
     gen_count = 0;
     for (i = 0; i < ATTR_GENERIC_COUNT && gen_count < 8; i++) {
         if (vs_outputs->generic[i] != ATTR_UNUSED &&
-            !(r300->sprite_coord_enable & (1 << i))) {
+            !(r300->sprite_coord_enable & (1U << i))) {
             r300_draw_emit_attrib(r300, EMIT_4F, vs_outputs->generic[i]);
             gen_count++;
         }
@@ -168,7 +168,7 @@ static void r300_swtcl_vertex_psc(struct r300_context *r300)
         /* Add the attribute to the PSC table. */
         if (i & 1) {
             vstream->vap_prog_stream_cntl[i >> 1] |= type << 16;
-            vstream->vap_prog_stream_cntl_ext[i >> 1] |= swizzle << 16;
+            vstream->vap_prog_stream_cntl_ext[i >> 1] |= (uint32_t)swizzle << 16;
         } else {
             vstream->vap_prog_stream_cntl[i >> 1] |= type;
             vstream->vap_prog_stream_cntl_ext[i >> 1] |= swizzle;
@@ -441,7 +441,7 @@ static void r300_update_rs_block(struct r300_context *r300)
 	for (i = 0; i < ATTR_GENERIC_COUNT && col_count < 2; i++) {
 	    /* Cannot use color varyings for sprite coords. */
 	    if (fs_inputs->generic[i] != ATTR_UNUSED &&
-		(r300->sprite_coord_enable & (1 << i))) {
+		(r300->sprite_coord_enable & (1U << i))) {
 		break;
 	    }
 
@@ -807,7 +807,7 @@ static void r300_merge_textures_and_samplers(struct r300_context* r300)
 
     for (i = 0; i < count; i++) {
         if (state->sampler_views[i] && state->sampler_states[i]) {
-            state->tx_enable |= 1 << i;
+            state->tx_enable |= 1U << i;
 
             view = state->sampler_views[i];
             tex = r300_resource(view->base.texture);
@@ -828,7 +828,7 @@ static void r300_merge_textures_and_samplers(struct r300_context* r300)
             base_level = view->base.u.tex.first_level;
             min_level = sampler->min_lod;
             level_count = MIN3(sampler->max_lod,
-                               tex->b.b.last_level - base_level,
+                               tex->b.last_level - base_level,
                                view->base.u.tex.last_level - base_level);
 
             if (base_level + min_level) {
@@ -891,14 +891,14 @@ static void r300_merge_textures_and_samplers(struct r300_context* r300)
             }
 
             /* to emulate 1D textures through 2D ones correctly */
-            if (tex->b.b.target == PIPE_TEXTURE_1D) {
+            if (tex->b.target == PIPE_TEXTURE_1D) {
                 texstate->filter0 &= ~R300_TX_WRAP_T_MASK;
                 texstate->filter0 |= R300_TX_WRAP_T(R300_TX_CLAMP_TO_EDGE);
             }
 
             /* The hardware doesn't like CLAMP and CLAMP_TO_BORDER
              * for the 3rd coordinate if the texture isn't 3D. */
-            if (tex->b.b.target != PIPE_TEXTURE_3D) {
+            if (tex->b.target != PIPE_TEXTURE_3D) {
                 texstate->filter0 &= ~R300_TX_WRAP_R_MASK;
             }
 
@@ -973,7 +973,7 @@ static void r300_merge_textures_and_samplers(struct r300_context* r300)
                         (struct pipe_sampler_view**)&state->sampler_views[i],
                         &r300->texkill_sampler->base);
 
-                state->tx_enable |= 1 << i;
+                state->tx_enable |= 1U << i;
 
                 texstate = &state->regs[i];
 
diff --git a/lib/mesa/src/gallium/drivers/r300/r300_texture_desc.c b/lib/mesa/src/gallium/drivers/r300/r300_texture_desc.c
index face4a7d9..6d86b129a 100644
--- a/lib/mesa/src/gallium/drivers/r300/r300_texture_desc.c
+++ b/lib/mesa/src/gallium/drivers/r300/r300_texture_desc.c
@@ -87,11 +87,11 @@ static boolean r300_texture_macro_switch(struct r300_resource *tex,
 {
     unsigned tile, texdim;
 
-    if (tex->b.b.nr_samples > 1) {
+    if (tex->b.nr_samples > 1) {
         return TRUE;
     }
 
-    tile = r300_get_pixel_alignment(tex->b.b.format, tex->b.b.nr_samples,
+    tile = r300_get_pixel_alignment(tex->b.format, tex->b.nr_samples,
                                     tex->tex.microtile, RADEON_LAYOUT_TILED, dim, 0);
     if (dim == DIM_WIDTH) {
         texdim = u_minify(tex->tex.width0, level);
@@ -124,27 +124,27 @@ static unsigned r300_texture_get_stride(struct r300_screen *screen,
         return tex->tex.stride_in_bytes_override;
 
     /* Check the level. */
-    if (level > tex->b.b.last_level) {
+    if (level > tex->b.last_level) {
         SCREEN_DBG(screen, DBG_TEX, "%s: level (%u) > last_level (%u)\n",
-                   __FUNCTION__, level, tex->b.b.last_level);
+                   __FUNCTION__, level, tex->b.last_level);
         return 0;
     }
 
     width = u_minify(tex->tex.width0, level);
 
-    if (util_format_is_plain(tex->b.b.format)) {
-        tile_width = r300_get_pixel_alignment(tex->b.b.format,
-                                              tex->b.b.nr_samples,
+    if (util_format_is_plain(tex->b.format)) {
+        tile_width = r300_get_pixel_alignment(tex->b.format,
+                                              tex->b.nr_samples,
                                               tex->tex.microtile,
                                               tex->tex.macrotile[level],
                                               DIM_WIDTH, is_rs690);
         width = align(width, tile_width);
 
-        stride = util_format_get_stride(tex->b.b.format, width);
+        stride = util_format_get_stride(tex->b.format, width);
         /* The alignment to 32 bytes is sort of implied by the layout... */
         return stride;
     } else {
-        return align(util_format_get_stride(tex->b.b.format, width), is_rs690 ? 64 : 32);
+        return align(util_format_get_stride(tex->b.format, width), is_rs690 ? 64 : 32);
     }
 }
 
@@ -157,16 +157,16 @@ static unsigned r300_texture_get_nblocksy(struct r300_resource *tex,
     height = u_minify(tex->tex.height0, level);
 
     /* Mipmapped and 3D textures must have their height aligned to POT. */
-    if ((tex->b.b.target != PIPE_TEXTURE_1D &&
-         tex->b.b.target != PIPE_TEXTURE_2D &&
-         tex->b.b.target != PIPE_TEXTURE_RECT) ||
-        tex->b.b.last_level != 0) {
+    if ((tex->b.target != PIPE_TEXTURE_1D &&
+         tex->b.target != PIPE_TEXTURE_2D &&
+         tex->b.target != PIPE_TEXTURE_RECT) ||
+        tex->b.last_level != 0) {
         height = util_next_power_of_two(height);
     }
 
-    if (util_format_is_plain(tex->b.b.format)) {
-        tile_height = r300_get_pixel_alignment(tex->b.b.format,
-                                               tex->b.b.nr_samples,
+    if (util_format_is_plain(tex->b.format)) {
+        tile_height = r300_get_pixel_alignment(tex->b.format,
+                                               tex->b.nr_samples,
                                                tex->tex.microtile,
                                                tex->tex.macrotile[level],
                                                DIM_HEIGHT, 0);
@@ -183,10 +183,10 @@ static unsigned r300_texture_get_nblocksy(struct r300_resource *tex,
 
                 /* Align the height so that there is an even number of macrotiles.
                  * Do so for 3 or more macrotiles in the Y direction. */
-                if (level == 0 && tex->b.b.last_level == 0 &&
-                    (tex->b.b.target == PIPE_TEXTURE_1D ||
-                     tex->b.b.target == PIPE_TEXTURE_2D ||
-                     tex->b.b.target == PIPE_TEXTURE_RECT) &&
+                if (level == 0 && tex->b.last_level == 0 &&
+                    (tex->b.target == PIPE_TEXTURE_1D ||
+                     tex->b.target == PIPE_TEXTURE_2D ||
+                     tex->b.target == PIPE_TEXTURE_RECT) &&
                     height >= tile_height * 3) {
                     height = align(height, tile_height * 2);
                 }
@@ -198,7 +198,7 @@ static unsigned r300_texture_get_nblocksy(struct r300_resource *tex,
         }
     }
 
-    return util_format_get_nblocksy(tex->b.b.format, height);
+    return util_format_get_nblocksy(tex->b.format, height);
 }
 
 /* Get a width in pixels from a stride in bytes. */
@@ -213,7 +213,7 @@ static void r300_setup_miptree(struct r300_screen *screen,
                                struct r300_resource *tex,
                                boolean align_for_cbzb)
 {
-    struct pipe_resource *base = &tex->b.b;
+    struct pipe_resource *base = &tex->b;
     unsigned stride, size, layer_size, nblocksy, i;
     boolean rv350_mode = screen->caps.family >= CHIP_R350;
     boolean aligned_for_cbzb;
@@ -270,15 +270,15 @@ static void r300_setup_miptree(struct r300_screen *screen,
 static void r300_setup_flags(struct r300_resource *tex)
 {
     tex->tex.uses_stride_addressing =
-        !util_is_power_of_two_or_zero(tex->b.b.width0) ||
+        !util_is_power_of_two_or_zero(tex->b.width0) ||
         (tex->tex.stride_in_bytes_override &&
-         r300_stride_to_width(tex->b.b.format,
-                         tex->tex.stride_in_bytes_override) != tex->b.b.width0);
+         r300_stride_to_width(tex->b.format,
+                         tex->tex.stride_in_bytes_override) != tex->b.width0);
 
     tex->tex.is_npot =
         tex->tex.uses_stride_addressing ||
-        !util_is_power_of_two_or_zero(tex->b.b.height0) ||
-        !util_is_power_of_two_or_zero(tex->b.b.depth0);
+        !util_is_power_of_two_or_zero(tex->b.height0) ||
+        !util_is_power_of_two_or_zero(tex->b.depth0);
 }
 
 static void r300_setup_cbzb_flags(struct r300_screen *rscreen,
@@ -287,20 +287,20 @@ static void r300_setup_cbzb_flags(struct r300_screen *rscreen,
     unsigned i, bpp;
     boolean first_level_valid;
 
-    bpp = util_format_get_blocksizebits(tex->b.b.format);
+    bpp = util_format_get_blocksizebits(tex->b.format);
 
     /* 1) The texture must be point-sampled,
      * 2) The depth must be 16 or 32 bits.
      * 3) If the midpoint ZB offset is not aligned to 2048, it returns garbage
      *    with certain texture sizes. Macrotiling ensures the alignment. */
-    first_level_valid = tex->b.b.nr_samples <= 1 &&
+    first_level_valid = tex->b.nr_samples <= 1 &&
                        (bpp == 16 || bpp == 32) &&
                        tex->tex.macrotile[0];
 
     if (SCREEN_DBG_ON(rscreen, DBG_NO_CBZB))
         first_level_valid = FALSE;
 
-    for (i = 0; i <= tex->b.b.last_level; i++)
+    for (i = 0; i <= tex->b.last_level; i++)
         tex->tex.cbzb_allowed[i] = first_level_valid && tex->tex.macrotile[i];
 }
 
@@ -349,8 +349,8 @@ static void r300_setup_hyperz_properties(struct r300_screen *screen,
     static unsigned hiz_align_x[4] = {8, 32, 48, 32};
     static unsigned hiz_align_y[4] = {8, 8, 8, 32};
 
-    if (util_format_is_depth_or_stencil(tex->b.b.format) &&
-        util_format_get_blocksizebits(tex->b.b.format) == 32 &&
+    if (util_format_is_depth_or_stencil(tex->b.format) &&
+        util_format_get_blocksizebits(tex->b.format) == 32 &&
         tex->tex.microtile) {
         unsigned i, pipes;
 
@@ -360,18 +360,18 @@ static void r300_setup_hyperz_properties(struct r300_screen *screen,
             pipes = screen->info.r300_num_gb_pipes;
         }
 
-        for (i = 0; i <= tex->b.b.last_level; i++) {
+        for (i = 0; i <= tex->b.last_level; i++) {
             unsigned zcomp_numdw, zcompsize, hiz_numdw, stride, height;
 
-            stride = r300_stride_to_width(tex->b.b.format,
+            stride = r300_stride_to_width(tex->b.format,
                                           tex->tex.stride_in_bytes[i]);
             stride = align(stride, 16);
-            height = u_minify(tex->b.b.height0, i);
+            height = u_minify(tex->b.height0, i);
 
             /* The 8x8 compression mode needs macrotiling. */
             zcompsize = screen->caps.z_compress == R300_ZCOMP_8X8 &&
                        tex->tex.macrotile[i] &&
-                       tex->b.b.nr_samples <= 1 ? 8 : 4;
+                       tex->b.nr_samples <= 1 ? 8 : 4;
 
             /* Get the ZMASK buffer size in dwords. */
             zcomp_numdw = r300_pixels_to_dwords(stride, height,
@@ -379,7 +379,7 @@ static void r300_setup_hyperz_properties(struct r300_screen *screen,
                                 zmask_blocks_y_per_dw[pipes-1] * zcompsize);
 
             /* Check whether we have enough ZMASK memory. */
-            if (util_format_get_blocksizebits(tex->b.b.format) == 32 &&
+            if (util_format_get_blocksizebits(tex->b.format) == 32 &&
                 zcomp_numdw <= screen->caps.zmask_ram * pipes) {
                 tex->tex.zmask_dwords[i] = zcomp_numdw;
                 tex->tex.zcomp8x8[i] = zcompsize == 8;
@@ -423,15 +423,15 @@ static void r300_setup_cmask_properties(struct r300_screen *screen,
     }
 
     /* We need an AA colorbuffer, no mipmaps. */
-    if (tex->b.b.nr_samples <= 1 ||
-        tex->b.b.last_level > 0 ||
-        util_format_is_depth_or_stencil(tex->b.b.format)) {
+    if (tex->b.nr_samples <= 1 ||
+        tex->b.last_level > 0 ||
+        util_format_is_depth_or_stencil(tex->b.format)) {
         return;
     }
 
     /* FP16 AA needs R500 and a fairly new DRM. */
-    if ((tex->b.b.format == PIPE_FORMAT_R16G16B16A16_FLOAT ||
-         tex->b.b.format == PIPE_FORMAT_R16G16B16X16_FLOAT) &&
+    if ((tex->b.format == PIPE_FORMAT_R16G16B16A16_FLOAT ||
+         tex->b.format == PIPE_FORMAT_R16G16B16X16_FLOAT) &&
         (!screen->caps.is_r500 || screen->info.drm_minor < 29)) {
         return;
     }
@@ -447,12 +447,12 @@ static void r300_setup_cmask_properties(struct r300_screen *screen,
      * the other cards have 4096 dwords of CMASK RAM per pipe. */
     cmask_max_size = pipes == 1 ? 5120 : pipes * 4096;
 
-    stride = r300_stride_to_width(tex->b.b.format,
+    stride = r300_stride_to_width(tex->b.format,
                                   tex->tex.stride_in_bytes[0]);
     stride = align(stride, 16);
 
     /* Get the CMASK size in dwords. */
-    cmask_num_dw = r300_pixels_to_dwords(stride, tex->b.b.height0,
+    cmask_num_dw = r300_pixels_to_dwords(stride, tex->b.height0,
                                          cmask_align_x[pipes-1],
                                          cmask_align_y[pipes-1]);
 
@@ -467,14 +467,14 @@ static void r300_setup_cmask_properties(struct r300_screen *screen,
 static void r300_setup_tiling(struct r300_screen *screen,
                               struct r300_resource *tex)
 {
-    enum pipe_format format = tex->b.b.format;
+    enum pipe_format format = tex->b.format;
     boolean rv350_mode = screen->caps.family >= CHIP_R350;
     boolean is_zb = util_format_is_depth_or_stencil(format);
     boolean dbg_no_tiling = SCREEN_DBG_ON(screen, DBG_NO_TILING);
     boolean force_microtiling =
-        (tex->b.b.flags & R300_RESOURCE_FORCE_MICROTILING) != 0;
+        (tex->b.flags & R300_RESOURCE_FORCE_MICROTILING) != 0;
 
-    if (tex->b.b.nr_samples > 1) {
+    if (tex->b.nr_samples > 1) {
         tex->tex.microtile = RADEON_LAYOUT_TILED;
         tex->tex.macrotile[0] = RADEON_LAYOUT_TILED;
         return;
@@ -483,7 +483,7 @@ static void r300_setup_tiling(struct r300_screen *screen,
     tex->tex.microtile = RADEON_LAYOUT_LINEAR;
     tex->tex.macrotile[0] = RADEON_LAYOUT_LINEAR;
 
-    if (tex->b.b.usage == PIPE_USAGE_STAGING) {
+    if (tex->b.usage == PIPE_USAGE_STAGING) {
        return;
     }
 
@@ -493,7 +493,7 @@ static void r300_setup_tiling(struct r300_screen *screen,
 
     /* If height == 1, disable microtiling except for zbuffer. */
     if (!force_microtiling && !is_zb &&
-        (tex->b.b.height0 == 1 || dbg_no_tiling)) {
+        (tex->b.height0 == 1 || dbg_no_tiling)) {
         return;
     }
 
@@ -530,25 +530,25 @@ static void r300_tex_print_info(struct r300_resource *tex,
             func,
             tex->tex.macrotile[0] ? "YES" : " NO",
             tex->tex.microtile ? "YES" : " NO",
-            r300_stride_to_width(tex->b.b.format, tex->tex.stride_in_bytes[0]),
-            tex->b.b.width0, tex->b.b.height0, tex->b.b.depth0,
-            tex->b.b.last_level, tex->tex.size_in_bytes,
-            util_format_short_name(tex->b.b.format),
-            tex->b.b.nr_samples);
+            r300_stride_to_width(tex->b.format, tex->tex.stride_in_bytes[0]),
+            tex->b.width0, tex->b.height0, tex->b.depth0,
+            tex->b.last_level, tex->tex.size_in_bytes,
+            util_format_short_name(tex->b.format),
+            tex->b.nr_samples);
 }
 
 void r300_texture_desc_init(struct r300_screen *rscreen,
                             struct r300_resource *tex,
                             const struct pipe_resource *base)
 {
-    tex->b.b.target = base->target;
-    tex->b.b.format = base->format;
-    tex->b.b.width0 = base->width0;
-    tex->b.b.height0 = base->height0;
-    tex->b.b.depth0 = base->depth0;
-    tex->b.b.array_size = base->array_size;
-    tex->b.b.last_level = base->last_level;
-    tex->b.b.nr_samples = base->nr_samples;
+    tex->b.target = base->target;
+    tex->b.format = base->format;
+    tex->b.width0 = base->width0;
+    tex->b.height0 = base->height0;
+    tex->b.depth0 = base->depth0;
+    tex->b.array_size = base->array_size;
+    tex->b.last_level = base->last_level;
+    tex->b.nr_samples = base->nr_samples;
     tex->tex.width0 = base->width0;
     tex->tex.height0 = base->height0;
     tex->tex.depth0 = base->depth0;
@@ -564,26 +564,26 @@ void r300_texture_desc_init(struct r300_screen *rscreen,
      * for rendering. */
     if (rscreen->caps.is_r500) {
         /* FP16 6x MSAA buffers are limited to a width of 1360 pixels. */
-        if ((tex->b.b.format == PIPE_FORMAT_R16G16B16A16_FLOAT ||
-             tex->b.b.format == PIPE_FORMAT_R16G16B16X16_FLOAT) &&
-            tex->b.b.nr_samples == 6 && tex->b.b.width0 > 1360) {
-            tex->b.b.nr_samples = 4;
+        if ((tex->b.format == PIPE_FORMAT_R16G16B16A16_FLOAT ||
+             tex->b.format == PIPE_FORMAT_R16G16B16X16_FLOAT) &&
+            tex->b.nr_samples == 6 && tex->b.width0 > 1360) {
+            tex->b.nr_samples = 4;
         }
 
         /* FP16 4x MSAA buffers are limited to a width of 2048 pixels. */
-        if ((tex->b.b.format == PIPE_FORMAT_R16G16B16A16_FLOAT ||
-             tex->b.b.format == PIPE_FORMAT_R16G16B16X16_FLOAT) &&
-            tex->b.b.nr_samples == 4 && tex->b.b.width0 > 2048) {
-            tex->b.b.nr_samples = 2;
+        if ((tex->b.format == PIPE_FORMAT_R16G16B16A16_FLOAT ||
+             tex->b.format == PIPE_FORMAT_R16G16B16X16_FLOAT) &&
+            tex->b.nr_samples == 4 && tex->b.width0 > 2048) {
+            tex->b.nr_samples = 2;
         }
     }
 
     /* 32-bit 6x MSAA buffers are limited to a width of 2720 pixels.
      * This applies to all R300-R500 cards. */
-    if (util_format_get_blocksizebits(tex->b.b.format) == 32 &&
-        !util_format_is_depth_or_stencil(tex->b.b.format) &&
-        tex->b.b.nr_samples == 6 && tex->b.b.width0 > 2720) {
-        tex->b.b.nr_samples = 4;
+    if (util_format_get_blocksizebits(tex->b.format) == 32 &&
+        !util_format_is_depth_or_stencil(tex->b.format) &&
+        tex->b.nr_samples == 6 && tex->b.width0 > 2720) {
+        tex->b.nr_samples = 4;
     }
 
     r300_setup_flags(tex);
@@ -635,7 +635,7 @@ unsigned r300_texture_get_offset(struct r300_resource *tex,
 {
     unsigned offset = tex->tex.offset_in_bytes[level];
 
-    switch (tex->b.b.target) {
+    switch (tex->b.target) {
         case PIPE_TEXTURE_3D:
         case PIPE_TEXTURE_CUBE:
             return offset + layer * tex->tex.layer_size_in_bytes[level];
diff --git a/lib/mesa/src/gallium/drivers/r300/r300_transfer.c b/lib/mesa/src/gallium/drivers/r300/r300_transfer.c
index 8274de5f4..e15acac60 100644
--- a/lib/mesa/src/gallium/drivers/r300/r300_transfer.c
+++ b/lib/mesa/src/gallium/drivers/r300/r300_transfer.c
@@ -33,9 +33,6 @@ struct r300_transfer {
     /* Parent class */
     struct pipe_transfer transfer;
 
-    /* Offset from start of buffer. */
-    unsigned offset;
-
     /* Linear texture. */
     struct r300_resource *linear_texture;
 };
@@ -53,7 +50,7 @@ static void r300_copy_from_tiled_texture(struct pipe_context *ctx,
 {
     struct pipe_transfer *transfer = (struct pipe_transfer*)r300transfer;
     struct pipe_resource *src = transfer->resource;
-    struct pipe_resource *dst = &r300transfer->linear_texture->b.b;
+    struct pipe_resource *dst = &r300transfer->linear_texture->b;
 
     if (src->nr_samples <= 1) {
         ctx->resource_copy_region(ctx, dst, 0, 0, 0, 0,
@@ -93,7 +90,7 @@ static void r300_copy_into_tiled_texture(struct pipe_context *ctx,
 
     ctx->resource_copy_region(ctx, tex, transfer->level,
                               transfer->box.x, transfer->box.y, transfer->box.z,
-                              &r300transfer->linear_texture->b.b, 0, &src_box);
+                              &r300transfer->linear_texture->b, 0, &src_box);
 
     /* XXX remove this. */
     r300_flush(ctx, 0, NULL);
@@ -111,7 +108,7 @@ r300_texture_transfer_map(struct pipe_context *ctx,
     struct r300_resource *tex = r300_resource(texture);
     struct r300_transfer *trans;
     boolean referenced_cs, referenced_hw;
-    enum pipe_format format = tex->b.b.format;
+    enum pipe_format format = tex->b.format;
     char *map;
 
     referenced_cs =
@@ -206,7 +203,7 @@ r300_texture_transfer_map(struct pipe_context *ctx,
             /* Unpipelined transfer. */
             trans->transfer.stride = tex->tex.stride_in_bytes[level];
             trans->transfer.layer_stride = tex->tex.layer_size_in_bytes[level];
-            trans->offset = r300_texture_get_offset(tex, level, box->z);
+            trans->transfer.offset = r300_texture_get_offset(tex, level, box->z);
 
             if (referenced_cs &&
                 !(usage & PIPE_MAP_UNSYNCHRONIZED)) {
@@ -237,7 +234,7 @@ r300_texture_transfer_map(struct pipe_context *ctx,
         }
 
 	*transfer = &trans->transfer;
-        return map + trans->offset +
+        return map + trans->transfer.offset +
             box->y / util_format_get_blockheight(format) * trans->transfer.stride +
             box->x / util_format_get_blockwidth(format) * util_format_get_blocksize(format);
     }
diff --git a/lib/mesa/src/gallium/drivers/r300/r300_vs.c b/lib/mesa/src/gallium/drivers/r300/r300_vs.c
index 62152714d..96d6c4386 100644
--- a/lib/mesa/src/gallium/drivers/r300/r300_vs.c
+++ b/lib/mesa/src/gallium/drivers/r300/r300_vs.c
@@ -249,7 +249,7 @@ void r300_translate_vertex_shader(struct r300_context *r300,
         compiler.Base.remove_unused_constants = TRUE;
     }
 
-    compiler.RequiredOutputs = ~(~0 << (vs->info.num_outputs + 1));
+    compiler.RequiredOutputs = ~(~0U << (vs->info.num_outputs + 1));
     compiler.SetHwInputOutput = &set_vertex_inputs_outputs;
 
     /* Insert the WPOS output. */
diff --git a/lib/mesa/src/gallium/drivers/r300/r300_vs_draw.c b/lib/mesa/src/gallium/drivers/r300/r300_vs_draw.c
index 83bcaee08..29590bae3 100644
--- a/lib/mesa/src/gallium/drivers/r300/r300_vs_draw.c
+++ b/lib/mesa/src/gallium/drivers/r300/r300_vs_draw.c
@@ -312,15 +312,17 @@ void r300_draw_init_vertex_shader(struct r300_context *r300,
                                   struct r300_vertex_shader *vs)
 {
     struct draw_context *draw = r300->draw;
-    struct pipe_shader_state new_vs;
     struct tgsi_shader_info info;
     struct vs_transform_context transform;
     const uint newLen = tgsi_num_tokens(vs->state.tokens) + 100 /* XXX */;
+    struct pipe_shader_state new_vs = {
+        .type = PIPE_SHADER_IR_TGSI,
+        .tokens = tgsi_alloc_tokens(newLen)
+    };
     unsigned i;
 
     tgsi_scan_shader(vs->state.tokens, &info);
 
-    new_vs.tokens = tgsi_alloc_tokens(newLen);
     if (new_vs.tokens == NULL)
         return;