diff options
author | Jonathan Gray <jsg@cvs.openbsd.org> | 2017-08-14 09:45:54 +0000 |
---|---|---|
committer | Jonathan Gray <jsg@cvs.openbsd.org> | 2017-08-14 09:45:54 +0000 |
commit | 4c58069f5013f0a621503525f7d5193bfe9976b3 (patch) | |
tree | bd8f8a08b889e9a8b99c9de01ae12459d527ea6d /lib/mesa/src/gallium/drivers/r600/r600_state.c | |
parent | 5caa025e6b62d0456faad86c89f239a14d1eaadb (diff) |
Import Mesa 17.1.6
Diffstat (limited to 'lib/mesa/src/gallium/drivers/r600/r600_state.c')
-rw-r--r-- | lib/mesa/src/gallium/drivers/r600/r600_state.c | 121 |
1 files changed, 58 insertions, 63 deletions
diff --git a/lib/mesa/src/gallium/drivers/r600/r600_state.c b/lib/mesa/src/gallium/drivers/r600/r600_state.c index 2b58d982a..06100abc4 100644 --- a/lib/mesa/src/gallium/drivers/r600/r600_state.c +++ b/lib/mesa/src/gallium/drivers/r600/r600_state.c @@ -470,6 +470,7 @@ static void *r600_create_rs_state(struct pipe_context *ctx, rs->clip_halfz = state->clip_halfz; rs->flatshade = state->flatshade; rs->sprite_coord_enable = state->sprite_coord_enable; + rs->rasterizer_discard = state->rasterizer_discard; rs->two_side = state->light_twoside; rs->clip_plane_enable = state->clip_plane_enable; rs->pa_sc_line_stipple = state->line_stipple_enable ? @@ -622,7 +623,7 @@ static void *r600_create_sampler_state(struct pipe_context *ctx, static struct pipe_sampler_view * texture_buffer_sampler_view(struct r600_pipe_sampler_view *view, unsigned width0, unsigned height0) - + { struct r600_texture *tmp = (struct r600_texture*)view->base.texture; int stride = util_format_get_blocksize(view->base.format); @@ -723,7 +724,7 @@ r600_create_sampler_view_custom(struct pipe_context *ctx, width = width_first_level; height = height_first_level; depth = u_minify(texture->depth0, offset_level); - pitch = tmp->surface.level[offset_level].nblk_x * util_format_get_blockwidth(state->format); + pitch = tmp->surface.u.legacy.level[offset_level].nblk_x * util_format_get_blockwidth(state->format); if (texture->target == PIPE_TEXTURE_1D_ARRAY) { height = 1; @@ -733,7 +734,7 @@ r600_create_sampler_view_custom(struct pipe_context *ctx, } else if (texture->target == PIPE_TEXTURE_CUBE_ARRAY) depth = texture->array_size / 6; - switch (tmp->surface.level[offset_level].mode) { + switch (tmp->surface.u.legacy.level[offset_level].mode) { default: case RADEON_SURF_MODE_LINEAR_ALIGNED: array_mode = V_038000_ARRAY_LINEAR_ALIGNED; @@ -755,11 +756,11 @@ r600_create_sampler_view_custom(struct pipe_context *ctx, view->tex_resource_words[1] = (S_038004_TEX_HEIGHT(height - 1) | S_038004_TEX_DEPTH(depth - 1) | S_038004_DATA_FORMAT(format)); - view->tex_resource_words[2] = tmp->surface.level[offset_level].offset >> 8; - if (offset_level >= tmp->surface.last_level) { - view->tex_resource_words[3] = tmp->surface.level[offset_level].offset >> 8; + view->tex_resource_words[2] = tmp->surface.u.legacy.level[offset_level].offset >> 8; + if (offset_level >= tmp->resource.b.b.last_level) { + view->tex_resource_words[3] = tmp->surface.u.legacy.level[offset_level].offset >> 8; } else { - view->tex_resource_words[3] = tmp->surface.level[offset_level + 1].offset >> 8; + view->tex_resource_words[3] = tmp->surface.u.legacy.level[offset_level + 1].offset >> 8; } view->tex_resource_words[4] = (word4 | S_038010_REQUEST_SIZE(1) | @@ -802,26 +803,6 @@ static void r600_set_polygon_stipple(struct pipe_context *ctx, { } -static struct r600_resource *r600_buffer_create_helper(struct r600_screen *rscreen, - unsigned size, unsigned alignment) -{ - struct pipe_resource buffer; - - memset(&buffer, 0, sizeof buffer); - buffer.target = PIPE_BUFFER; - buffer.format = PIPE_FORMAT_R8_UNORM; - buffer.bind = PIPE_BIND_CUSTOM; - buffer.usage = PIPE_USAGE_DEFAULT; - buffer.flags = 0; - buffer.width0 = size; - buffer.height0 = 1; - buffer.depth0 = 1; - buffer.array_size = 1; - - return (struct r600_resource*) - r600_buffer_create(&rscreen->b.b, &buffer, alignment); -} - static void r600_init_color_surface(struct r600_context *rctx, struct r600_surface *surf, bool force_cmask_fmask) @@ -844,17 +825,17 @@ static void r600_init_color_surface(struct r600_context *rctx, assert(rtex); } - offset = rtex->surface.level[level].offset; + offset = rtex->surface.u.legacy.level[level].offset; color_view = S_028080_SLICE_START(surf->base.u.tex.first_layer) | S_028080_SLICE_MAX(surf->base.u.tex.last_layer); - pitch = rtex->surface.level[level].nblk_x / 8 - 1; - slice = (rtex->surface.level[level].nblk_x * rtex->surface.level[level].nblk_y) / 64; + pitch = rtex->surface.u.legacy.level[level].nblk_x / 8 - 1; + slice = (rtex->surface.u.legacy.level[level].nblk_x * rtex->surface.u.legacy.level[level].nblk_y) / 64; if (slice) { slice = slice - 1; } color_info = 0; - switch (rtex->surface.level[level].mode) { + switch (rtex->surface.u.legacy.level[level].mode) { default: case RADEON_SURF_MODE_LINEAR_ALIGNED: color_info = S_0280A0_ARRAY_MODE(V_038000_ARRAY_LINEAR_ALIGNED); @@ -998,7 +979,15 @@ static void r600_init_color_surface(struct r600_context *rctx, void *ptr; r600_resource_reference(&rctx->dummy_cmask, NULL); - rctx->dummy_cmask = r600_buffer_create_helper(rscreen, cmask.size, cmask.alignment); + rctx->dummy_cmask = (struct r600_resource*) + r600_aligned_buffer_create(&rscreen->b.b, 0, + PIPE_USAGE_DEFAULT, + cmask.size, cmask.alignment); + + if (unlikely(!rctx->dummy_cmask)) { + surf->color_initialized = false; + return; + } /* Set the contents to 0xCC. */ ptr = pipe_buffer_map(&rctx->b.b, &rctx->dummy_cmask->b.b, PIPE_TRANSFER_WRITE, &transfer); @@ -1012,8 +1001,15 @@ static void r600_init_color_surface(struct r600_context *rctx, rctx->dummy_fmask->b.b.width0 < fmask.size || rctx->dummy_fmask->buf->alignment % fmask.alignment != 0) { r600_resource_reference(&rctx->dummy_fmask, NULL); - rctx->dummy_fmask = r600_buffer_create_helper(rscreen, fmask.size, fmask.alignment); + rctx->dummy_fmask = (struct r600_resource*) + r600_aligned_buffer_create(&rscreen->b.b, 0, + PIPE_USAGE_DEFAULT, + fmask.size, fmask.alignment); + if (unlikely(!rctx->dummy_fmask)) { + surf->color_initialized = false; + return; + } } r600_resource_reference(&surf->cb_buffer_fmask, rctx->dummy_fmask); @@ -1037,13 +1033,13 @@ static void r600_init_depth_surface(struct r600_context *rctx, unsigned level, pitch, slice, format, offset, array_mode; level = surf->base.u.tex.level; - offset = rtex->surface.level[level].offset; - pitch = rtex->surface.level[level].nblk_x / 8 - 1; - slice = (rtex->surface.level[level].nblk_x * rtex->surface.level[level].nblk_y) / 64; + offset = rtex->surface.u.legacy.level[level].offset; + pitch = rtex->surface.u.legacy.level[level].nblk_x / 8 - 1; + slice = (rtex->surface.u.legacy.level[level].nblk_x * rtex->surface.u.legacy.level[level].nblk_y) / 64; if (slice) { slice = slice - 1; } - switch (rtex->surface.level[level].mode) { + switch (rtex->surface.u.legacy.level[level].mode) { case RADEON_SURF_MODE_2D: array_mode = V_0280A0_ARRAY_2D_TILED_THIN1; break; @@ -1062,7 +1058,7 @@ static void r600_init_depth_surface(struct r600_context *rctx, surf->db_depth_view = S_028004_SLICE_START(surf->base.u.tex.first_layer) | S_028004_SLICE_MAX(surf->base.u.tex.last_layer); surf->db_depth_size = S_028000_PITCH_TILE_MAX(pitch) | S_028000_SLICE_TILE_MAX(slice); - surf->db_prefetch_limit = (rtex->surface.level[level].nblk_y / 8) - 1; + surf->db_prefetch_limit = (rtex->surface.u.legacy.level[level].nblk_y / 8) - 1; /* use htile only for first level */ if (rtex->htile_buffer && !level) { @@ -1136,7 +1132,7 @@ static void r600_set_framebuffer_state(struct pipe_context *ctx, rctx->framebuffer.export_16bpc = false; } - if (rtex->fmask.size && rtex->cmask.size) { + if (rtex->fmask.size) { rctx->framebuffer.compressed_cb_mask |= 1 << i; } } @@ -1352,7 +1348,7 @@ static void r600_emit_framebuffer_state(struct r600_context *rctx, struct r600_a radeon_emit(cs, cb[i] ? cb[i]->cb_color_info : 0); } /* set CB_COLOR1_INFO for possible dual-src blending */ - if (i == 1 && cb[0]) { + if (rctx->framebuffer.dual_src_blend && i == 1 && cb[0]) { radeon_emit(cs, cb[0]->cb_color_info); i++; } @@ -2839,8 +2835,8 @@ static boolean r600_dma_copy_tile(struct r600_context *rctx, unsigned ncopy, height, cheight, detile, i, x, y, z, src_mode, dst_mode; uint64_t base, addr; - dst_mode = rdst->surface.level[dst_level].mode; - src_mode = rsrc->surface.level[src_level].mode; + dst_mode = rdst->surface.u.legacy.level[dst_level].mode; + src_mode = rsrc->surface.u.legacy.level[src_level].mode; assert(dst_mode != src_mode); y = 0; @@ -2850,40 +2846,40 @@ static boolean r600_dma_copy_tile(struct r600_context *rctx, if (dst_mode == RADEON_SURF_MODE_LINEAR_ALIGNED) { /* T2L */ array_mode = r600_array_mode(src_mode); - slice_tile_max = (rsrc->surface.level[src_level].nblk_x * rsrc->surface.level[src_level].nblk_y) / (8*8); + slice_tile_max = (rsrc->surface.u.legacy.level[src_level].nblk_x * rsrc->surface.u.legacy.level[src_level].nblk_y) / (8*8); slice_tile_max = slice_tile_max ? slice_tile_max - 1 : 0; /* linear height must be the same as the slice tile max height, it's ok even * if the linear destination/source have smaller heigh as the size of the * dma packet will be using the copy_height which is always smaller or equal * to the linear height */ - height = rsrc->surface.level[src_level].npix_y; + height = u_minify(rsrc->resource.b.b.height0, src_level); detile = 1; x = src_x; y = src_y; z = src_z; - base = rsrc->surface.level[src_level].offset; - addr = rdst->surface.level[dst_level].offset; - addr += rdst->surface.level[dst_level].slice_size * dst_z; + base = rsrc->surface.u.legacy.level[src_level].offset; + addr = rdst->surface.u.legacy.level[dst_level].offset; + addr += rdst->surface.u.legacy.level[dst_level].slice_size * dst_z; addr += dst_y * pitch + dst_x * bpp; } else { /* L2T */ array_mode = r600_array_mode(dst_mode); - slice_tile_max = (rdst->surface.level[dst_level].nblk_x * rdst->surface.level[dst_level].nblk_y) / (8*8); + slice_tile_max = (rdst->surface.u.legacy.level[dst_level].nblk_x * rdst->surface.u.legacy.level[dst_level].nblk_y) / (8*8); slice_tile_max = slice_tile_max ? slice_tile_max - 1 : 0; /* linear height must be the same as the slice tile max height, it's ok even * if the linear destination/source have smaller heigh as the size of the * dma packet will be using the copy_height which is always smaller or equal * to the linear height */ - height = rdst->surface.level[dst_level].npix_y; + height = u_minify(rdst->resource.b.b.height0, dst_level); detile = 0; x = dst_x; y = dst_y; z = dst_z; - base = rdst->surface.level[dst_level].offset; - addr = rsrc->surface.level[src_level].offset; - addr += rsrc->surface.level[src_level].slice_size * src_z; + base = rdst->surface.u.legacy.level[dst_level].offset; + addr = rsrc->surface.u.legacy.level[src_level].offset; + addr += rsrc->surface.u.legacy.level[src_level].slice_size * src_z; addr += src_y * pitch + src_x * bpp; } /* check that we are in dw/base alignment constraint */ @@ -2919,7 +2915,6 @@ static boolean r600_dma_copy_tile(struct r600_context *rctx, addr += cheight * pitch; y += cheight; } - r600_dma_emit_wait_idle(&rctx->b); return TRUE; } @@ -2962,14 +2957,14 @@ static void r600_dma_copy(struct pipe_context *ctx, dst_y = util_format_get_nblocksy(src->format, dst_y); bpp = rdst->surface.bpe; - dst_pitch = rdst->surface.level[dst_level].pitch_bytes; - src_pitch = rsrc->surface.level[src_level].pitch_bytes; - src_w = rsrc->surface.level[src_level].npix_x; - dst_w = rdst->surface.level[dst_level].npix_x; + dst_pitch = rdst->surface.u.legacy.level[dst_level].nblk_x * rdst->surface.bpe; + src_pitch = rsrc->surface.u.legacy.level[src_level].nblk_x * rsrc->surface.bpe; + src_w = u_minify(rsrc->resource.b.b.width0, src_level); + dst_w = u_minify(rdst->resource.b.b.width0, dst_level); copy_height = src_box->height / rsrc->surface.blk_h; - dst_mode = rdst->surface.level[dst_level].mode; - src_mode = rsrc->surface.level[src_level].mode; + dst_mode = rdst->surface.u.legacy.level[dst_level].mode; + src_mode = rsrc->surface.u.legacy.level[src_level].mode; if (src_pitch != dst_pitch || src_box->x || dst_x || src_w != dst_w) { /* strict requirement on r6xx/r7xx */ @@ -2988,11 +2983,11 @@ static void r600_dma_copy(struct pipe_context *ctx, * dst_x/y == 0 * dst_pitch == src_pitch */ - src_offset= rsrc->surface.level[src_level].offset; - src_offset += rsrc->surface.level[src_level].slice_size * src_box->z; + src_offset= rsrc->surface.u.legacy.level[src_level].offset; + src_offset += rsrc->surface.u.legacy.level[src_level].slice_size * src_box->z; src_offset += src_y * src_pitch + src_x * bpp; - dst_offset = rdst->surface.level[dst_level].offset; - dst_offset += rdst->surface.level[dst_level].slice_size * dst_z; + dst_offset = rdst->surface.u.legacy.level[dst_level].offset; + dst_offset += rdst->surface.u.legacy.level[dst_level].slice_size * dst_z; dst_offset += dst_y * dst_pitch + dst_x * bpp; size = src_box->height * src_pitch; /* must be dw aligned */ |