diff options
| author | Jonathan Gray <jsg@cvs.openbsd.org> | 2018-01-08 05:41:34 +0000 |
|---|---|---|
| committer | Jonathan Gray <jsg@cvs.openbsd.org> | 2018-01-08 05:41:34 +0000 |
| commit | c00801de923e125863aaf8180439d59d610b2517 (patch) | |
| tree | e2896aa2785f3cf2151aeeb3c95fb5cc09a2fe02 /lib/mesa/src/gallium/drivers/radeon/radeon_uvd.h | |
| parent | be30e6efb92db21299b936c0e068e7088941e9c9 (diff) | |
Revert to Mesa 13.0.6 again.
Corruption has again been reported on Intel hardware running Xorg with
the modesetting driver (which uses OpenGL based acceleration instead of
SNA acceleration the intel driver defaults to).
Reported in various forms on Sandy Bridge (X220), Ivy Bridge (X230) and
Haswell (X240). Confirmed to not occur with the intel driver but the
xserver was changed to default to the modesetting driver on >= gen4
hardware (except Ironlake).
One means of triggering this is to open a large pdf with xpdf on an
idle machine and highlight a section of the document.
There have been reports of gpu hangs on gen4 intel hardware
(T500 with GM45, X61 with 965GM) when starting Xorg as well.
Diffstat (limited to 'lib/mesa/src/gallium/drivers/radeon/radeon_uvd.h')
| -rw-r--r-- | lib/mesa/src/gallium/drivers/radeon/radeon_uvd.h | 12 |
1 files changed, 1 insertions, 11 deletions
diff --git a/lib/mesa/src/gallium/drivers/radeon/radeon_uvd.h b/lib/mesa/src/gallium/drivers/radeon/radeon_uvd.h index 0c3797e22..e3f8504d8 100644 --- a/lib/mesa/src/gallium/drivers/radeon/radeon_uvd.h +++ b/lib/mesa/src/gallium/drivers/radeon/radeon_uvd.h @@ -56,11 +56,6 @@ #define RUVD_GPCOM_VCPU_DATA1 0xEF14 #define RUVD_ENGINE_CNTL 0xEF18 -#define RUVD_GPCOM_VCPU_CMD_SOC15 0x2070c -#define RUVD_GPCOM_VCPU_DATA0_SOC15 0x20710 -#define RUVD_GPCOM_VCPU_DATA1_SOC15 0x20714 -#define RUVD_ENGINE_CNTL_SOC15 0x20718 - /* UVD commands to VCPU */ #define RUVD_CMD_MSG_BUFFER 0x00000000 #define RUVD_CMD_DPB_BUFFER 0x00000001 @@ -116,11 +111,6 @@ #define RUVD_VC1_PROFILE_MAIN 0x00000001 #define RUVD_VC1_PROFILE_ADVANCED 0x00000002 -enum ruvd_surface_type { - RUVD_SURFACE_TYPE_LEGACY = 0, - RUVD_SURFACE_TYPE_GFX9 -}; - struct ruvd_mvc_element { uint16_t viewOrderIndex; uint16_t viewId; @@ -442,5 +432,5 @@ struct pipe_video_codec *ruvd_create_decoder(struct pipe_context *context, /* fill decoding target field from the luma and chroma surfaces */ void ruvd_set_dt_surfaces(struct ruvd_msg *msg, struct radeon_surf *luma, - struct radeon_surf *chroma, enum ruvd_surface_type type); + struct radeon_surf *chroma); #endif |