Merge Mesa 22.1.7

10 files changed, 34 insertions, 48 deletions

diff --git a/lib/mesa/src/gallium/drivers/vc4/vc4_blit.c b/lib/mesa/src/gallium/drivers/vc4/vc4_blit.c
index d7f756f72..e63ef6108 100644
--- a/lib/mesa/src/gallium/drivers/vc4/vc4_blit.c
+++ b/lib/mesa/src/gallium/drivers/vc4/vc4_blit.c
@@ -132,15 +132,6 @@ vc4_tile_blit(struct pipe_context *pctx, const struct pipe_blit_info *info)
         struct vc4_job *job = vc4_get_job(vc4, dst_surf, NULL);
         pipe_surface_reference(&job->color_read, src_surf);
 
-        /* If we're resolving from MSAA to single sample, we still need to run
-         * the engine in MSAA mode for the load.
-         */
-        if (!job->msaa && info->src.resource->nr_samples > 1) {
-                job->msaa = true;
-                job->tile_width = 32;
-                job->tile_height = 32;
-        }
-
         job->draw_min_x = info->dst.box.x;
         job->draw_min_y = info->dst.box.y;
         job->draw_max_x = info->dst.box.x + info->dst.box.width;
@@ -177,7 +168,7 @@ vc4_blitter_save(struct vc4_context *vc4)
         util_blitter_save_blend(vc4->blitter, vc4->blend);
         util_blitter_save_depth_stencil_alpha(vc4->blitter, vc4->zsa);
         util_blitter_save_stencil_ref(vc4->blitter, &vc4->stencil_ref);
-        util_blitter_save_sample_mask(vc4->blitter, vc4->sample_mask);
+        util_blitter_save_sample_mask(vc4->blitter, vc4->sample_mask, 0);
         util_blitter_save_framebuffer(vc4->blitter, &vc4->framebuffer);
         util_blitter_save_fragment_sampler_states(vc4->blitter,
                         vc4->fragtex.num_samplers,
@@ -402,7 +393,7 @@ fallback:
         /* Do an immediate SW fallback, since the render blit path
          * would just recurse.
          */
-        ok = util_try_blit_via_copy_region(pctx, info);
+        ok = util_try_blit_via_copy_region(pctx, info, false);
         assert(ok); (void)ok;
 
         return true;
@@ -450,7 +441,7 @@ vc4_blit(struct pipe_context *pctx, const struct pipe_blit_info *blit_info)
                 return;
 
         if (info.mask & PIPE_MASK_S) {
-                if (util_try_blit_via_copy_region(pctx, &info))
+                if (util_try_blit_via_copy_region(pctx, &info, false))
                         return;
 
                 info.mask &= ~PIPE_MASK_S;
diff --git a/lib/mesa/src/gallium/drivers/vc4/vc4_context.c b/lib/mesa/src/gallium/drivers/vc4/vc4_context.c
index 75d82f3e3..531416ca3 100644
--- a/lib/mesa/src/gallium/drivers/vc4/vc4_context.c
+++ b/lib/mesa/src/gallium/drivers/vc4/vc4_context.c
@@ -85,7 +85,7 @@ vc4_texture_barrier(struct pipe_context *pctx, unsigned flags)
 
 static void
 vc4_set_debug_callback(struct pipe_context *pctx,
-                       const struct pipe_debug_callback *cb)
+                       const struct util_debug_callback *cb)
 {
         struct vc4_context *vc4 = vc4_context(pctx);
 
diff --git a/lib/mesa/src/gallium/drivers/vc4/vc4_context.h b/lib/mesa/src/gallium/drivers/vc4/vc4_context.h
index f47135371..a55f808a7 100644
--- a/lib/mesa/src/gallium/drivers/vc4/vc4_context.h
+++ b/lib/mesa/src/gallium/drivers/vc4/vc4_context.h
@@ -381,7 +381,7 @@ struct vc4_context {
         struct pipe_viewport_state viewport;
         struct vc4_constbuf_stateobj constbuf[PIPE_SHADER_TYPES];
         struct vc4_vertexbuf_stateobj vertexbuf;
-        struct pipe_debug_callback debug;
+        struct util_debug_callback debug;
 
         struct vc4_hwperfmon *perfmon;
         /** @} */
@@ -429,7 +429,7 @@ struct vc4_depth_stencil_alpha_state {
         if (unlikely(vc4_debug & VC4_DEBUG_PERF))       \
                 fprintf(stderr, __VA_ARGS__);           \
         if (unlikely(vc4->debug.debug_message))         \
-                pipe_debug_message(&vc4->debug, PERF_INFO, __VA_ARGS__);    \
+                util_debug_message(&vc4->debug, PERF_INFO, __VA_ARGS__);    \
 } while (0)
 
 static inline struct vc4_context *
diff --git a/lib/mesa/src/gallium/drivers/vc4/vc4_nir_lower_blend.c b/lib/mesa/src/gallium/drivers/vc4/vc4_nir_lower_blend.c
index d01a4c207..20a4e8644 100644
--- a/lib/mesa/src/gallium/drivers/vc4/vc4_nir_lower_blend.c
+++ b/lib/mesa/src/gallium/drivers/vc4/vc4_nir_lower_blend.c
@@ -562,7 +562,11 @@ vc4_nir_lower_blend_instr(struct vc4_compile *c, nir_builder *b,
 
         nir_instr_rewrite_src(&intr->instr, &intr->src[0],
                               nir_src_for_ssa(blend_output));
-        intr->num_components = blend_output->num_components;
+        if (intr->num_components != blend_output->num_components) {
+                unsigned component_mask = BITFIELD_MASK(blend_output->num_components);
+                nir_intrinsic_set_write_mask(intr, component_mask);
+                intr->num_components = blend_output->num_components;
+        }
 }
 
 static bool
diff --git a/lib/mesa/src/gallium/drivers/vc4/vc4_qir.c b/lib/mesa/src/gallium/drivers/vc4/vc4_qir.c
index 0d104c061..9c7e735e9 100644
--- a/lib/mesa/src/gallium/drivers/vc4/vc4_qir.c
+++ b/lib/mesa/src/gallium/drivers/vc4/vc4_qir.c
@@ -808,7 +808,6 @@ qir_SF(struct vc4_compile *c, struct qreg src)
             !c->defs[src.index] ||
             last_inst != c->defs[src.index]) {
                 last_inst = qir_MOV_dest(c, qir_reg(QFILE_NULL, 0), src);
-                last_inst = (struct qinst *)c->cur_block->instructions.prev;
         }
         last_inst->sf = true;
 }
diff --git a/lib/mesa/src/gallium/drivers/vc4/vc4_qir_schedule.c b/lib/mesa/src/gallium/drivers/vc4/vc4_qir_schedule.c
index fdd922fde..7286f731f 100644
--- a/lib/mesa/src/gallium/drivers/vc4/vc4_qir_schedule.c
+++ b/lib/mesa/src/gallium/drivers/vc4/vc4_qir_schedule.c
@@ -96,7 +96,7 @@ add_dep(enum direction dir,
                 after = t;
         }
 
-        dag_add_edge(&after->dag, &before->dag, NULL);
+        dag_add_edge(&after->dag, &before->dag, 0);
 }
 
 static void
diff --git a/lib/mesa/src/gallium/drivers/vc4/vc4_qpu_schedule.c b/lib/mesa/src/gallium/drivers/vc4/vc4_qpu_schedule.c
index cfacc23b3..055bd0395 100644
--- a/lib/mesa/src/gallium/drivers/vc4/vc4_qpu_schedule.c
+++ b/lib/mesa/src/gallium/drivers/vc4/vc4_qpu_schedule.c
@@ -99,7 +99,7 @@ add_dep(struct schedule_state *state,
         bool write)
 {
         bool write_after_read = !write && state->dir == R;
-        void *edge_data = (void *)(uintptr_t)write_after_read;
+        uintptr_t edge_data = write_after_read;
 
         if (!before || !after)
                 return;
diff --git a/lib/mesa/src/gallium/drivers/vc4/vc4_resource.c b/lib/mesa/src/gallium/drivers/vc4/vc4_resource.c
index 052588e49..28ca799ed 100644
--- a/lib/mesa/src/gallium/drivers/vc4/vc4_resource.c
+++ b/lib/mesa/src/gallium/drivers/vc4/vc4_resource.c
@@ -153,14 +153,12 @@ vc4_resource_transfer_map(struct pipe_context *pctx,
                 rsc->initialized_buffers = ~0;
         }
 
-        trans = slab_alloc(&vc4->transfer_pool);
+        trans = slab_zalloc(&vc4->transfer_pool);
         if (!trans)
                 return NULL;
 
         /* XXX: Handle DONTBLOCK, DISCARD_RANGE, PERSISTENT, COHERENT. */
 
-        /* slab_alloc_st() doesn't zero: */
-        memset(trans, 0, sizeof(*trans));
         ptrans = &trans->base;
 
         pipe_resource_reference(&ptrans->resource, prsc);
@@ -187,19 +185,8 @@ vc4_resource_transfer_map(struct pipe_context *pctx,
                 if (usage & PIPE_MAP_DIRECTLY)
                         return NULL;
 
-                if (format == PIPE_FORMAT_ETC1_RGB8) {
-                        /* ETC1 is arranged as 64-bit blocks, where each block
-                         * is 4x4 pixels.  Texture tiling operates on the
-                         * 64-bit block the way it would an uncompressed
-                         * pixels.
-                         */
-                        assert(!(ptrans->box.x & 3));
-                        assert(!(ptrans->box.y & 3));
-                        ptrans->box.x >>= 2;
-                        ptrans->box.y >>= 2;
-                        ptrans->box.width = (ptrans->box.width + 3) >> 2;
-                        ptrans->box.height = (ptrans->box.height + 3) >> 2;
-                }
+                /* Our load/store routines work on entire compressed blocks. */
+                u_box_pixels_to_blocks(&ptrans->box, &ptrans->box, format);
 
                 ptrans->stride = ptrans->box.width * rsc->cpp;
                 ptrans->layer_stride = ptrans->stride * ptrans->box.height;
@@ -1152,7 +1139,8 @@ vc4_resource_screen_init(struct pipe_screen *pscreen)
         pscreen->resource_destroy = vc4_resource_destroy;
         pscreen->transfer_helper = u_transfer_helper_create(&transfer_vtbl,
                                                             false, false,
-                                                            false, true);
+                                                            false, true,
+                                                            false);
 
         /* Test if the kernel has GET_TILING; it will return -EINVAL if the
          * ioctl does not exist, but -ENOENT if we pass an impossible handle.
diff --git a/lib/mesa/src/gallium/drivers/vc4/vc4_screen.c b/lib/mesa/src/gallium/drivers/vc4/vc4_screen.c
index 40d49cc6b..5a85fedc4 100644
--- a/lib/mesa/src/gallium/drivers/vc4/vc4_screen.c
+++ b/lib/mesa/src/gallium/drivers/vc4/vc4_screen.c
@@ -158,13 +158,12 @@ vc4_screen_get_param(struct pipe_screen *pscreen, enum pipe_cap param)
                                        DRM_VC4_PARAM_SUPPORTS_FIXED_RCL_ORDER);
 
                 /* lying for GL 2.0 */
-        case PIPE_CAP_OCCLUSION_QUERY:
         case PIPE_CAP_POINT_SPRITE:
                 return 1;
 
-        case PIPE_CAP_TGSI_FS_COORD_ORIGIN_UPPER_LEFT:
-        case PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_HALF_INTEGER:
-        case PIPE_CAP_TGSI_FS_FACE_IS_INTEGER_SYSVAL:
+        case PIPE_CAP_FS_COORD_ORIGIN_UPPER_LEFT:
+        case PIPE_CAP_FS_COORD_PIXEL_CENTER_HALF_INTEGER:
+        case PIPE_CAP_FS_FACE_IS_INTEGER_SYSVAL:
                 return 1;
 
         case PIPE_CAP_MIXED_FRAMEBUFFER_SIZES:
@@ -202,6 +201,7 @@ vc4_screen_get_param(struct pipe_screen *pscreen, enum pipe_cap param)
         case PIPE_CAP_VERTEX_COLOR_CLAMPED:
         case PIPE_CAP_TWO_SIDED_COLOR:
         case PIPE_CAP_TEXRECT:
+        case PIPE_CAP_IMAGE_STORE_FORMATTED:
                 return 0;
 
         case PIPE_CAP_SUPPORTED_PRIM_MODES:
@@ -216,12 +216,22 @@ static float
 vc4_screen_get_paramf(struct pipe_screen *pscreen, enum pipe_capf param)
 {
         switch (param) {
+        case PIPE_CAPF_MIN_LINE_WIDTH:
+        case PIPE_CAPF_MIN_LINE_WIDTH_AA:
+        case PIPE_CAPF_MIN_POINT_SIZE:
+        case PIPE_CAPF_MIN_POINT_SIZE_AA:
+           return 1;
+
+        case PIPE_CAPF_POINT_SIZE_GRANULARITY:
+        case PIPE_CAPF_LINE_WIDTH_GRANULARITY:
+           return 0.1;
+
         case PIPE_CAPF_MAX_LINE_WIDTH:
         case PIPE_CAPF_MAX_LINE_WIDTH_AA:
                 return 32;
 
-        case PIPE_CAPF_MAX_POINT_WIDTH:
-        case PIPE_CAPF_MAX_POINT_WIDTH_AA:
+        case PIPE_CAPF_MAX_POINT_SIZE:
+        case PIPE_CAPF_MAX_POINT_SIZE_AA:
                 return 512.0f;
 
         case PIPE_CAPF_MAX_TEXTURE_ANISOTROPY:
diff --git a/lib/mesa/src/gallium/drivers/vc4/vc4_tiling_lt.c b/lib/mesa/src/gallium/drivers/vc4/vc4_tiling_lt.c
index d2a84bb35..867bff15a 100644
--- a/lib/mesa/src/gallium/drivers/vc4/vc4_tiling_lt.c
+++ b/lib/mesa/src/gallium/drivers/vc4/vc4_tiling_lt.c
@@ -42,12 +42,6 @@
 #define NEON_TAG(x) x ## _base
 #endif
 
-static inline uint32_t
-align_down(uint32_t val, uint32_t align)
-{
-        return val & ~(align - 1);
-}
-
 /** Returns the stride in bytes of a 64-byte microtile. */
 static uint32_t
 vc4_utile_stride(int cpp)