diff options
author | Jonathan Gray <jsg@cvs.openbsd.org> | 2018-01-08 05:41:34 +0000 |
---|---|---|
committer | Jonathan Gray <jsg@cvs.openbsd.org> | 2018-01-08 05:41:34 +0000 |
commit | c00801de923e125863aaf8180439d59d610b2517 (patch) | |
tree | e2896aa2785f3cf2151aeeb3c95fb5cc09a2fe02 /lib/mesa/src/gallium/winsys/amdgpu/drm/amdgpu_cs.h | |
parent | be30e6efb92db21299b936c0e068e7088941e9c9 (diff) |
Revert to Mesa 13.0.6 again.
Corruption has again been reported on Intel hardware running Xorg with
the modesetting driver (which uses OpenGL based acceleration instead of
SNA acceleration the intel driver defaults to).
Reported in various forms on Sandy Bridge (X220), Ivy Bridge (X230) and
Haswell (X240). Confirmed to not occur with the intel driver but the
xserver was changed to default to the modesetting driver on >= gen4
hardware (except Ironlake).
One means of triggering this is to open a large pdf with xpdf on an
idle machine and highlight a section of the document.
There have been reports of gpu hangs on gen4 intel hardware
(T500 with GM45, X61 with 965GM) when starting Xorg as well.
Diffstat (limited to 'lib/mesa/src/gallium/winsys/amdgpu/drm/amdgpu_cs.h')
-rw-r--r-- | lib/mesa/src/gallium/winsys/amdgpu/drm/amdgpu_cs.h | 27 |
1 files changed, 4 insertions, 23 deletions
diff --git a/lib/mesa/src/gallium/winsys/amdgpu/drm/amdgpu_cs.h b/lib/mesa/src/gallium/winsys/amdgpu/drm/amdgpu_cs.h index d83c1e0fe..5f181a5da 100644 --- a/lib/mesa/src/gallium/winsys/amdgpu/drm/amdgpu_cs.h +++ b/lib/mesa/src/gallium/winsys/amdgpu/drm/amdgpu_cs.h @@ -41,8 +41,6 @@ struct amdgpu_ctx { amdgpu_bo_handle user_fence_bo; uint64_t *user_fence_cpu_address_base; int refcount; - unsigned initial_num_total_rejected_cs; - unsigned num_rejected_cs; }; struct amdgpu_cs_buffer { @@ -84,30 +82,17 @@ struct amdgpu_cs_context { /* Buffers. */ unsigned max_real_buffers; unsigned num_real_buffers; - struct amdgpu_cs_buffer *real_buffers; - - unsigned max_real_submit; amdgpu_bo_handle *handles; uint8_t *flags; + struct amdgpu_cs_buffer *real_buffers; unsigned num_slab_buffers; unsigned max_slab_buffers; struct amdgpu_cs_buffer *slab_buffers; - unsigned num_sparse_buffers; - unsigned max_sparse_buffers; - struct amdgpu_cs_buffer *sparse_buffers; - int buffer_indices_hashlist[4096]; - struct amdgpu_winsys_bo *last_added_bo; - unsigned last_added_bo_index; - unsigned last_added_bo_usage; - uint64_t last_added_bo_priority_usage; - - struct pipe_fence_handle **fence_dependencies; - unsigned num_fence_dependencies; - unsigned max_fence_dependencies; + unsigned max_dependencies; struct pipe_fence_handle *fence; @@ -232,9 +217,8 @@ amdgpu_bo_is_referenced_by_cs_with_usage(struct amdgpu_cs *cs, if (index == -1) return false; - buffer = bo->bo ? &cs->csc->real_buffers[index] : - bo->sparse ? &cs->csc->sparse_buffers[index] : - &cs->csc->slab_buffers[index]; + buffer = bo->bo ? &cs->csc->real_buffers[index] + : &cs->csc->slab_buffers[index]; return (buffer->usage & usage) != 0; } @@ -247,9 +231,6 @@ amdgpu_bo_is_referenced_by_any_cs(struct amdgpu_winsys_bo *bo) bool amdgpu_fence_wait(struct pipe_fence_handle *fence, uint64_t timeout, bool absolute); -void amdgpu_add_fences(struct amdgpu_winsys_bo *bo, - unsigned num_fences, - struct pipe_fence_handle **fences); void amdgpu_cs_sync_flush(struct radeon_winsys_cs *rcs); void amdgpu_cs_init_functions(struct amdgpu_winsys *ws); void amdgpu_cs_submit_ib(void *job, int thread_index); |