Merge Mesa 22.1.7

4 files changed, 38 insertions, 2 deletions

diff --git a/lib/mesa/src/gallium/winsys/svga/drm/vmw_screen.c b/lib/mesa/src/gallium/winsys/svga/drm/vmw_screen.c
index 60051bbdf..1451a96ca 100644
--- a/lib/mesa/src/gallium/winsys/svga/drm/vmw_screen.c
+++ b/lib/mesa/src/gallium/winsys/svga/drm/vmw_screen.c
@@ -158,7 +158,12 @@ vmw_winsys_create( int fd )
    vws->base.have_gb_dma = !vws->force_coherent;
    vws->base.need_to_rebind_resources = FALSE;
    vws->base.have_transfer_from_buffer_cmd = vws->base.have_vgpu10;
-   vws->base.have_constant_buffer_offset_cmd = FALSE;
+   vws->base.have_constant_buffer_offset_cmd =
+      vws->ioctl.have_drm_2_20 && vws->base.have_sm5;
+   vws->base.have_index_vertex_buffer_offset_cmd = FALSE;
+   vws->base.have_rasterizer_state_v2_cmd =
+      vws->ioctl.have_drm_2_20 && vws->base.have_sm5;
+
    getenv_val = getenv("SVGA_FORCE_KERNEL_UNMAPS");
    vws->cache_maps = !getenv_val || strcmp(getenv_val, "0") == 0;
    vws->fence_ops = vmw_fence_ops_create(vws);
diff --git a/lib/mesa/src/gallium/winsys/svga/drm/vmw_screen.h b/lib/mesa/src/gallium/winsys/svga/drm/vmw_screen.h
index 170892130..127ef16d6 100644
--- a/lib/mesa/src/gallium/winsys/svga/drm/vmw_screen.h
+++ b/lib/mesa/src/gallium/winsys/svga/drm/vmw_screen.h
@@ -82,6 +82,7 @@ struct vmw_winsys_screen
       boolean have_drm_2_17;
       boolean have_drm_2_18;
       boolean have_drm_2_19;
+      boolean have_drm_2_20;
    } ioctl;
 
    struct {
diff --git a/lib/mesa/src/gallium/winsys/svga/drm/vmw_screen_ioctl.c b/lib/mesa/src/gallium/winsys/svga/drm/vmw_screen_ioctl.c
index c470b7ba5..7b83cbce2 100644
--- a/lib/mesa/src/gallium/winsys/svga/drm/vmw_screen_ioctl.c
+++ b/lib/mesa/src/gallium/winsys/svga/drm/vmw_screen_ioctl.c
@@ -1005,6 +1005,8 @@ vmw_ioctl_init(struct vmw_winsys_screen *vws)
       (version->version_major == 2 && version->version_minor > 17);
    vws->ioctl.have_drm_2_19 = version->version_major > 2 ||
       (version->version_major == 2 && version->version_minor > 18);
+   vws->ioctl.have_drm_2_20 = version->version_major > 2 ||
+      (version->version_major == 2 && version->version_minor > 19);
 
    vws->ioctl.drm_execbuf_version = vws->ioctl.have_drm_2_9 ? 2 : 1;
 
@@ -1051,6 +1053,16 @@ vmw_ioctl_init(struct vmw_winsys_screen *vws)
    vws->base.have_sm4_1 = FALSE;
    vws->base.have_intra_surface_copy = FALSE;
 
+   memset(&gp_arg, 0, sizeof(gp_arg));
+   gp_arg.param = DRM_VMW_PARAM_DEVICE_ID;
+   ret = drmCommandWriteRead(vws->ioctl.drm_fd, DRM_VMW_GET_PARAM,
+              &gp_arg, sizeof(gp_arg));
+   if (ret || gp_arg.value == 0) {
+      vws->base.device_id = 0x0405; /* assume SVGA II */
+   } else {
+      vws->base.device_id = gp_arg.value;
+   }
+
    if (vws->base.have_gb_objects) {
       memset(&gp_arg, 0, sizeof(gp_arg));
       gp_arg.param = DRM_VMW_PARAM_MAX_MOB_MEMORY;
@@ -1125,6 +1137,16 @@ vmw_ioctl_init(struct vmw_winsys_screen *vws)
          }
       }
 
+      if (vws->ioctl.have_drm_2_20 && vws->base.have_sm5) {
+         memset(&gp_arg, 0, sizeof(gp_arg));
+         gp_arg.param = DRM_VMW_PARAM_GL43;
+         ret = drmCommandWriteRead(vws->ioctl.drm_fd, DRM_VMW_GET_PARAM,
+                                   &gp_arg, sizeof(gp_arg));
+         if (ret == 0 && gp_arg.value != 0) {
+            vws->base.have_gl43 = TRUE;
+         }
+      }
+
       memset(&gp_arg, 0, sizeof(gp_arg));
       gp_arg.param = DRM_VMW_PARAM_3D_CAPS_SIZE;
       ret = drmCommandWriteRead(vws->ioctl.drm_fd, DRM_VMW_GET_PARAM,
diff --git a/lib/mesa/src/gallium/winsys/svga/drm/vmwgfx_drm.h b/lib/mesa/src/gallium/winsys/svga/drm/vmwgfx_drm.h
index 9078775fe..26549c86a 100644
--- a/lib/mesa/src/gallium/winsys/svga/drm/vmwgfx_drm.h
+++ b/lib/mesa/src/gallium/winsys/svga/drm/vmwgfx_drm.h
@@ -1,6 +1,6 @@
 /**************************************************************************
  *
- * Copyright © 2009-2015 VMware, Inc., Palo Alto, CA., USA
+ * Copyright © 2009-2022 VMware, Inc., Palo Alto, CA., USA
  * All Rights Reserved.
  *
  * Permission is hereby granted, free of charge, to any person obtaining a
@@ -92,6 +92,12 @@ extern "C" {
  *
  * DRM_VMW_PARAM_SM5
  * SM5 support is enabled.
+ *
+ * DRM_VMW_PARAM_GL43
+ * SM5.1+GL4.3 support is enabled.
+ *
+ * DRM_VMW_PARAM_DEVICE_ID
+ * PCI ID of the underlying SVGA device.
  */
 
 #define DRM_VMW_PARAM_NUM_STREAMS      0
@@ -110,6 +116,8 @@ extern "C" {
 #define DRM_VMW_PARAM_HW_CAPS2         13
 #define DRM_VMW_PARAM_SM4_1            14
 #define DRM_VMW_PARAM_SM5              15
+#define DRM_VMW_PARAM_GL43             16
+#define DRM_VMW_PARAM_DEVICE_ID        17
 
 /**
  * enum drm_vmw_handle_type - handle type for ref ioctls