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authorJonathan Gray <jsg@cvs.openbsd.org>2020-01-22 02:49:53 +0000
committerJonathan Gray <jsg@cvs.openbsd.org>2020-01-22 02:49:53 +0000
commitd264279e28002d81821c883795911844a4c01a2c (patch)
treeb0481616eda55b543a0dc1487d096c3239885c41 /lib/mesa/src/gallium/winsys/svga
parentfdcc03929065b5bf5dd93553db219ea3e05c8c34 (diff)
Merge Mesa 19.2.8
Diffstat (limited to 'lib/mesa/src/gallium/winsys/svga')
-rw-r--r--lib/mesa/src/gallium/winsys/svga/drm/Makefile.am39
-rw-r--r--lib/mesa/src/gallium/winsys/svga/drm/Makefile.in905
-rw-r--r--lib/mesa/src/gallium/winsys/svga/drm/vmw_context.c39
-rw-r--r--lib/mesa/src/gallium/winsys/svga/drm/vmw_screen.c7
-rw-r--r--lib/mesa/src/gallium/winsys/svga/drm/vmw_screen.h3
-rw-r--r--lib/mesa/src/gallium/winsys/svga/drm/vmw_screen_ioctl.c38
-rw-r--r--lib/mesa/src/gallium/winsys/svga/drm/vmw_screen_svga.c5
-rw-r--r--lib/mesa/src/gallium/winsys/svga/drm/vmw_surface.c31
-rw-r--r--lib/mesa/src/gallium/winsys/svga/drm/vmw_surface.h4
-rw-r--r--lib/mesa/src/gallium/winsys/svga/drm/vmwgfx_drm.h358
10 files changed, 251 insertions, 1178 deletions
diff --git a/lib/mesa/src/gallium/winsys/svga/drm/Makefile.am b/lib/mesa/src/gallium/winsys/svga/drm/Makefile.am
deleted file mode 100644
index dfa973676..000000000
--- a/lib/mesa/src/gallium/winsys/svga/drm/Makefile.am
+++ /dev/null
@@ -1,39 +0,0 @@
-# Copyright © 2012 Intel Corporation
-#
-# Permission is hereby granted, free of charge, to any person obtaining a
-# copy of this software and associated documentation files (the "Software"),
-# to deal in the Software without restriction, including without limitation
-# the rights to use, copy, modify, merge, publish, distribute, sublicense,
-# and/or sell copies of the Software, and to permit persons to whom the
-# Software is furnished to do so, subject to the following conditions:
-#
-# The above copyright notice and this permission notice (including the next
-# paragraph) shall be included in all copies or substantial portions of the
-# Software.
-#
-# THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
-# EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
-# MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
-# NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
-# HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
-# WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
-# OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
-# DEALINGS IN THE SOFTWARE.
-
-include Makefile.sources
-include $(top_srcdir)/src/gallium/Automake.inc
-
-AM_CFLAGS = \
- -I$(top_srcdir)/src/gallium/drivers/svga \
- -I$(top_srcdir)/src/gallium/drivers/svga/include \
- $(GALLIUM_WINSYS_CFLAGS) \
- $(LIBDRM_CFLAGS)
-
-#On some systems -std= must be added to CFLAGS to be the last -std=
-CFLAGS += -std=gnu99
-
-noinst_LTLIBRARIES = libsvgadrm.la
-
-libsvgadrm_la_SOURCES = $(C_SOURCES)
-
-EXTRA_DIST = SConscript
diff --git a/lib/mesa/src/gallium/winsys/svga/drm/Makefile.in b/lib/mesa/src/gallium/winsys/svga/drm/Makefile.in
deleted file mode 100644
index 7580f6971..000000000
--- a/lib/mesa/src/gallium/winsys/svga/drm/Makefile.in
+++ /dev/null
@@ -1,905 +0,0 @@
-# Makefile.in generated by automake 1.12.6 from Makefile.am.
-# @configure_input@
-
-# Copyright (C) 1994-2012 Free Software Foundation, Inc.
-
-# This Makefile.in is free software; the Free Software Foundation
-# gives unlimited permission to copy and/or distribute it,
-# with or without modifications, as long as this notice is preserved.
-
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY, to the extent permitted by law; without
-# even the implied warranty of MERCHANTABILITY or FITNESS FOR A
-# PARTICULAR PURPOSE.
-
-@SET_MAKE@
-
-# Copyright © 2012 Intel Corporation
-#
-# Permission is hereby granted, free of charge, to any person obtaining a
-# copy of this software and associated documentation files (the "Software"),
-# to deal in the Software without restriction, including without limitation
-# the rights to use, copy, modify, merge, publish, distribute, sublicense,
-# and/or sell copies of the Software, and to permit persons to whom the
-# Software is furnished to do so, subject to the following conditions:
-#
-# The above copyright notice and this permission notice (including the next
-# paragraph) shall be included in all copies or substantial portions of the
-# Software.
-#
-# THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
-# EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
-# MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
-# NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
-# HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
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-# DEALINGS IN THE SOFTWARE.
-
-VPATH = @srcdir@
-am__make_dryrun = \
- { \
- am__dry=no; \
- case $$MAKEFLAGS in \
- *\\[\ \ ]*) \
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-transform = $(program_transform_name)
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-@HAVE_LIBDRM_TRUE@am__append_1 = \
-@HAVE_LIBDRM_TRUE@ $(LIBDRM_LIBS)
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-@HAVE_PLATFORM_ANDROID_TRUE@am__append_2 = \
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-@HAVE_DRISW_TRUE@am__append_3 = \
-@HAVE_DRISW_TRUE@ $(top_builddir)/src/gallium/winsys/sw/dri/libswdri.la
-
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-@HAVE_DRISW_KMS_TRUE@ $(LIBDRM_LIBS)
-
-subdir = src/gallium/winsys/svga/drm
-ACLOCAL_M4 = $(top_srcdir)/aclocal.m4
-am__aclocal_m4_deps = $(top_srcdir)/m4/ax_check_compile_flag.m4 \
- $(top_srcdir)/m4/ax_check_gnu_make.m4 \
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- $(top_srcdir)/m4/ax_pthread.m4 $(top_srcdir)/m4/libtool.m4 \
- $(top_srcdir)/m4/ltoptions.m4 $(top_srcdir)/m4/ltsugar.m4 \
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-am__configure_deps = $(am__aclocal_m4_deps) $(CONFIGURE_DEPENDENCIES) \
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-libsvgadrm_la_LIBADD =
-am__objects_1 = pb_buffer_simple_fenced.lo vmw_buffer.lo \
- vmw_context.lo vmw_fence.lo vmw_msg.lo vmw_screen.lo \
- vmw_screen_dri.lo vmw_screen_ioctl.lo vmw_screen_pools.lo \
- vmw_screen_svga.lo vmw_surface.lo vmw_shader.lo vmw_query.lo
-am_libsvgadrm_la_OBJECTS = $(am__objects_1)
-libsvgadrm_la_OBJECTS = $(am_libsvgadrm_la_OBJECTS)
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-am__v_CC_0 = @echo " CC " $@;
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-am__v_CCLD_0 = @echo " CCLD " $@;
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- $(GALLIUM_WINSYS_CFLAGS) \
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-
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diff --git a/lib/mesa/src/gallium/winsys/svga/drm/vmw_context.c b/lib/mesa/src/gallium/winsys/svga/drm/vmw_context.c
index c0ee833e3..6ab43cb99 100644
--- a/lib/mesa/src/gallium/winsys/svga/drm/vmw_context.c
+++ b/lib/mesa/src/gallium/winsys/svga/drm/vmw_context.c
@@ -161,10 +161,10 @@ vmw_svga_winsys_context(struct svga_winsys_context *swc)
}
-static inline unsigned
+static inline enum pb_usage_flags
vmw_translate_to_pb_flags(unsigned flags)
{
- unsigned f = 0;
+ enum pb_usage_flags f = 0;
if (flags & SVGA_RELOC_READ)
f |= PB_USAGE_GPU_READ;
@@ -370,24 +370,15 @@ vmw_swc_add_validate_buffer(struct vmw_svga_winsys_context *vswc,
struct pb_buffer *pb_buf,
unsigned flags)
{
- enum pipe_error ret;
+ ASSERTED enum pipe_error ret;
unsigned translated_flags;
+ boolean already_present;
- /*
- * TODO: Update pb_validate to provide a similar functionality
- * (Check buffer already present before adding)
- */
- if (util_hash_table_get(vswc->hash, pb_buf) != pb_buf) {
- translated_flags = vmw_translate_to_pb_flags(flags);
- ret = pb_validate_add_buffer(vswc->validate, pb_buf, translated_flags);
- /* TODO: Update pipebuffer to reserve buffers and not fail here */
- assert(ret == PIPE_OK);
- (void)ret;
- (void)util_hash_table_set(vswc->hash, pb_buf, pb_buf);
- return TRUE;
- }
-
- return FALSE;
+ translated_flags = vmw_translate_to_pb_flags(flags);
+ ret = pb_validate_add_buffer(vswc->validate, pb_buf, translated_flags,
+ vswc->hash, &already_present);
+ assert(ret == PIPE_OK);
+ return !already_present;
}
static void
@@ -566,7 +557,15 @@ vmw_swc_surface_relocation(struct svga_winsys_context *swc,
mtx_lock(&vsurf->mutex);
assert(vsurf->buf != NULL);
-
+
+ /*
+ * An internal reloc means that the surface transfer direction
+ * is opposite to the MOB transfer direction...
+ */
+ if ((flags & SVGA_RELOC_INTERNAL) &&
+ (flags & (SVGA_RELOC_READ | SVGA_RELOC_WRITE)) !=
+ (SVGA_RELOC_READ | SVGA_RELOC_WRITE))
+ flags ^= (SVGA_RELOC_READ | SVGA_RELOC_WRITE);
vmw_swc_mob_relocation(swc, mobid, NULL, (struct svga_winsys_buffer *)
vsurf->buf, 0, flags);
mtx_unlock(&vsurf->mutex);
@@ -816,7 +815,6 @@ vmw_svga_winsys_context_create(struct svga_winsys_screen *sws)
vswc->base.flush = vmw_swc_flush;
vswc->base.surface_map = vmw_svga_winsys_surface_map;
vswc->base.surface_unmap = vmw_svga_winsys_surface_unmap;
- vswc->base.surface_invalidate = vmw_svga_winsys_surface_invalidate;
vswc->base.shader_create = vmw_svga_winsys_vgpu10_shader_create;
vswc->base.shader_destroy = vmw_svga_winsys_vgpu10_shader_destroy;
@@ -854,6 +852,7 @@ vmw_svga_winsys_context_create(struct svga_winsys_screen *sws)
vswc->fctx = debug_flush_ctx_create(TRUE, VMW_DEBUG_FLUSH_STACK);
#endif
+ vswc->base.force_coherent = vws->force_coherent;
return &vswc->base;
out_no_hash:
diff --git a/lib/mesa/src/gallium/winsys/svga/drm/vmw_screen.c b/lib/mesa/src/gallium/winsys/svga/drm/vmw_screen.c
index e122e0c99..e3440bfd9 100644
--- a/lib/mesa/src/gallium/winsys/svga/drm/vmw_screen.c
+++ b/lib/mesa/src/gallium/winsys/svga/drm/vmw_screen.c
@@ -90,12 +90,13 @@ vmw_winsys_create( int fd )
vws->device = stat_buf.st_rdev;
vws->open_count = 1;
vws->ioctl.drm_fd = fcntl(fd, F_DUPFD_CLOEXEC, 3);
- vws->base.have_gb_dma = TRUE;
- vws->base.need_to_rebind_resources = FALSE;
-
+ vws->force_coherent = FALSE;
if (!vmw_ioctl_init(vws))
goto out_no_ioctl;
+ vws->base.have_gb_dma = !vws->force_coherent;
+ vws->base.need_to_rebind_resources = FALSE;
+ vws->base.have_transfer_from_buffer_cmd = vws->base.have_vgpu10;
vws->fence_ops = vmw_fence_ops_create(vws);
if (!vws->fence_ops)
goto out_no_fence_ops;
diff --git a/lib/mesa/src/gallium/winsys/svga/drm/vmw_screen.h b/lib/mesa/src/gallium/winsys/svga/drm/vmw_screen.h
index a87c087d9..e0b1bb33b 100644
--- a/lib/mesa/src/gallium/winsys/svga/drm/vmw_screen.h
+++ b/lib/mesa/src/gallium/winsys/svga/drm/vmw_screen.h
@@ -41,6 +41,7 @@
#include "svga_winsys.h"
#include "pipebuffer/pb_buffer_fenced.h"
#include <os/os_thread.h>
+#include <sys/types.h>
#define VMW_GMR_POOL_SIZE (16*1024*1024)
#define VMW_QUERY_POOL_SIZE (8192)
@@ -103,6 +104,8 @@ struct vmw_winsys_screen
cnd_t cs_cond;
mtx_t cs_mutex;
+
+ boolean force_coherent;
};
diff --git a/lib/mesa/src/gallium/winsys/svga/drm/vmw_screen_ioctl.c b/lib/mesa/src/gallium/winsys/svga/drm/vmw_screen_ioctl.c
index 581083f52..2e84c811e 100644
--- a/lib/mesa/src/gallium/winsys/svga/drm/vmw_screen_ioctl.c
+++ b/lib/mesa/src/gallium/winsys/svga/drm/vmw_screen_ioctl.c
@@ -107,7 +107,7 @@ vmw_ioctl_extended_context_create(struct vmw_winsys_screen *vws,
VMW_FUNC;
memset(&c_arg, 0, sizeof(c_arg));
- c_arg.req = (vgpu10 ? drm_vmw_context_vgpu10 : drm_vmw_context_legacy);
+ c_arg.req = (vgpu10 ? drm_vmw_context_dx : drm_vmw_context_legacy);
ret = drmCommandWriteRead(vws->ioctl.drm_fd,
DRM_VMW_CREATE_EXTENDED_CONTEXT,
&c_arg, sizeof(c_arg));
@@ -246,6 +246,9 @@ vmw_ioctl_gb_surface_create(struct vmw_winsys_screen *vws,
if (usage & SVGA_SURFACE_USAGE_SHARED)
req->base.drm_surface_flags |= drm_vmw_surface_flag_shareable;
+ if ((usage & SVGA_SURFACE_USAGE_COHERENT) || vws->force_coherent)
+ req->base.drm_surface_flags |= drm_vmw_surface_flag_coherent;
+
req->base.drm_surface_flags |= drm_vmw_surface_flag_create_buffer;
req->base.base_size.width = size.width;
req->base.base_size.height = size.height;
@@ -565,7 +568,9 @@ vmw_ioctl_command(struct vmw_winsys_screen *vws, int32_t cid,
offsetof(struct drm_vmw_execbuf_arg, context_handle);
do {
ret = drmCommandWrite(vws->ioctl.drm_fd, DRM_VMW_EXECBUF, &arg, argsize);
- } while(ret == -ERESTART);
+ if (ret == -EBUSY)
+ usleep(1000);
+ } while(ret == -ERESTART || ret == -EBUSY);
if (ret) {
vmw_error("%s error %s.\n", __FUNCTION__, strerror(-ret));
abort();
@@ -968,6 +973,8 @@ vmw_ioctl_init(struct vmw_winsys_screen *vws)
drmVersionPtr version;
boolean drm_gb_capable;
boolean have_drm_2_5;
+ boolean have_drm_2_16;
+ const char *getenv_val;
VMW_FUNC;
@@ -983,6 +990,8 @@ vmw_ioctl_init(struct vmw_winsys_screen *vws)
(version->version_major == 2 && version->version_minor > 8);
vws->ioctl.have_drm_2_15 = version->version_major > 2 ||
(version->version_major == 2 && version->version_minor > 14);
+ have_drm_2_16 = version->version_major > 2 ||
+ (version->version_major == 2 && version->version_minor > 15);
vws->ioctl.drm_execbuf_version = vws->ioctl.have_drm_2_9 ? 2 : 1;
@@ -1007,17 +1016,21 @@ vmw_ioctl_init(struct vmw_winsys_screen *vws)
goto out_no_3d;
}
vws->ioctl.hwversion = gp_arg.value;
-
- memset(&gp_arg, 0, sizeof(gp_arg));
- gp_arg.param = DRM_VMW_PARAM_HW_CAPS;
- ret = drmCommandWriteRead(vws->ioctl.drm_fd, DRM_VMW_GET_PARAM,
- &gp_arg, sizeof(gp_arg));
+ getenv_val = getenv("SVGA_FORCE_HOST_BACKED");
+ if (!getenv_val || strcmp(getenv_val, "0") == 0) {
+ memset(&gp_arg, 0, sizeof(gp_arg));
+ gp_arg.param = DRM_VMW_PARAM_HW_CAPS;
+ ret = drmCommandWriteRead(vws->ioctl.drm_fd, DRM_VMW_GET_PARAM,
+ &gp_arg, sizeof(gp_arg));
+ } else {
+ ret = -EINVAL;
+ }
if (ret)
vws->base.have_gb_objects = FALSE;
else
vws->base.have_gb_objects =
!!(gp_arg.value & (uint64_t) SVGA_CAP_GBOBJECTS);
-
+
if (vws->base.have_gb_objects && !drm_gb_capable)
goto out_no_3d;
@@ -1053,7 +1066,7 @@ vmw_ioctl_init(struct vmw_winsys_screen *vws)
if (vws->ioctl.have_drm_2_9) {
memset(&gp_arg, 0, sizeof(gp_arg));
- gp_arg.param = DRM_VMW_PARAM_VGPU10;
+ gp_arg.param = DRM_VMW_PARAM_DX;
ret = drmCommandWriteRead(vws->ioctl.drm_fd, DRM_VMW_GET_PARAM,
&gp_arg, sizeof(gp_arg));
if (ret == 0 && gp_arg.value != 0) {
@@ -1102,6 +1115,13 @@ vmw_ioctl_init(struct vmw_winsys_screen *vws)
vws->ioctl.num_cap_3d = size / sizeof(uint32_t);
else
vws->ioctl.num_cap_3d = SVGA3D_DEVCAP_MAX;
+
+ if (have_drm_2_16) {
+ vws->base.have_coherent = TRUE;
+ getenv_val = getenv("SVGA_FORCE_COHERENT");
+ if (getenv_val && strcmp(getenv_val, "0") != 0)
+ vws->force_coherent = TRUE;
+ }
} else {
vws->ioctl.num_cap_3d = SVGA3D_DEVCAP_MAX;
diff --git a/lib/mesa/src/gallium/winsys/svga/drm/vmw_screen_svga.c b/lib/mesa/src/gallium/winsys/svga/drm/vmw_screen_svga.c
index cd3f21f60..fb0bee778 100644
--- a/lib/mesa/src/gallium/winsys/svga/drm/vmw_screen_svga.c
+++ b/lib/mesa/src/gallium/winsys/svga/drm/vmw_screen_svga.c
@@ -80,8 +80,11 @@ vmw_svga_winsys_buffer_create(struct svga_winsys_screen *sws,
provider = vws->pools.query_fenced;
} else if (usage == SVGA_BUFFER_USAGE_SHADER) {
provider = vws->pools.mob_shader_slab_fenced;
- } else
+ } else {
+ if (size > VMW_GMR_POOL_SIZE)
+ return NULL;
provider = vws->pools.gmr_fenced;
+ }
assert(provider);
buffer = provider->create_buffer(provider, size, &desc.pb_desc);
diff --git a/lib/mesa/src/gallium/winsys/svga/drm/vmw_surface.c b/lib/mesa/src/gallium/winsys/svga/drm/vmw_surface.c
index 04aa93278..6aa09e11b 100644
--- a/lib/mesa/src/gallium/winsys/svga/drm/vmw_surface.c
+++ b/lib/mesa/src/gallium/winsys/svga/drm/vmw_surface.c
@@ -45,21 +45,14 @@ vmw_svga_winsys_surface_map(struct svga_winsys_context *swc,
struct pb_buffer *pb_buf;
uint32_t pb_flags;
struct vmw_winsys_screen *vws = vsrf->screen;
-
+
*retry = FALSE;
assert((flags & (PIPE_TRANSFER_READ | PIPE_TRANSFER_WRITE)) != 0);
mtx_lock(&vsrf->mutex);
if (vsrf->mapcount) {
- /*
- * Only allow multiple readers to map.
- */
- if ((flags & PIPE_TRANSFER_WRITE) ||
- (vsrf->map_mode & PIPE_TRANSFER_WRITE))
- goto out_unlock;
-
- data = vsrf->data;
- goto out_mapped;
+ /* Other mappers will get confused if we discard. */
+ flags &= ~PIPE_TRANSFER_DISCARD_WHOLE_RESOURCE;
}
vsrf->rebind = FALSE;
@@ -89,7 +82,8 @@ vmw_svga_winsys_surface_map(struct svga_winsys_context *swc,
goto out_unlock;
}
- pb_flags = flags & (PIPE_TRANSFER_READ_WRITE | PIPE_TRANSFER_UNSYNCHRONIZED);
+ pb_flags = flags & (PIPE_TRANSFER_READ_WRITE | PIPE_TRANSFER_UNSYNCHRONIZED |
+ PIPE_TRANSFER_PERSISTENT);
if (flags & PIPE_TRANSFER_DISCARD_WHOLE_RESOURCE) {
struct pb_manager *provider;
@@ -169,26 +163,13 @@ vmw_svga_winsys_surface_unmap(struct svga_winsys_context *swc,
if (--vsrf->mapcount == 0) {
*rebind = vsrf->rebind;
vsrf->rebind = FALSE;
- vmw_svga_winsys_buffer_unmap(&vsrf->screen->base, vsrf->buf);
} else {
*rebind = FALSE;
}
+ vmw_svga_winsys_buffer_unmap(&vsrf->screen->base, vsrf->buf);
mtx_unlock(&vsrf->mutex);
}
-enum pipe_error
-vmw_svga_winsys_surface_invalidate(struct svga_winsys_context *swc,
- struct svga_winsys_surface *surf)
-{
- /* this is a noop since surface invalidation is not needed for DMA path.
- * DMA is enabled when guest-backed surface is not enabled or
- * guest-backed dma is enabled. Since guest-backed dma is enabled
- * when guest-backed surface is enabled, that implies DMA is always enabled;
- * hence, surface invalidation is not needed.
- */
- return PIPE_OK;
-}
-
void
vmw_svga_winsys_surface_reference(struct vmw_svga_winsys_surface **pdst,
struct vmw_svga_winsys_surface *src)
diff --git a/lib/mesa/src/gallium/winsys/svga/drm/vmw_surface.h b/lib/mesa/src/gallium/winsys/svga/drm/vmw_surface.h
index 0fdc8de1d..b1a1ce746 100644
--- a/lib/mesa/src/gallium/winsys/svga/drm/vmw_surface.h
+++ b/lib/mesa/src/gallium/winsys/svga/drm/vmw_surface.h
@@ -94,8 +94,4 @@ void
vmw_svga_winsys_surface_unmap(struct svga_winsys_context *swc,
struct svga_winsys_surface *srf,
boolean *rebind);
-enum pipe_error
-vmw_svga_winsys_surface_invalidate(struct svga_winsys_context *swc,
- struct svga_winsys_surface *srf);
-
#endif /* VMW_SURFACE_H_ */
diff --git a/lib/mesa/src/gallium/winsys/svga/drm/vmwgfx_drm.h b/lib/mesa/src/gallium/winsys/svga/drm/vmwgfx_drm.h
index 20fbcd727..02cab33f2 100644
--- a/lib/mesa/src/gallium/winsys/svga/drm/vmwgfx_drm.h
+++ b/lib/mesa/src/gallium/winsys/svga/drm/vmwgfx_drm.h
@@ -28,8 +28,10 @@
#ifndef __VMWGFX_DRM_H__
#define __VMWGFX_DRM_H__
-#ifndef __KERNEL__
-#include <drm.h>
+#include "drm.h"
+
+#if defined(__cplusplus)
+extern "C" {
#endif
#define DRM_VMW_MAX_SURFACE_FACES 6
@@ -38,7 +40,9 @@
#define DRM_VMW_GET_PARAM 0
#define DRM_VMW_ALLOC_DMABUF 1
+#define DRM_VMW_ALLOC_BO 1
#define DRM_VMW_UNREF_DMABUF 2
+#define DRM_VMW_HANDLE_CLOSE 2
#define DRM_VMW_CURSOR_BYPASS 3
/* guarded by DRM_VMW_PARAM_NUM_STREAMS != 0*/
#define DRM_VMW_CONTROL_STREAM 4
@@ -95,7 +99,7 @@
#define DRM_VMW_PARAM_MAX_MOB_MEMORY 9
#define DRM_VMW_PARAM_MAX_MOB_SIZE 10
#define DRM_VMW_PARAM_SCREEN_TARGET 11
-#define DRM_VMW_PARAM_VGPU10 12
+#define DRM_VMW_PARAM_DX 12
#define DRM_VMW_PARAM_HW_CAPS2 13
#define DRM_VMW_PARAM_SM4_1 14
@@ -118,9 +122,9 @@ enum drm_vmw_handle_type {
*/
struct drm_vmw_getparam_arg {
- uint64_t value;
- uint32_t param;
- uint32_t pad64;
+ __u64 value;
+ __u32 param;
+ __u32 pad64;
};
/*************************************************************************/
@@ -141,8 +145,8 @@ struct drm_vmw_getparam_arg {
*/
struct drm_vmw_context_arg {
- int32_t cid;
- uint32_t pad64;
+ __s32 cid;
+ __u32 pad64;
};
/*************************************************************************/
@@ -172,7 +176,7 @@ struct drm_vmw_context_arg {
* @mip_levels: Number of mip levels for each face.
* An unused face should have 0 encoded.
* @size_addr: Address of a user-space array of sruct drm_vmw_size
- * cast to an uint64_t for 32-64 bit compatibility.
+ * cast to an __u64 for 32-64 bit compatibility.
* The size of the array should equal the total number of mipmap levels.
* @shareable: Boolean whether other clients (as identified by file descriptors)
* may reference this surface.
@@ -184,12 +188,12 @@ struct drm_vmw_context_arg {
*/
struct drm_vmw_surface_create_req {
- uint32_t flags;
- uint32_t format;
- uint32_t mip_levels[DRM_VMW_MAX_SURFACE_FACES];
- uint64_t size_addr;
- int32_t shareable;
- int32_t scanout;
+ __u32 flags;
+ __u32 format;
+ __u32 mip_levels[DRM_VMW_MAX_SURFACE_FACES];
+ __u64 size_addr;
+ __s32 shareable;
+ __s32 scanout;
};
/**
@@ -204,7 +208,7 @@ struct drm_vmw_surface_create_req {
*/
struct drm_vmw_surface_arg {
- int32_t sid;
+ __s32 sid;
enum drm_vmw_handle_type handle_type;
};
@@ -220,10 +224,10 @@ struct drm_vmw_surface_arg {
*/
struct drm_vmw_size {
- uint32_t width;
- uint32_t height;
- uint32_t depth;
- uint32_t pad64;
+ __u32 width;
+ __u32 height;
+ __u32 depth;
+ __u32 pad64;
};
/**
@@ -291,13 +295,13 @@ union drm_vmw_surface_reference_arg {
/**
* struct drm_vmw_execbuf_arg
*
- * @commands: User-space address of a command buffer cast to an uint64_t.
+ * @commands: User-space address of a command buffer cast to an __u64.
* @command-size: Size in bytes of the command buffer.
* @throttle-us: Sleep until software is less than @throttle_us
* microseconds ahead of hardware. The driver may round this value
* to the nearest kernel tick.
* @fence_rep: User-space address of a struct drm_vmw_fence_rep cast to an
- * uint64_t.
+ * __u64.
* @version: Allows expanding the execbuf ioctl parameters without breaking
* backwards compatibility, since user-space will always tell the kernel
* which version it uses.
@@ -313,14 +317,14 @@ union drm_vmw_surface_reference_arg {
#define DRM_VMW_EXECBUF_FLAG_EXPORT_FENCE_FD (1 << 1)
struct drm_vmw_execbuf_arg {
- uint64_t commands;
- uint32_t command_size;
- uint32_t throttle_us;
- uint64_t fence_rep;
- uint32_t version;
- uint32_t flags;
- uint32_t context_handle;
- int32_t imported_fence_fd;
+ __u64 commands;
+ __u32 command_size;
+ __u32 throttle_us;
+ __u64 fence_rep;
+ __u32 version;
+ __u32 flags;
+ __u32 context_handle;
+ __s32 imported_fence_fd;
};
/**
@@ -350,19 +354,19 @@ struct drm_vmw_execbuf_arg {
*/
struct drm_vmw_fence_rep {
- uint32_t handle;
- uint32_t mask;
- uint32_t seqno;
- uint32_t passed_seqno;
- int32_t fd;
- int32_t error;
+ __u32 handle;
+ __u32 mask;
+ __u32 seqno;
+ __u32 passed_seqno;
+ __s32 fd;
+ __s32 error;
};
/*************************************************************************/
/**
- * DRM_VMW_ALLOC_DMABUF
+ * DRM_VMW_ALLOC_BO
*
- * Allocate a DMA buffer that is visible also to the host.
+ * Allocate a buffer object that is visible also to the host.
* NOTE: The buffer is
* identified by a handle and an offset, which are private to the guest, but
* useable in the command stream. The guest kernel may translate these
@@ -370,27 +374,28 @@ struct drm_vmw_fence_rep {
* be zero at all times, or it may disappear from the interface before it is
* fixed.
*
- * The DMA buffer may stay user-space mapped in the guest at all times,
+ * The buffer object may stay user-space mapped in the guest at all times,
* and is thus suitable for sub-allocation.
*
- * DMA buffers are mapped using the mmap() syscall on the drm device.
+ * Buffer objects are mapped using the mmap() syscall on the drm device.
*/
/**
- * struct drm_vmw_alloc_dmabuf_req
+ * struct drm_vmw_alloc_bo_req
*
* @size: Required minimum size of the buffer.
*
- * Input data to the DRM_VMW_ALLOC_DMABUF Ioctl.
+ * Input data to the DRM_VMW_ALLOC_BO Ioctl.
*/
-struct drm_vmw_alloc_dmabuf_req {
- uint32_t size;
- uint32_t pad64;
+struct drm_vmw_alloc_bo_req {
+ __u32 size;
+ __u32 pad64;
};
+#define drm_vmw_alloc_dmabuf_req drm_vmw_alloc_bo_req
/**
- * struct drm_vmw_dmabuf_rep
+ * struct drm_vmw_bo_rep
*
* @map_handle: Offset to use in the mmap() call used to map the buffer.
* @handle: Handle unique to this buffer. Used for unreferencing.
@@ -399,50 +404,32 @@ struct drm_vmw_alloc_dmabuf_req {
* @cur_gmr_offset: Offset to use in the command stream when this buffer is
* referenced. See note above.
*
- * Output data from the DRM_VMW_ALLOC_DMABUF Ioctl.
+ * Output data from the DRM_VMW_ALLOC_BO Ioctl.
*/
-struct drm_vmw_dmabuf_rep {
- uint64_t map_handle;
- uint32_t handle;
- uint32_t cur_gmr_id;
- uint32_t cur_gmr_offset;
- uint32_t pad64;
+struct drm_vmw_bo_rep {
+ __u64 map_handle;
+ __u32 handle;
+ __u32 cur_gmr_id;
+ __u32 cur_gmr_offset;
+ __u32 pad64;
};
+#define drm_vmw_dmabuf_rep drm_vmw_bo_rep
/**
- * union drm_vmw_dmabuf_arg
+ * union drm_vmw_alloc_bo_arg
*
* @req: Input data as described above.
* @rep: Output data as described above.
*
- * Argument to the DRM_VMW_ALLOC_DMABUF Ioctl.
- */
-
-union drm_vmw_alloc_dmabuf_arg {
- struct drm_vmw_alloc_dmabuf_req req;
- struct drm_vmw_dmabuf_rep rep;
-};
-
-/*************************************************************************/
-/**
- * DRM_VMW_UNREF_DMABUF - Free a DMA buffer.
- *
+ * Argument to the DRM_VMW_ALLOC_BO Ioctl.
*/
-/**
- * struct drm_vmw_unref_dmabuf_arg
- *
- * @handle: Handle indicating what buffer to free. Obtained from the
- * DRM_VMW_ALLOC_DMABUF Ioctl.
- *
- * Argument to the DRM_VMW_UNREF_DMABUF Ioctl.
- */
-
-struct drm_vmw_unref_dmabuf_arg {
- uint32_t handle;
- uint32_t pad64;
+union drm_vmw_alloc_bo_arg {
+ struct drm_vmw_alloc_bo_req req;
+ struct drm_vmw_bo_rep rep;
};
+#define drm_vmw_alloc_dmabuf_arg drm_vmw_alloc_bo_arg
/*************************************************************************/
/**
@@ -464,10 +451,10 @@ struct drm_vmw_unref_dmabuf_arg {
*/
struct drm_vmw_rect {
- int32_t x;
- int32_t y;
- uint32_t w;
- uint32_t h;
+ __s32 x;
+ __s32 y;
+ __u32 w;
+ __u32 h;
};
/**
@@ -489,21 +476,21 @@ struct drm_vmw_rect {
*/
struct drm_vmw_control_stream_arg {
- uint32_t stream_id;
- uint32_t enabled;
+ __u32 stream_id;
+ __u32 enabled;
- uint32_t flags;
- uint32_t color_key;
+ __u32 flags;
+ __u32 color_key;
- uint32_t handle;
- uint32_t offset;
- int32_t format;
- uint32_t size;
- uint32_t width;
- uint32_t height;
- uint32_t pitch[3];
+ __u32 handle;
+ __u32 offset;
+ __s32 format;
+ __u32 size;
+ __u32 width;
+ __u32 height;
+ __u32 pitch[3];
- uint32_t pad64;
+ __u32 pad64;
struct drm_vmw_rect src;
struct drm_vmw_rect dst;
};
@@ -531,12 +518,12 @@ struct drm_vmw_control_stream_arg {
*/
struct drm_vmw_cursor_bypass_arg {
- uint32_t flags;
- uint32_t crtc_id;
- int32_t xpos;
- int32_t ypos;
- int32_t xhot;
- int32_t yhot;
+ __u32 flags;
+ __u32 crtc_id;
+ __s32 xpos;
+ __s32 ypos;
+ __s32 xhot;
+ __s32 yhot;
};
/*************************************************************************/
@@ -554,8 +541,8 @@ struct drm_vmw_cursor_bypass_arg {
*/
struct drm_vmw_stream_arg {
- uint32_t stream_id;
- uint32_t pad64;
+ __u32 stream_id;
+ __u32 pad64;
};
/*************************************************************************/
@@ -577,7 +564,7 @@ struct drm_vmw_stream_arg {
/**
* struct drm_vmw_get_3d_cap_arg
*
- * @buffer: Pointer to a buffer for capability data, cast to an uint64_t
+ * @buffer: Pointer to a buffer for capability data, cast to an __u64
* @size: Max size to copy
*
* Input argument to the DRM_VMW_GET_3D_CAP_IOCTL
@@ -585,12 +572,11 @@ struct drm_vmw_stream_arg {
*/
struct drm_vmw_get_3d_cap_arg {
- uint64_t buffer;
- uint32_t max_size;
- uint32_t pad64;
+ __u64 buffer;
+ __u32 max_size;
+ __u32 pad64;
};
-
/*************************************************************************/
/**
* DRM_VMW_FENCE_WAIT
@@ -637,14 +623,14 @@ struct drm_vmw_get_3d_cap_arg {
*/
struct drm_vmw_fence_wait_arg {
- uint32_t handle;
- int32_t cookie_valid;
- uint64_t kernel_cookie;
- uint64_t timeout_us;
- int32_t lazy;
- int32_t flags;
- int32_t wait_options;
- int32_t pad64;
+ __u32 handle;
+ __s32 cookie_valid;
+ __u64 kernel_cookie;
+ __u64 timeout_us;
+ __s32 lazy;
+ __s32 flags;
+ __s32 wait_options;
+ __s32 pad64;
};
/*************************************************************************/
@@ -668,12 +654,12 @@ struct drm_vmw_fence_wait_arg {
*/
struct drm_vmw_fence_signaled_arg {
- uint32_t handle;
- uint32_t flags;
- int32_t signaled;
- uint32_t passed_seqno;
- uint32_t signaled_flags;
- uint32_t pad64;
+ __u32 handle;
+ __u32 flags;
+ __s32 signaled;
+ __u32 passed_seqno;
+ __u32 signaled_flags;
+ __u32 pad64;
};
/*************************************************************************/
@@ -694,8 +680,8 @@ struct drm_vmw_fence_signaled_arg {
*/
struct drm_vmw_fence_arg {
- uint32_t handle;
- uint32_t pad64;
+ __u32 handle;
+ __u32 pad64;
};
@@ -716,9 +702,9 @@ struct drm_vmw_fence_arg {
struct drm_vmw_event_fence {
struct drm_event base;
- uint64_t user_data;
- uint32_t tv_sec;
- uint32_t tv_usec;
+ __u64 user_data;
+ __u32 tv_sec;
+ __u32 tv_usec;
};
/*
@@ -730,17 +716,17 @@ struct drm_vmw_event_fence {
/**
* struct drm_vmw_fence_event_arg
*
- * @fence_rep: Pointer to fence_rep structure cast to uint64_t or 0 if
+ * @fence_rep: Pointer to fence_rep structure cast to __u64 or 0 if
* the fence is not supposed to be referenced by user-space.
* @user_info: Info to be delivered with the event.
* @handle: Attach the event to this fence only.
* @flags: A set of flags as defined above.
*/
struct drm_vmw_fence_event_arg {
- uint64_t fence_rep;
- uint64_t user_data;
- uint32_t handle;
- uint32_t flags;
+ __u64 fence_rep;
+ __u64 user_data;
+ __u32 handle;
+ __u32 flags;
};
@@ -760,7 +746,7 @@ struct drm_vmw_fence_event_arg {
* @sid: Surface id to present from.
* @dest_x: X placement coordinate for surface.
* @dest_y: Y placement coordinate for surface.
- * @clips_ptr: Pointer to an array of clip rects cast to an uint64_t.
+ * @clips_ptr: Pointer to an array of clip rects cast to an __u64.
* @num_clips: Number of cliprects given relative to the framebuffer origin,
* in the same coordinate space as the frame buffer.
* @pad64: Unused 64-bit padding.
@@ -769,13 +755,13 @@ struct drm_vmw_fence_event_arg {
*/
struct drm_vmw_present_arg {
- uint32_t fb_id;
- uint32_t sid;
- int32_t dest_x;
- int32_t dest_y;
- uint64_t clips_ptr;
- uint32_t num_clips;
- uint32_t pad64;
+ __u32 fb_id;
+ __u32 sid;
+ __s32 dest_x;
+ __s32 dest_y;
+ __u64 clips_ptr;
+ __u32 num_clips;
+ __u32 pad64;
};
@@ -793,16 +779,16 @@ struct drm_vmw_present_arg {
* struct drm_vmw_present_arg
* @fb_id: fb_id to present / read back from.
* @num_clips: Number of cliprects.
- * @clips_ptr: Pointer to an array of clip rects cast to an uint64_t.
- * @fence_rep: Pointer to a struct drm_vmw_fence_rep, cast to an uint64_t.
+ * @clips_ptr: Pointer to an array of clip rects cast to an __u64.
+ * @fence_rep: Pointer to a struct drm_vmw_fence_rep, cast to an __u64.
* If this member is NULL, then the ioctl should not return a fence.
*/
struct drm_vmw_present_readback_arg {
- uint32_t fb_id;
- uint32_t num_clips;
- uint64_t clips_ptr;
- uint64_t fence_rep;
+ __u32 fb_id;
+ __u32 num_clips;
+ __u64 clips_ptr;
+ __u64 fence_rep;
};
/*************************************************************************/
@@ -818,14 +804,14 @@ struct drm_vmw_present_readback_arg {
* struct drm_vmw_update_layout_arg
*
* @num_outputs: number of active connectors
- * @rects: pointer to array of drm_vmw_rect cast to an uint64_t
+ * @rects: pointer to array of drm_vmw_rect cast to an __u64
*
* Input argument to the DRM_VMW_UPDATE_LAYOUT Ioctl.
*/
struct drm_vmw_update_layout_arg {
- uint32_t num_outputs;
- uint32_t pad64;
- uint64_t rects;
+ __u32 num_outputs;
+ __u32 pad64;
+ __u64 rects;
};
@@ -862,10 +848,10 @@ enum drm_vmw_shader_type {
*/
struct drm_vmw_shader_create_arg {
enum drm_vmw_shader_type shader_type;
- uint32_t size;
- uint32_t buffer_handle;
- uint32_t shader_handle;
- uint64_t offset;
+ __u32 size;
+ __u32 buffer_handle;
+ __u32 shader_handle;
+ __u64 offset;
};
/*************************************************************************/
@@ -884,8 +870,8 @@ struct drm_vmw_shader_create_arg {
* Input argument to the DRM_VMW_UNREF_SHADER ioctl.
*/
struct drm_vmw_shader_arg {
- uint32_t handle;
- uint32_t pad64;
+ __u32 handle;
+ __u32 pad64;
};
/*************************************************************************/
@@ -905,11 +891,13 @@ struct drm_vmw_shader_arg {
* surface.
* @drm_vmw_surface_flag_create_buffer: Create a backup buffer if none is
* given.
+ * @drm_vmw_surface_flag_coherent: Back surface with coherent memory.
*/
enum drm_vmw_surface_flags {
drm_vmw_surface_flag_shareable = (1 << 0),
drm_vmw_surface_flag_scanout = (1 << 1),
- drm_vmw_surface_flag_create_buffer = (1 << 2)
+ drm_vmw_surface_flag_create_buffer = (1 << 2),
+ drm_vmw_surface_flag_coherent = (1 << 3),
};
/**
@@ -924,21 +912,21 @@ enum drm_vmw_surface_flags {
* @buffer_handle Buffer handle of backup buffer. SVGA3D_INVALID_ID
* if none.
* @base_size Size of the base mip level for all faces.
- * @array_size Must be zero for non-vgpu10 hardware, and if non-zero
+ * @array_size Must be zero for non-DX hardware, and if non-zero
* svga3d_flags must have proper bind flags setup.
*
* Input argument to the DRM_VMW_GB_SURFACE_CREATE Ioctl.
* Part of output argument for the DRM_VMW_GB_SURFACE_REF Ioctl.
*/
struct drm_vmw_gb_surface_create_req {
- uint32_t svga3d_flags;
- uint32_t format;
- uint32_t mip_levels;
+ __u32 svga3d_flags;
+ __u32 format;
+ __u32 mip_levels;
enum drm_vmw_surface_flags drm_surface_flags;
- uint32_t multisample_count;
- uint32_t autogen_filter;
- uint32_t buffer_handle;
- uint32_t array_size;
+ __u32 multisample_count;
+ __u32 autogen_filter;
+ __u32 buffer_handle;
+ __u32 array_size;
struct drm_vmw_size base_size;
};
@@ -957,11 +945,11 @@ struct drm_vmw_gb_surface_create_req {
* Output argument for the DRM_VMW_GB_SURFACE_CREATE ioctl.
*/
struct drm_vmw_gb_surface_create_rep {
- uint32_t handle;
- uint32_t backup_size;
- uint32_t buffer_handle;
- uint32_t buffer_size;
- uint64_t buffer_map_handle;
+ __u32 handle;
+ __u32 backup_size;
+ __u32 buffer_handle;
+ __u32 buffer_size;
+ __u64 buffer_map_handle;
};
/**
@@ -1074,8 +1062,8 @@ enum drm_vmw_synccpu_op {
struct drm_vmw_synccpu_arg {
enum drm_vmw_synccpu_op op;
enum drm_vmw_synccpu_flags flags;
- uint32_t handle;
- uint32_t pad64;
+ __u32 handle;
+ __u32 pad64;
};
/*************************************************************************/
@@ -1087,7 +1075,7 @@ struct drm_vmw_synccpu_arg {
*/
enum drm_vmw_extended_context {
drm_vmw_context_legacy,
- drm_vmw_context_vgpu10
+ drm_vmw_context_dx
};
/**
@@ -1104,6 +1092,28 @@ union drm_vmw_extended_context_arg {
};
/*************************************************************************/
+/*
+ * DRM_VMW_HANDLE_CLOSE - Close a user-space handle and release its
+ * underlying resource.
+ *
+ * Note that this ioctl is overlaid on the deprecated DRM_VMW_UNREF_DMABUF
+ * Ioctl.
+ */
+
+/**
+ * struct drm_vmw_handle_close_arg
+ *
+ * @handle: Handle to close.
+ *
+ * Argument to the DRM_VMW_HANDLE_CLOSE Ioctl.
+ */
+struct drm_vmw_handle_close_arg {
+ __u32 handle;
+ __u32 pad64;
+};
+#define drm_vmw_unref_dmabuf_arg drm_vmw_handle_close_arg
+
+/*************************************************************************/
/**
* DRM_VMW_GB_SURFACE_CREATE_EXT - Create a host guest-backed surface.
*
@@ -1203,4 +1213,8 @@ union drm_vmw_gb_surface_reference_ext_arg {
struct drm_vmw_surface_arg req;
};
+#if defined(__cplusplus)
+}
+#endif
+
#endif