Import Mesa 13.0.3

11 files changed, 100 insertions, 61 deletions

diff --git a/lib/mesa/src/intel/genxml/gen9.xml b/lib/mesa/src/intel/genxml/gen9.xml
index 0dfce3fb1..5d2bc96de 100644
--- a/lib/mesa/src/intel/genxml/gen9.xml
+++ b/lib/mesa/src/intel/genxml/gen9.xml
@@ -3194,7 +3194,7 @@
       <value name="Per Process Graphics Address" value="0"/>
       <value name="Global Graphics Address" value="1"/>
     </field>
-    <field name="Register Poll Mode" start="16" end="16" type="uint" default="1"/>
+    <field name="Register Poll Mode" start="16" end="16" type="bool"/>
     <field name="Wait Mode" start="15" end="15" type="uint">
       <value name="Polling Mode" value="1"/>
       <value name="Signal Mode" value="0"/>
diff --git a/lib/mesa/src/intel/genxml/gen9_pack.h b/lib/mesa/src/intel/genxml/gen9_pack.h
index ae7edce93..a42ce7200 100644
--- a/lib/mesa/src/intel/genxml/gen9_pack.h
+++ b/lib/mesa/src/intel/genxml/gen9_pack.h
@@ -8220,7 +8220,6 @@ GEN9_MI_SEMAPHORE_SIGNAL_pack(__gen_user_data *data, void * restrict dst,
 #define GEN9_MI_SEMAPHORE_WAIT_header           \
    .CommandType                         =      0,  \
    .MICommandOpcode                     =     28,  \
-   .RegisterPollMode                    =      1,  \
    .DWordLength                         =      2
 
 struct GEN9_MI_SEMAPHORE_WAIT {
@@ -8229,7 +8228,7 @@ struct GEN9_MI_SEMAPHORE_WAIT {
    uint32_t                             MemoryType;
 #define PerProcessGraphicsAddress                0
 #define GlobalGraphicsAddress                    1
-   uint32_t                             RegisterPollMode;
+   bool                                 RegisterPollMode;
    uint32_t                             WaitMode;
 #define PollingMode                              1
 #define SignalMode                               0
diff --git a/lib/mesa/src/intel/genxml/gen9_xml.h b/lib/mesa/src/intel/genxml/gen9_xml.h
index 0a0074eaa..d7e6765dc 100644
--- a/lib/mesa/src/intel/genxml/gen9_xml.h
+++ b/lib/mesa/src/intel/genxml/gen9_xml.h
@@ -15247,8 +15247,7 @@ static const uint8_t gen9_xml[] = {
   0x72, 0x20, 0x50, 0x6f, 0x6c, 0x6c, 0x20, 0x4d, 0x6f, 0x64, 0x65, 0x22,
   0x20, 0x73, 0x74, 0x61, 0x72, 0x74, 0x3d, 0x22, 0x31, 0x36, 0x22, 0x20,
   0x65, 0x6e, 0x64, 0x3d, 0x22, 0x31, 0x36, 0x22, 0x20, 0x74, 0x79, 0x70,
-  0x65, 0x3d, 0x22, 0x75, 0x69, 0x6e, 0x74, 0x22, 0x20, 0x64, 0x65, 0x66,
-  0x61, 0x75, 0x6c, 0x74, 0x3d, 0x22, 0x31, 0x22, 0x2f, 0x3e, 0x0a, 0x20,
+  0x65, 0x3d, 0x22, 0x62, 0x6f, 0x6f, 0x6c, 0x22, 0x2f, 0x3e, 0x0a, 0x20,
   0x20, 0x20, 0x20, 0x3c, 0x66, 0x69, 0x65, 0x6c, 0x64, 0x20, 0x6e, 0x61,
   0x6d, 0x65, 0x3d, 0x22, 0x57, 0x61, 0x69, 0x74, 0x20, 0x4d, 0x6f, 0x64,
   0x65, 0x22, 0x20, 0x73, 0x74, 0x61, 0x72, 0x74, 0x3d, 0x22, 0x31, 0x35,
diff --git a/lib/mesa/src/intel/vulkan/anv_allocator.c b/lib/mesa/src/intel/vulkan/anv_allocator.c
index 204c8711a..cfa27e339 100644
--- a/lib/mesa/src/intel/vulkan/anv_allocator.c
+++ b/lib/mesa/src/intel/vulkan/anv_allocator.c
@@ -246,10 +246,12 @@ anv_ptr_free_list_push(void **list, void *elem)
 static uint32_t
 anv_block_pool_grow(struct anv_block_pool *pool, struct anv_block_state *state);
 
-void
+VkResult
 anv_block_pool_init(struct anv_block_pool *pool,
                     struct anv_device *device, uint32_t block_size)
 {
+   VkResult result;
+
    assert(util_is_power_of_two(block_size));
 
    pool->device = device;
@@ -260,17 +262,23 @@ anv_block_pool_init(struct anv_block_pool *pool,
 
    pool->fd = memfd_create("block pool", MFD_CLOEXEC);
    if (pool->fd == -1)
-      return;
+      return vk_error(VK_ERROR_INITIALIZATION_FAILED);
 
    /* Just make it 2GB up-front.  The Linux kernel won't actually back it
     * with pages until we either map and fault on one of them or we use
     * userptr and send a chunk of it off to the GPU.
     */
-   if (ftruncate(pool->fd, BLOCK_POOL_MEMFD_SIZE) == -1)
-      return;
+   if (ftruncate(pool->fd, BLOCK_POOL_MEMFD_SIZE) == -1) {
+      result = vk_error(VK_ERROR_INITIALIZATION_FAILED);
+      goto fail_fd;
+   }
 
-   u_vector_init(&pool->mmap_cleanups,
-                   round_to_power_of_two(sizeof(struct anv_mmap_cleanup)), 128);
+   if (!u_vector_init(&pool->mmap_cleanups,
+                      round_to_power_of_two(sizeof(struct anv_mmap_cleanup)),
+                      128)) {
+      result = vk_error(VK_ERROR_INITIALIZATION_FAILED);
+      goto fail_fd;
+   }
 
    pool->state.next = 0;
    pool->state.end = 0;
@@ -279,6 +287,13 @@ anv_block_pool_init(struct anv_block_pool *pool,
 
    /* Immediately grow the pool so we'll have a backing bo. */
    pool->state.end = anv_block_pool_grow(pool, &pool->state);
+
+   return VK_SUCCESS;
+
+ fail_fd:
+   close(pool->fd);
+
+   return result;
 }
 
 void
diff --git a/lib/mesa/src/intel/vulkan/anv_descriptor_set.c b/lib/mesa/src/intel/vulkan/anv_descriptor_set.c
index 17a1c8ead..94c3f03a6 100644
--- a/lib/mesa/src/intel/vulkan/anv_descriptor_set.c
+++ b/lib/mesa/src/intel/vulkan/anv_descriptor_set.c
@@ -498,6 +498,7 @@ anv_descriptor_set_destroy(struct anv_device *device,
       struct surface_state_free_list_entry *entry =
          set->buffer_views[b].surface_state.map;
       entry->next = pool->surface_state_free_list;
+      entry->offset = set->buffer_views[b].surface_state.offset;
       pool->surface_state_free_list = entry;
    }
 
diff --git a/lib/mesa/src/intel/vulkan/anv_device.c b/lib/mesa/src/intel/vulkan/anv_device.c
index 125df22d8..53338564c 100644
--- a/lib/mesa/src/intel/vulkan/anv_device.c
+++ b/lib/mesa/src/intel/vulkan/anv_device.c
@@ -24,6 +24,7 @@
 #include <assert.h>
 #include <stdbool.h>
 #include <string.h>
+#include <sys/mman.h>
 #include <unistd.h>
 #include <fcntl.h>
 
@@ -162,8 +163,6 @@ anv_physical_device_init(struct anv_physical_device *device,
          device->info.max_cs_threads = max_cs_threads;
    }
 
-   close(fd);
-
    brw_process_intel_debug_variable();
 
    device->compiler = brw_compiler_create(NULL, &device->info);
@@ -175,12 +174,15 @@ anv_physical_device_init(struct anv_physical_device *device,
    device->compiler->shader_perf_log = compiler_perf_log;
 
    result = anv_init_wsi(device);
-   if (result != VK_SUCCESS)
-       goto fail;
+   if (result != VK_SUCCESS) {
+      ralloc_free(device->compiler);
+      goto fail;
+   }
 
    /* XXX: Actually detect bit6 swizzling */
    isl_device_init(&device->isl_dev, &device->info, swizzled);
 
+   close(fd);
    return VK_SUCCESS;
 
 fail:
@@ -527,7 +529,7 @@ void anv_GetPhysicalDeviceProperties(
       .maxGeometryTotalOutputComponents         = 1024,
       .maxFragmentInputComponents               = 128,
       .maxFragmentOutputAttachments             = 8,
-      .maxFragmentDualSrcAttachments            = 2,
+      .maxFragmentDualSrcAttachments            = 1,
       .maxFragmentCombinedOutputResources       = 8,
       .maxComputeSharedMemorySize               = 32768,
       .maxComputeWorkGroupCount                 = { 65535, 65535, 65535 },
@@ -967,10 +969,10 @@ void anv_DestroyDevice(
 {
    ANV_FROM_HANDLE(anv_device, device, _device);
 
-   anv_queue_finish(&device->queue);
-
    anv_device_finish_blorp(device);
 
+   anv_queue_finish(&device->queue);
+
 #ifdef HAVE_VALGRIND
    /* We only need to free these to prevent valgrind errors.  The backing
     * BO will go away in a couple of lines so we don't actually leak.
@@ -978,22 +980,27 @@ void anv_DestroyDevice(
    anv_state_pool_free(&device->dynamic_state_pool, device->border_colors);
 #endif
 
+   anv_scratch_pool_finish(device, &device->scratch_pool);
+
    anv_gem_munmap(device->workaround_bo.map, device->workaround_bo.size);
    anv_gem_close(device, device->workaround_bo.gem_handle);
 
-   anv_bo_pool_finish(&device->batch_bo_pool);
-   anv_state_pool_finish(&device->dynamic_state_pool);
-   anv_block_pool_finish(&device->dynamic_state_block_pool);
-   anv_state_pool_finish(&device->instruction_state_pool);
-   anv_block_pool_finish(&device->instruction_block_pool);
    anv_state_pool_finish(&device->surface_state_pool);
    anv_block_pool_finish(&device->surface_state_block_pool);
-   anv_scratch_pool_finish(device, &device->scratch_pool);
+   anv_state_pool_finish(&device->instruction_state_pool);
+   anv_block_pool_finish(&device->instruction_block_pool);
+   anv_state_pool_finish(&device->dynamic_state_pool);
+   anv_block_pool_finish(&device->dynamic_state_block_pool);
 
-   close(device->fd);
+   anv_bo_pool_finish(&device->batch_bo_pool);
 
+   pthread_cond_destroy(&device->queue_submit);
    pthread_mutex_destroy(&device->mutex);
 
+   anv_gem_destroy_context(device, device->context_id);
+
+   close(device->fd);
+
    vk_free(&device->alloc, device);
 }
 
@@ -1236,6 +1243,9 @@ VkResult anv_AllocateMemory(
 
    mem->type_index = pAllocateInfo->memoryTypeIndex;
 
+   mem->map = NULL;
+   mem->map_size = 0;
+
    *pMem = anv_device_memory_to_handle(mem);
 
    return VK_SUCCESS;
@@ -1257,6 +1267,9 @@ void anv_FreeMemory(
    if (mem == NULL)
       return;
 
+   if (mem->map)
+      anv_UnmapMemory(_device, _mem);
+
    if (mem->bo.map)
       anv_gem_munmap(mem->bo.map, mem->bo.size);
 
@@ -1303,8 +1316,12 @@ VkResult anv_MapMemory(
    /* Let's map whole pages */
    map_size = align_u64(map_size, 4096);
 
-   mem->map = anv_gem_mmap(device, mem->bo.gem_handle,
-                           map_offset, map_size, gem_flags);
+   void *map = anv_gem_mmap(device, mem->bo.gem_handle,
+                            map_offset, map_size, gem_flags);
+   if (map == MAP_FAILED)
+      return vk_error(VK_ERROR_MEMORY_MAP_FAILED);
+
+   mem->map = map;
    mem->map_size = map_size;
 
    *ppData = mem->map + (offset - map_offset);
@@ -1322,6 +1339,9 @@ void anv_UnmapMemory(
       return;
 
    anv_gem_munmap(mem->map, mem->map_size);
+
+   mem->map = NULL;
+   mem->map_size = 0;
 }
 
 static void
diff --git a/lib/mesa/src/intel/vulkan/anv_gem.c b/lib/mesa/src/intel/vulkan/anv_gem.c
index e65468954..0dde6d9d6 100644
--- a/lib/mesa/src/intel/vulkan/anv_gem.c
+++ b/lib/mesa/src/intel/vulkan/anv_gem.c
@@ -88,10 +88,8 @@ anv_gem_mmap(struct anv_device *device, uint32_t gem_handle,
    };
 
    int ret = anv_ioctl(device->fd, DRM_IOCTL_I915_GEM_MMAP, &gem_mmap);
-   if (ret != 0) {
-      /* FIXME: Is NULL the right error return? Cf MAP_INVALID */
-      return NULL;
-   }
+   if (ret != 0)
+      return MAP_FAILED;
 
    VG(VALGRIND_MALLOCLIKE_BLOCK(gem_mmap.addr_ptr, gem_mmap.size, 0, 1));
    return (void *)(uintptr_t) gem_mmap.addr_ptr;
diff --git a/lib/mesa/src/intel/vulkan/anv_image.c b/lib/mesa/src/intel/vulkan/anv_image.c
index 4a4d87e6a..10491f443 100644
--- a/lib/mesa/src/intel/vulkan/anv_image.c
+++ b/lib/mesa/src/intel/vulkan/anv_image.c
@@ -194,8 +194,8 @@ make_surface(const struct anv_device *dev,
          anv_finishme("Test gen8 multisampled HiZ");
       } else {
          isl_surf_get_hiz_surf(&dev->isl_dev, &image->depth_surface.isl,
-                               &image->hiz_surface.isl);
-         add_surface(image, &image->hiz_surface);
+                               &image->aux_surface.isl);
+         add_surface(image, &image->aux_surface);
       }
    }
 
@@ -306,16 +306,16 @@ VkResult anv_BindImageMemory(
       /* The offset and size must be a multiple of 4K or else the
        * anv_gem_mmap call below will return NULL.
        */
-      assert((image->offset + image->hiz_surface.offset) % 4096 == 0);
-      assert(image->hiz_surface.isl.size % 4096 == 0);
+      assert((image->offset + image->aux_surface.offset) % 4096 == 0);
+      assert(image->aux_surface.isl.size % 4096 == 0);
 
       /* HiZ surfaces need to have their memory cleared to 0 before they
        * can be used.  If we let it have garbage data, it can cause GPU
        * hangs on some hardware.
        */
       void *map = anv_gem_mmap(device, image->bo->gem_handle,
-                               image->offset + image->hiz_surface.offset,
-                               image->hiz_surface.isl.size,
+                               image->offset + image->aux_surface.offset,
+                               image->aux_surface.isl.size,
                                device->info.has_llc ? 0 : I915_MMAP_WC);
 
       /* If anv_gem_mmap returns NULL, it's likely that the kernel was
@@ -324,9 +324,9 @@ VkResult anv_BindImageMemory(
       if (map == NULL)
          return vk_error(VK_ERROR_OUT_OF_HOST_MEMORY);
 
-      memset(map, 0, image->hiz_surface.isl.size);
+      memset(map, 0, image->aux_surface.isl.size);
 
-      anv_gem_munmap(map, image->hiz_surface.isl.size);
+      anv_gem_munmap(map, image->aux_surface.isl.size);
    }
 
    return VK_SUCCESS;
diff --git a/lib/mesa/src/intel/vulkan/anv_private.h b/lib/mesa/src/intel/vulkan/anv_private.h
index 06cdc0a81..9c871053e 100644
--- a/lib/mesa/src/intel/vulkan/anv_private.h
+++ b/lib/mesa/src/intel/vulkan/anv_private.h
@@ -416,8 +416,8 @@ anv_state_clflush(struct anv_state state)
    anv_clflush_range(state.map, state.alloc_size);
 }
 
-void anv_block_pool_init(struct anv_block_pool *pool,
-                         struct anv_device *device, uint32_t block_size);
+VkResult anv_block_pool_init(struct anv_block_pool *pool,
+                             struct anv_device *device, uint32_t block_size);
 void anv_block_pool_finish(struct anv_block_pool *pool);
 int32_t anv_block_pool_alloc(struct anv_block_pool *pool);
 int32_t anv_block_pool_alloc_back(struct anv_block_pool *pool);
@@ -1526,10 +1526,11 @@ struct anv_image {
 
       struct {
          struct anv_surface depth_surface;
-         struct anv_surface hiz_surface;
          struct anv_surface stencil_surface;
       };
    };
+
+   struct anv_surface aux_surface;
 };
 
 static inline uint32_t
@@ -1593,11 +1594,11 @@ anv_image_get_surface_for_aspect_mask(const struct anv_image *image,
 static inline bool
 anv_image_has_hiz(const struct anv_image *image)
 {
-   /* We must check the aspect because anv_image::hiz_surface belongs to
-    * a union.
+   /* We must check the aspect because anv_image::aux_surface may be used for
+    * any type of auxiliary surface, not just HiZ.
     */
    return (image->aspects & VK_IMAGE_ASPECT_DEPTH_BIT) &&
-          image->hiz_surface.isl.size > 0;
+          image->aux_surface.isl.size > 0;
 }
 
 struct anv_buffer_view {
diff --git a/lib/mesa/src/intel/vulkan/anv_timestamp.h b/lib/mesa/src/intel/vulkan/anv_timestamp.h
index a0d55743a..be205c7ee 100644
--- a/lib/mesa/src/intel/vulkan/anv_timestamp.h
+++ b/lib/mesa/src/intel/vulkan/anv_timestamp.h
@@ -1 +1 @@
-#define ANV_TIMESTAMP "1480346204"
+#define ANV_TIMESTAMP "1483631584"
diff --git a/lib/mesa/src/intel/vulkan/genX_cmd_buffer.c b/lib/mesa/src/intel/vulkan/genX_cmd_buffer.c
index f1b538761..4e92ccac2 100644
--- a/lib/mesa/src/intel/vulkan/genX_cmd_buffer.c
+++ b/lib/mesa/src/intel/vulkan/genX_cmd_buffer.c
@@ -1356,22 +1356,13 @@ flush_compute_descriptor_set(struct anv_cmd_buffer *cmd_buffer)
       result = emit_binding_table(cmd_buffer, MESA_SHADER_COMPUTE, &surfaces);
       assert(result == VK_SUCCESS);
    }
+
    result = emit_samplers(cmd_buffer, MESA_SHADER_COMPUTE, &samplers);
    assert(result == VK_SUCCESS);
 
-
-   struct anv_state push_state = anv_cmd_buffer_cs_push_constants(cmd_buffer);
-
    const struct brw_cs_prog_data *cs_prog_data = get_cs_prog_data(pipeline);
    const struct brw_stage_prog_data *prog_data = &cs_prog_data->base;
 
-   if (push_state.alloc_size) {
-      anv_batch_emit(&cmd_buffer->batch, GENX(MEDIA_CURBE_LOAD), curbe) {
-         curbe.CURBETotalDataLength    = push_state.alloc_size;
-         curbe.CURBEDataStartAddress   = push_state.offset;
-      }
-   }
-
    const uint32_t slm_size = encode_slm_size(GEN_GEN, prog_data->total_shared);
 
    struct anv_state state =
@@ -1441,6 +1432,18 @@ genX(cmd_buffer_flush_compute_state)(struct anv_cmd_buffer *cmd_buffer)
       cmd_buffer->state.descriptors_dirty &= ~VK_SHADER_STAGE_COMPUTE_BIT;
    }
 
+   if (cmd_buffer->state.push_constants_dirty & VK_SHADER_STAGE_COMPUTE_BIT) {
+      struct anv_state push_state =
+         anv_cmd_buffer_cs_push_constants(cmd_buffer);
+
+      if (push_state.alloc_size) {
+         anv_batch_emit(&cmd_buffer->batch, GENX(MEDIA_CURBE_LOAD), curbe) {
+            curbe.CURBETotalDataLength    = push_state.alloc_size;
+            curbe.CURBEDataStartAddress   = push_state.offset;
+         }
+      }
+   }
+
    cmd_buffer->state.compute_dirty = 0;
 
    genX(cmd_buffer_apply_pipe_flushes)(cmd_buffer);
@@ -1796,10 +1799,10 @@ cmd_buffer_emit_depth_stencil(struct anv_cmd_buffer *cmd_buffer)
    if (has_hiz) {
       anv_batch_emit(&cmd_buffer->batch, GENX(3DSTATE_HIER_DEPTH_BUFFER), hdb) {
          hdb.HierarchicalDepthBufferObjectControlState = GENX(MOCS);
-         hdb.SurfacePitch = image->hiz_surface.isl.row_pitch - 1;
+         hdb.SurfacePitch = image->aux_surface.isl.row_pitch - 1;
          hdb.SurfaceBaseAddress = (struct anv_address) {
             .bo = image->bo,
-            .offset = image->offset + image->hiz_surface.offset,
+            .offset = image->offset + image->aux_surface.offset,
          };
 #if GEN_GEN >= 8
          /* From the SKL PRM Vol2a:
@@ -1809,11 +1812,14 @@ cmd_buffer_emit_depth_stencil(struct anv_cmd_buffer *cmd_buffer)
           *    - SURFTYPE_1D: distance in pixels between array slices
           *    - SURFTYPE_2D/CUBE: distance in rows between array slices
           *    - SURFTYPE_3D: distance in rows between R - slices
+          *
+          * Unfortunately, the docs aren't 100% accurate here.  They fail to
+          * mention that the 1-D rule only applies to linear 1-D images.
+          * Since depth and HiZ buffers are always tiled, they are treated as
+          * 2-D images.  Prior to Sky Lake, this field is always in rows.
           */
          hdb.SurfaceQPitch =
-            image->hiz_surface.isl.dim == ISL_SURF_DIM_1D ?
-               isl_surf_get_array_pitch_el(&image->hiz_surface.isl) >> 2 :
-               isl_surf_get_array_pitch_el_rows(&image->hiz_surface.isl) >> 2;
+            isl_surf_get_array_pitch_el_rows(&image->aux_surface.isl) >> 2;
 #endif
       }
    } else {