diff options
| author | Jonathan Gray <jsg@cvs.openbsd.org> | 2020-09-11 15:04:44 +0000 |
|---|---|---|
| committer | Jonathan Gray <jsg@cvs.openbsd.org> | 2020-09-11 15:04:44 +0000 |
| commit | 7891ee205d131208ebfe7b79f834f4abfc74acdb (patch) | |
| tree | a11fb9108223fa221f1d5af9ee43a00ff2a1c0e5 /lib/mesa/src/intel | |
| parent | 1d961b118c0264c7be2611f292f06d87e6ceb9d7 (diff) | |
partially revert a Mesa commit to avoid hard hangs on Haswell
intel/eu: Use non-coherent mode (BTI=253) for stateless A64 messages
d23bbc8c28b6a5cd7f4d3d03c74d8319da5d47d5 on 20.1 branch
4985e380dd776ac65c4ae5627138211f9d9f03ce on mainline
thanks to gnezdo@ sthen@ and espie@ for reports and testing
Diffstat (limited to 'lib/mesa/src/intel')
| -rw-r--r-- | lib/mesa/src/intel/compiler/brw_eu.h | 12 |
1 files changed, 4 insertions, 8 deletions
diff --git a/lib/mesa/src/intel/compiler/brw_eu.h b/lib/mesa/src/intel/compiler/brw_eu.h index 262c527b2..7ae17dbdd 100644 --- a/lib/mesa/src/intel/compiler/brw_eu.h +++ b/lib/mesa/src/intel/compiler/brw_eu.h @@ -744,8 +744,7 @@ brw_dp_a64_untyped_surface_rw_desc(const struct gen_device_info *devinfo, SET_BITS(brw_mdc_cmask(num_channels), 3, 0) | SET_BITS(simd_mode, 5, 4); - return brw_dp_desc(devinfo, GEN8_BTI_STATELESS_NON_COHERENT, - msg_type, msg_control); + return brw_dp_desc(devinfo, BRW_BTI_STATELESS, msg_type, msg_control); } /** @@ -783,8 +782,7 @@ brw_dp_a64_byte_scattered_rw_desc(const struct gen_device_info *devinfo, SET_BITS(brw_mdc_a64_ds(bit_size / 8), 3, 2) | SET_BITS(exec_size == 16, 4, 4); - return brw_dp_desc(devinfo, GEN8_BTI_STATELESS_NON_COHERENT, - msg_type, msg_control); + return brw_dp_desc(devinfo, BRW_BTI_STATELESS, msg_type, msg_control); } static inline uint32_t @@ -805,8 +803,7 @@ brw_dp_a64_untyped_atomic_desc(const struct gen_device_info *devinfo, SET_BITS(bit_size == 64, 4, 4) | SET_BITS(response_expected, 5, 5); - return brw_dp_desc(devinfo, GEN8_BTI_STATELESS_NON_COHERENT, - msg_type, msg_control); + return brw_dp_desc(devinfo, BRW_BTI_STATELESS, msg_type, msg_control); } static inline uint32_t @@ -825,8 +822,7 @@ brw_dp_a64_untyped_atomic_float_desc(const struct gen_device_info *devinfo, SET_BITS(atomic_op, 1, 0) | SET_BITS(response_expected, 5, 5); - return brw_dp_desc(devinfo, GEN8_BTI_STATELESS_NON_COHERENT, - msg_type, msg_control); + return brw_dp_desc(devinfo, BRW_BTI_STATELESS, msg_type, msg_control); } static inline uint32_t |