diff options
| -rw-r--r-- | lib/mesa/src/gallium/drivers/virgl/virgl_hw.h | 218 | ||||
| -rw-r--r-- | lib/mesa/src/gallium/drivers/virgl/virgl_protocol.h | 133 |
2 files changed, 7 insertions, 344 deletions
diff --git a/lib/mesa/src/gallium/drivers/virgl/virgl_hw.h b/lib/mesa/src/gallium/drivers/virgl/virgl_hw.h index cfa89e2e2..e3c56db2a 100644 --- a/lib/mesa/src/gallium/drivers/virgl/virgl_hw.h +++ b/lib/mesa/src/gallium/drivers/virgl/virgl_hw.h @@ -23,8 +23,6 @@ #ifndef VIRGL_HW_H #define VIRGL_HW_H -#include <stdint.h> - struct virgl_box { uint32_t x, y, z; uint32_t w, h, d; @@ -39,7 +37,6 @@ enum virgl_formats { VIRGL_FORMAT_B5G5R5A1_UNORM = 5, VIRGL_FORMAT_B4G4R4A4_UNORM = 6, VIRGL_FORMAT_B5G6R5_UNORM = 7, - VIRGL_FORMAT_R10G10B10A2_UNORM = 8, VIRGL_FORMAT_L8_UNORM = 9, /**< ubyte luminance */ VIRGL_FORMAT_A8_UNORM = 10, /**< ubyte alpha */ VIRGL_FORMAT_L8A8_UNORM = 12, /**< ubyte alpha, luminance */ @@ -51,74 +48,32 @@ enum virgl_formats { VIRGL_FORMAT_Z24_UNORM_S8_UINT = 19, VIRGL_FORMAT_S8_UINT_Z24_UNORM = 20, VIRGL_FORMAT_Z24X8_UNORM = 21, - VIRGL_FORMAT_X8Z24_UNORM = 22, VIRGL_FORMAT_S8_UINT = 23, /**< ubyte stencil */ - VIRGL_FORMAT_R64_FLOAT = 24, - VIRGL_FORMAT_R64G64_FLOAT = 25, - VIRGL_FORMAT_R64G64B64_FLOAT = 26, - VIRGL_FORMAT_R64G64B64A64_FLOAT = 27, + VIRGL_FORMAT_R32_FLOAT = 28, VIRGL_FORMAT_R32G32_FLOAT = 29, VIRGL_FORMAT_R32G32B32_FLOAT = 30, VIRGL_FORMAT_R32G32B32A32_FLOAT = 31, - VIRGL_FORMAT_R32_UNORM = 32, - VIRGL_FORMAT_R32G32_UNORM = 33, - VIRGL_FORMAT_R32G32B32_UNORM = 34, - VIRGL_FORMAT_R32G32B32A32_UNORM = 35, - VIRGL_FORMAT_R32_USCALED = 36, - VIRGL_FORMAT_R32G32_USCALED = 37, - VIRGL_FORMAT_R32G32B32_USCALED = 38, - VIRGL_FORMAT_R32G32B32A32_USCALED = 39, - VIRGL_FORMAT_R32_SNORM = 40, - VIRGL_FORMAT_R32G32_SNORM = 41, - VIRGL_FORMAT_R32G32B32_SNORM = 42, - VIRGL_FORMAT_R32G32B32A32_SNORM = 43, - VIRGL_FORMAT_R32_SSCALED = 44, - VIRGL_FORMAT_R32G32_SSCALED = 45, - VIRGL_FORMAT_R32G32B32_SSCALED = 46, - VIRGL_FORMAT_R32G32B32A32_SSCALED = 47, - VIRGL_FORMAT_R16_UNORM = 48, VIRGL_FORMAT_R16G16_UNORM = 49, - VIRGL_FORMAT_R16G16B16_UNORM = 50, - VIRGL_FORMAT_R16G16B16A16_UNORM = 51, - VIRGL_FORMAT_R16_USCALED = 52, - VIRGL_FORMAT_R16G16_USCALED = 53, - VIRGL_FORMAT_R16G16B16_USCALED = 54, - VIRGL_FORMAT_R16G16B16A16_USCALED = 55, + VIRGL_FORMAT_R16G16B16A16_UNORM = 51, VIRGL_FORMAT_R16_SNORM = 56, VIRGL_FORMAT_R16G16_SNORM = 57, - VIRGL_FORMAT_R16G16B16_SNORM = 58, VIRGL_FORMAT_R16G16B16A16_SNORM = 59, - VIRGL_FORMAT_R16_SSCALED = 60, - VIRGL_FORMAT_R16G16_SSCALED = 61, - VIRGL_FORMAT_R16G16B16_SSCALED = 62, - VIRGL_FORMAT_R16G16B16A16_SSCALED = 63, - VIRGL_FORMAT_R8_UNORM = 64, VIRGL_FORMAT_R8G8_UNORM = 65, - VIRGL_FORMAT_R8G8B8_UNORM = 66, - VIRGL_FORMAT_R8G8B8A8_UNORM = 67, - VIRGL_FORMAT_R8_USCALED = 69, - VIRGL_FORMAT_R8G8_USCALED = 70, - VIRGL_FORMAT_R8G8B8_USCALED = 71, - VIRGL_FORMAT_R8G8B8A8_USCALED = 72, + VIRGL_FORMAT_R8G8B8A8_UNORM = 67, VIRGL_FORMAT_R8_SNORM = 74, VIRGL_FORMAT_R8G8_SNORM = 75, VIRGL_FORMAT_R8G8B8_SNORM = 76, VIRGL_FORMAT_R8G8B8A8_SNORM = 77, - VIRGL_FORMAT_R8_SSCALED = 82, - VIRGL_FORMAT_R8G8_SSCALED = 83, - VIRGL_FORMAT_R8G8B8_SSCALED = 84, - VIRGL_FORMAT_R8G8B8A8_SSCALED = 85, - VIRGL_FORMAT_R16_FLOAT = 91, VIRGL_FORMAT_R16G16_FLOAT = 92, VIRGL_FORMAT_R16G16B16_FLOAT = 93, @@ -126,14 +81,8 @@ enum virgl_formats { VIRGL_FORMAT_L8_SRGB = 95, VIRGL_FORMAT_L8A8_SRGB = 96, - VIRGL_FORMAT_R8G8B8_SRGB = 97, - VIRGL_FORMAT_A8B8G8R8_SRGB = 98, - VIRGL_FORMAT_X8B8G8R8_SRGB = 99, VIRGL_FORMAT_B8G8R8A8_SRGB = 100, VIRGL_FORMAT_B8G8R8X8_SRGB = 101, - VIRGL_FORMAT_A8R8G8B8_SRGB = 102, - VIRGL_FORMAT_X8R8G8B8_SRGB = 103, - VIRGL_FORMAT_R8G8B8A8_SRGB = 104, /* compressed formats */ VIRGL_FORMAT_DXT1_RGB = 105, @@ -155,7 +104,6 @@ enum virgl_formats { VIRGL_FORMAT_A8B8G8R8_UNORM = 121, VIRGL_FORMAT_B5G5R5X1_UNORM = 122, - VIRGL_FORMAT_R10G10B10A2_USCALED = 123, VIRGL_FORMAT_R11G11B10_FLOAT = 124, VIRGL_FORMAT_R9G9B9E5_FLOAT = 125, VIRGL_FORMAT_Z32_FLOAT_S8X24_UINT = 126, @@ -163,19 +111,10 @@ enum virgl_formats { VIRGL_FORMAT_B10G10R10A2_UNORM = 131, VIRGL_FORMAT_R8G8B8X8_UNORM = 134, VIRGL_FORMAT_B4G4R4X4_UNORM = 135, - VIRGL_FORMAT_X24S8_UINT = 136, - VIRGL_FORMAT_S8X24_UINT = 137, - VIRGL_FORMAT_X32_S8X24_UINT = 138, VIRGL_FORMAT_B2G3R3_UNORM = 139, VIRGL_FORMAT_L16A16_UNORM = 140, VIRGL_FORMAT_A16_UNORM = 141, - VIRGL_FORMAT_I16_UNORM = 142, - - VIRGL_FORMAT_LATC1_UNORM = 143, - VIRGL_FORMAT_LATC1_SNORM = 144, - VIRGL_FORMAT_LATC2_UNORM = 145, - VIRGL_FORMAT_LATC2_SNORM = 146, VIRGL_FORMAT_A8_SNORM = 147, VIRGL_FORMAT_L8_SNORM = 148, @@ -193,16 +132,6 @@ enum virgl_formats { VIRGL_FORMAT_L32_FLOAT = 160, VIRGL_FORMAT_L32A32_FLOAT = 161, - VIRGL_FORMAT_YV12 = 163, - VIRGL_FORMAT_YV16 = 164, - VIRGL_FORMAT_IYUV = 165, /**< aka I420 */ - VIRGL_FORMAT_NV12 = 166, - VIRGL_FORMAT_NV21 = 167, - - VIRGL_FORMAT_R10G10B10A2_SSCALED = 172, - VIRGL_FORMAT_R10G10B10A2_SNORM = 173, - VIRGL_FORMAT_B10G10R10A2_SNORM = 176, - VIRGL_FORMAT_R8_UINT = 177, VIRGL_FORMAT_R8G8_UINT = 178, VIRGL_FORMAT_R8G8B8_UINT = 179, @@ -256,78 +185,17 @@ enum virgl_formats { VIRGL_FORMAT_L32_SINT = 223, VIRGL_FORMAT_L32A32_SINT = 224, - VIRGL_FORMAT_B10G10R10A2_UINT = 225, + VIRGL_FORMAT_B10G10R10A2_UINT = 225, VIRGL_FORMAT_R8G8B8X8_SNORM = 229, VIRGL_FORMAT_R8G8B8X8_SRGB = 230, - VIRGL_FORMAT_R8G8B8X8_UINT = 231, - VIRGL_FORMAT_R8G8B8X8_SINT = 232, VIRGL_FORMAT_B10G10R10X2_UNORM = 233, VIRGL_FORMAT_R16G16B16X16_UNORM = 234, VIRGL_FORMAT_R16G16B16X16_SNORM = 235, - VIRGL_FORMAT_R16G16B16X16_FLOAT = 236, - VIRGL_FORMAT_R16G16B16X16_UINT = 237, - VIRGL_FORMAT_R16G16B16X16_SINT = 238, - VIRGL_FORMAT_R32G32B32X32_FLOAT = 239, - VIRGL_FORMAT_R32G32B32X32_UINT = 240, - VIRGL_FORMAT_R32G32B32X32_SINT = 241, - - VIRGL_FORMAT_R10G10B10A2_UINT = 253, - - VIRGL_FORMAT_BPTC_RGBA_UNORM = 255, - VIRGL_FORMAT_BPTC_SRGBA = 256, - VIRGL_FORMAT_BPTC_RGB_FLOAT = 257, - VIRGL_FORMAT_BPTC_RGB_UFLOAT = 258, - - VIRGL_FORMAT_R10G10B10X2_UNORM = 308, - VIRGL_FORMAT_A4B4G4R4_UNORM = 311, - - VIRGL_FORMAT_R8_SRGB = 312, - VIRGL_FORMAT_MAX /* = PIPE_FORMAT_COUNT */, - - /* Below formats must not be used in the guest. */ - VIRGL_FORMAT_B8G8R8X8_UNORM_EMULATED, - VIRGL_FORMAT_B8G8R8A8_UNORM_EMULATED, - VIRGL_FORMAT_MAX_EXTENDED + VIRGL_FORMAT_MAX, }; -/* These are used by the capability_bits field in virgl_caps_v2. */ -#define VIRGL_CAP_NONE 0 -#define VIRGL_CAP_TGSI_INVARIANT (1 << 0) -#define VIRGL_CAP_TEXTURE_VIEW (1 << 1) -#define VIRGL_CAP_SET_MIN_SAMPLES (1 << 2) -#define VIRGL_CAP_COPY_IMAGE (1 << 3) -#define VIRGL_CAP_TGSI_PRECISE (1 << 4) -#define VIRGL_CAP_TXQS (1 << 5) -#define VIRGL_CAP_MEMORY_BARRIER (1 << 6) -#define VIRGL_CAP_COMPUTE_SHADER (1 << 7) -#define VIRGL_CAP_FB_NO_ATTACH (1 << 8) -#define VIRGL_CAP_ROBUST_BUFFER_ACCESS (1 << 9) -#define VIRGL_CAP_TGSI_FBFETCH (1 << 10) -#define VIRGL_CAP_SHADER_CLOCK (1 << 11) -#define VIRGL_CAP_TEXTURE_BARRIER (1 << 12) -#define VIRGL_CAP_TGSI_COMPONENTS (1 << 13) -#define VIRGL_CAP_GUEST_MAY_INIT_LOG (1 << 14) -#define VIRGL_CAP_SRGB_WRITE_CONTROL (1 << 15) -#define VIRGL_CAP_QBO (1 << 16) -#define VIRGL_CAP_TRANSFER (1 << 17) -#define VIRGL_CAP_FBO_MIXED_COLOR_FORMATS (1 << 18) -#define VIRGL_CAP_FAKE_FP64 (1 << 19) -#define VIRGL_CAP_BIND_COMMAND_ARGS (1 << 20) -#define VIRGL_CAP_MULTI_DRAW_INDIRECT (1 << 21) -#define VIRGL_CAP_INDIRECT_PARAMS (1 << 22) -#define VIRGL_CAP_TRANSFORM_FEEDBACK3 (1 << 23) -#define VIRGL_CAP_3D_ASTC (1 << 24) -#define VIRGL_CAP_INDIRECT_INPUT_ADDR (1 << 25) -#define VIRGL_CAP_COPY_TRANSFER (1 << 26) -#define VIRGL_CAP_CLIP_HALFZ (1 << 27) -#define VIRGL_CAP_APP_TWEAK_SUPPORT (1 << 28) -#define VIRGL_CAP_BGRA_SRGB_IS_EMULATED (1 << 29) - -/* virgl bind flags - these are compatible with mesa 10.5 gallium. - * but are fixed, no other should be passed to virgl either. - */ #define VIRGL_BIND_DEPTH_STENCIL (1 << 0) #define VIRGL_BIND_RENDER_TARGET (1 << 1) #define VIRGL_BIND_SAMPLER_VIEW (1 << 3) @@ -335,21 +203,10 @@ enum virgl_formats { #define VIRGL_BIND_INDEX_BUFFER (1 << 5) #define VIRGL_BIND_CONSTANT_BUFFER (1 << 6) #define VIRGL_BIND_DISPLAY_TARGET (1 << 7) -#define VIRGL_BIND_COMMAND_ARGS (1 << 8) #define VIRGL_BIND_STREAM_OUTPUT (1 << 11) -#define VIRGL_BIND_SHADER_BUFFER (1 << 14) -#define VIRGL_BIND_QUERY_BUFFER (1 << 15) #define VIRGL_BIND_CURSOR (1 << 16) #define VIRGL_BIND_CUSTOM (1 << 17) #define VIRGL_BIND_SCANOUT (1 << 18) -/* Used for buffers that are backed by guest storage and - * are only read by the host. - */ -#define VIRGL_BIND_STAGING (1 << 19) -#define VIRGL_BIND_SHARED (1 << 20) - -/* Extra flags that may be passed */ -#define VIRGL_BIND_PREFER_EMULATED_BGRA (1 << 21) struct virgl_caps_bool_set1 { unsigned indep_blend_enable:1; @@ -375,16 +232,6 @@ struct virgl_caps_bool_set1 { unsigned poly_stipple:1; /* not in GL 3.1 core profile */ unsigned mirror_clamp:1; unsigned texture_query_lod:1; - unsigned has_fp64:1; - unsigned has_tessellation_shaders:1; - unsigned has_indirect_draw:1; - unsigned has_sample_shading:1; - unsigned has_cull:1; - unsigned conditional_render_inverted:1; - unsigned derivative_control:1; - unsigned polygon_offset_clamp:1; - unsigned transform_feedback_overflow_query:1; - /* DO NOT ADD ANYMORE MEMBERS - need to add another 32-bit to v2 caps */ }; /* endless expansion capabilites - current gallium has 252 formats */ @@ -412,62 +259,9 @@ struct virgl_caps_v1 { uint32_t max_texture_gather_components; }; -/* - * This struct should be growable when used in capset 2, - * so we shouldn't have to add a v3 ever. - */ -struct virgl_caps_v2 { - struct virgl_caps_v1 v1; - float min_aliased_point_size; - float max_aliased_point_size; - float min_smooth_point_size; - float max_smooth_point_size; - float min_aliased_line_width; - float max_aliased_line_width; - float min_smooth_line_width; - float max_smooth_line_width; - float max_texture_lod_bias; - uint32_t max_geom_output_vertices; - uint32_t max_geom_total_output_components; - uint32_t max_vertex_outputs; - uint32_t max_vertex_attribs; - uint32_t max_shader_patch_varyings; - int32_t min_texel_offset; - int32_t max_texel_offset; - int32_t min_texture_gather_offset; - int32_t max_texture_gather_offset; - uint32_t texture_buffer_offset_alignment; - uint32_t uniform_buffer_offset_alignment; - uint32_t shader_buffer_offset_alignment; - uint32_t capability_bits; - uint32_t sample_locations[8]; - uint32_t max_vertex_attrib_stride; - uint32_t max_shader_buffer_frag_compute; - uint32_t max_shader_buffer_other_stages; - uint32_t max_shader_image_frag_compute; - uint32_t max_shader_image_other_stages; - uint32_t max_image_samples; - uint32_t max_compute_work_group_invocations; - uint32_t max_compute_shared_memory_size; - uint32_t max_compute_grid_size[3]; - uint32_t max_compute_block_size[3]; - uint32_t max_texture_2d_size; - uint32_t max_texture_3d_size; - uint32_t max_texture_cube_size; - uint32_t max_combined_shader_buffers; - uint32_t max_atomic_counters[6]; - uint32_t max_atomic_counter_buffers[6]; - uint32_t max_combined_atomic_counters; - uint32_t max_combined_atomic_counter_buffers; - uint32_t host_feature_check_version; - struct virgl_supported_format_mask supported_readback_formats; - struct virgl_supported_format_mask scanout; -}; - union virgl_caps { uint32_t max_version; struct virgl_caps_v1 v1; - struct virgl_caps_v2 v2; }; enum virgl_errors { @@ -485,8 +279,8 @@ enum virgl_ctx_errors { VIRGL_ERROR_CTX_ILLEGAL_SURFACE, VIRGL_ERROR_CTX_ILLEGAL_VERTEX_FORMAT, VIRGL_ERROR_CTX_ILLEGAL_CMD_BUFFER, - VIRGL_ERROR_CTX_GLES_HAVE_TES_BUT_MISS_TCS, }; + #define VIRGL_RESOURCE_Y_0_TOP (1 << 0) #endif diff --git a/lib/mesa/src/gallium/drivers/virgl/virgl_protocol.h b/lib/mesa/src/gallium/drivers/virgl/virgl_protocol.h index d14caa292..a2f1e8183 100644 --- a/lib/mesa/src/gallium/drivers/virgl/virgl_protocol.h +++ b/lib/mesa/src/gallium/drivers/virgl/virgl_protocol.h @@ -83,21 +83,6 @@ enum virgl_context_cmd { VIRGL_CCMD_CREATE_SUB_CTX, VIRGL_CCMD_DESTROY_SUB_CTX, VIRGL_CCMD_BIND_SHADER, - VIRGL_CCMD_SET_TESS_STATE, - VIRGL_CCMD_SET_MIN_SAMPLES, - VIRGL_CCMD_SET_SHADER_BUFFERS, - VIRGL_CCMD_SET_SHADER_IMAGES, - VIRGL_CCMD_MEMORY_BARRIER, - VIRGL_CCMD_LAUNCH_GRID, - VIRGL_CCMD_SET_FRAMEBUFFER_STATE_NO_ATTACH, - VIRGL_CCMD_TEXTURE_BARRIER, - VIRGL_CCMD_SET_ATOMIC_BUFFERS, - VIRGL_CCMD_SET_DEBUG_FLAGS, - VIRGL_CCMD_GET_QUERY_RESULT_QBO, - VIRGL_CCMD_TRANSFER3D, - VIRGL_CCMD_END_TRANSFERS, - VIRGL_CCMD_COPY_TRANSFER3D, - VIRGL_CCMD_SET_TWEAKS, }; /* @@ -107,7 +92,6 @@ enum virgl_context_cmd { */ #define VIRGL_CMD0(cmd, obj, len) ((cmd) | ((obj) << 8) | ((len) << 16)) -#define VIRGL_CMD0_MAX_DWORDS (((1ULL << 16) - 1) / 4) * 4 /* hw specification */ #define VIRGL_MAX_COLOR_BUFS 8 @@ -197,7 +181,6 @@ enum virgl_context_cmd { #define VIRGL_OBJ_RS_S0_LINE_LAST_PIXEL(x) (((x) & 0x1) << 28) #define VIRGL_OBJ_RS_S0_HALF_PIXEL_CENTER(x) (((x) & 0x1) << 29) #define VIRGL_OBJ_RS_S0_BOTTOM_EDGE_RULE(x) (((x) & 0x1) << 30) -#define VIRGL_OBJ_RS_S0_FORCE_PERSAMPLE_INTERP(x) (((x) & 0x1) << 31) #define VIRGL_OBJ_RS_POINT_SIZE 3 #define VIRGL_OBJ_RS_SPRITE_COORD_ENABLE 4 @@ -229,7 +212,7 @@ enum virgl_context_cmd { #define VIRGL_OBJ_SHADER_OFFSET_VAL(x) (((x) & 0x7fffffff) << 0) /* start contains full length in VAL - also implies continuations */ /* continuation contains offset in VAL */ -#define VIRGL_OBJ_SHADER_OFFSET_CONT (0x1u << 31) +#define VIRGL_OBJ_SHADER_OFFSET_CONT (0x1 << 31) #define VIRGL_OBJ_SHADER_NUM_TOKENS 4 #define VIRGL_OBJ_SHADER_SO_NUM_OUTPUTS 5 #define VIRGL_OBJ_SHADER_SO_STRIDE(x) (6 + (x)) @@ -292,8 +275,6 @@ enum virgl_context_cmd { /* draw VBO */ #define VIRGL_DRAW_VBO_SIZE 12 -#define VIRGL_DRAW_VBO_SIZE_TESS 14 -#define VIRGL_DRAW_VBO_SIZE_INDIRECT 20 #define VIRGL_DRAW_VBO_START 1 #define VIRGL_DRAW_VBO_COUNT 2 #define VIRGL_DRAW_VBO_MODE 3 @@ -306,16 +287,6 @@ enum virgl_context_cmd { #define VIRGL_DRAW_VBO_MIN_INDEX 10 #define VIRGL_DRAW_VBO_MAX_INDEX 11 #define VIRGL_DRAW_VBO_COUNT_FROM_SO 12 -/* tess packet */ -#define VIRGL_DRAW_VBO_VERTICES_PER_PATCH 13 -#define VIRGL_DRAW_VBO_DRAWID 14 -/* indirect packet */ -#define VIRGL_DRAW_VBO_INDIRECT_HANDLE 15 -#define VIRGL_DRAW_VBO_INDIRECT_OFFSET 16 -#define VIRGL_DRAW_VBO_INDIRECT_STRIDE 17 -#define VIRGL_DRAW_VBO_INDIRECT_DRAW_COUNT 18 -#define VIRGL_DRAW_VBO_INDIRECT_DRAW_COUNT_OFFSET 19 -#define VIRGL_DRAW_VBO_INDIRECT_DRAW_COUNT_HANDLE 20 /* create surface */ #define VIRGL_OBJ_SURFACE_SIZE 5 @@ -346,7 +317,6 @@ enum virgl_context_cmd { #define VIRGL_OBJ_SAMPLE_STATE_S0_MAG_IMG_FILTER(x) (((x) & 0x3) << 13) #define VIRGL_OBJ_SAMPLE_STATE_S0_COMPARE_MODE(x) (((x) & 0x1) << 15) #define VIRGL_OBJ_SAMPLE_STATE_S0_COMPARE_FUNC(x) (((x) & 0x7) << 16) -#define VIRGL_OBJ_SAMPLE_STATE_S0_SEAMLESS_CUBE_MAP(x) (((x) & 0x1) << 19) #define VIRGL_OBJ_SAMPLER_STATE_LOD_BIAS 3 #define VIRGL_OBJ_SAMPLER_STATE_MIN_LOD 4 @@ -454,7 +424,6 @@ enum virgl_context_cmd { #define VIRGL_QUERY_END_HANDLE 1 -#define VIRGL_QUERY_RESULT_SIZE 2 #define VIRGL_QUERY_RESULT_HANDLE 1 #define VIRGL_QUERY_RESULT_WAIT 2 @@ -498,104 +467,4 @@ enum virgl_context_cmd { #define VIRGL_BIND_SHADER_HANDLE 1 #define VIRGL_BIND_SHADER_TYPE 2 -/* tess state */ -#define VIRGL_TESS_STATE_SIZE 6 - -/* set min samples */ -#define VIRGL_SET_MIN_SAMPLES_SIZE 1 -#define VIRGL_SET_MIN_SAMPLES_MASK 1 - -/* set shader buffers */ -#define VIRGL_SET_SHADER_BUFFER_ELEMENT_SIZE 3 -#define VIRGL_SET_SHADER_BUFFER_SIZE(x) (VIRGL_SET_SHADER_BUFFER_ELEMENT_SIZE * (x)) + 2 -#define VIRGL_SET_SHADER_BUFFER_SHADER_TYPE 1 -#define VIRGL_SET_SHADER_BUFFER_START_SLOT 2 -#define VIRGL_SET_SHADER_BUFFER_OFFSET(x) ((x) * VIRGL_SET_SHADER_BUFFER_ELEMENT_SIZE + 3) -#define VIRGL_SET_SHADER_BUFFER_LENGTH(x) ((x) * VIRGL_SET_SHADER_BUFFER_ELEMENT_SIZE + 4) -#define VIRGL_SET_SHADER_BUFFER_RES_HANDLE(x) ((x) * VIRGL_SET_SHADER_BUFFER_ELEMENT_SIZE + 5) - -/* set shader images */ -#define VIRGL_SET_SHADER_IMAGE_ELEMENT_SIZE 5 -#define VIRGL_SET_SHADER_IMAGE_SIZE(x) (VIRGL_SET_SHADER_IMAGE_ELEMENT_SIZE * (x)) + 2 -#define VIRGL_SET_SHADER_IMAGE_SHADER_TYPE 1 -#define VIRGL_SET_SHADER_IMAGE_START_SLOT 2 -#define VIRGL_SET_SHADER_IMAGE_FORMAT(x) ((x) * VIRGL_SET_SHADER_IMAGE_ELEMENT_SIZE + 3) -#define VIRGL_SET_SHADER_IMAGE_ACCESS(x) ((x) * VIRGL_SET_SHADER_IMAGE_ELEMENT_SIZE + 4) -#define VIRGL_SET_SHADER_IMAGE_LAYER_OFFSET(x) ((x) * VIRGL_SET_SHADER_IMAGE_ELEMENT_SIZE + 5) -#define VIRGL_SET_SHADER_IMAGE_LEVEL_SIZE(x) ((x) * VIRGL_SET_SHADER_IMAGE_ELEMENT_SIZE + 6) -#define VIRGL_SET_SHADER_IMAGE_RES_HANDLE(x) ((x) * VIRGL_SET_SHADER_IMAGE_ELEMENT_SIZE + 7) - -/* memory barrier */ -#define VIRGL_MEMORY_BARRIER_SIZE 1 -#define VIRGL_MEMORY_BARRIER_FLAGS 1 - -/* launch grid */ -#define VIRGL_LAUNCH_GRID_SIZE 8 -#define VIRGL_LAUNCH_BLOCK_X 1 -#define VIRGL_LAUNCH_BLOCK_Y 2 -#define VIRGL_LAUNCH_BLOCK_Z 3 -#define VIRGL_LAUNCH_GRID_X 4 -#define VIRGL_LAUNCH_GRID_Y 5 -#define VIRGL_LAUNCH_GRID_Z 6 -#define VIRGL_LAUNCH_INDIRECT_HANDLE 7 -#define VIRGL_LAUNCH_INDIRECT_OFFSET 8 - -/* framebuffer state no attachment */ -#define VIRGL_SET_FRAMEBUFFER_STATE_NO_ATTACH_SIZE 2 -#define VIRGL_SET_FRAMEBUFFER_STATE_NO_ATTACH_WIDTH_HEIGHT 1 -#define VIRGL_SET_FRAMEBUFFER_STATE_NO_ATTACH_WIDTH(x) (x & 0xffff) -#define VIRGL_SET_FRAMEBUFFER_STATE_NO_ATTACH_HEIGHT(x) ((x >> 16) & 0xffff) -#define VIRGL_SET_FRAMEBUFFER_STATE_NO_ATTACH_LAYERS_SAMPLES 2 -#define VIRGL_SET_FRAMEBUFFER_STATE_NO_ATTACH_LAYERS(x) (x & 0xffff) -#define VIRGL_SET_FRAMEBUFFER_STATE_NO_ATTACH_SAMPLES(x) ((x >> 16) & 0xff) - -/* texture barrier */ -#define VIRGL_TEXTURE_BARRIER_SIZE 1 -#define VIRGL_TEXTURE_BARRIER_FLAGS 1 - -/* hw atomics */ -#define VIRGL_SET_ATOMIC_BUFFER_ELEMENT_SIZE 3 -#define VIRGL_SET_ATOMIC_BUFFER_SIZE(x) (VIRGL_SET_ATOMIC_BUFFER_ELEMENT_SIZE * (x)) + 1 -#define VIRGL_SET_ATOMIC_BUFFER_START_SLOT 1 -#define VIRGL_SET_ATOMIC_BUFFER_OFFSET(x) ((x) * VIRGL_SET_ATOMIC_BUFFER_ELEMENT_SIZE + 2) -#define VIRGL_SET_ATOMIC_BUFFER_LENGTH(x) ((x) * VIRGL_SET_ATOMIC_BUFFER_ELEMENT_SIZE + 3) -#define VIRGL_SET_ATOMIC_BUFFER_RES_HANDLE(x) ((x) * VIRGL_SET_ATOMIC_BUFFER_ELEMENT_SIZE + 4) - -/* qbo */ -#define VIRGL_QUERY_RESULT_QBO_SIZE 6 -#define VIRGL_QUERY_RESULT_QBO_HANDLE 1 -#define VIRGL_QUERY_RESULT_QBO_QBO_HANDLE 2 -#define VIRGL_QUERY_RESULT_QBO_WAIT 3 -#define VIRGL_QUERY_RESULT_QBO_RESULT_TYPE 4 -#define VIRGL_QUERY_RESULT_QBO_OFFSET 5 -#define VIRGL_QUERY_RESULT_QBO_INDEX 6 - -#define VIRGL_TRANSFER_TO_HOST 1 -#define VIRGL_TRANSFER_FROM_HOST 2 - -/* Transfer */ -#define VIRGL_TRANSFER3D_SIZE 13 -/* The first 11 dwords are the same as VIRGL_RESOURCE_IW_* */ -#define VIRGL_TRANSFER3D_DATA_OFFSET 12 -#define VIRGL_TRANSFER3D_DIRECTION 13 - -/* Copy transfer */ -#define VIRGL_COPY_TRANSFER3D_SIZE 14 -/* The first 11 dwords are the same as VIRGL_RESOURCE_IW_* */ -#define VIRGL_COPY_TRANSFER3D_SRC_RES_HANDLE 12 -#define VIRGL_COPY_TRANSFER3D_SRC_RES_OFFSET 13 -#define VIRGL_COPY_TRANSFER3D_SYNCHRONIZED 14 - -/* set tweak flags */ -#define VIRGL_SET_TWEAKS_SIZE 2 -#define VIRGL_SET_TWEAKS_ID 1 -#define VIRGL_SET_TWEAKS_VALUE 2 - -enum vrend_tweak_type { - virgl_tweak_gles_brga_emulate, - virgl_tweak_gles_brga_apply_dest_swizzle, - virgl_tweak_gles_tf3_samples_passes_multiplier, - virgl_tweak_undefined -}; - #endif |