diff options
66 files changed, 855 insertions, 412 deletions
diff --git a/lib/mesa/VERSION b/lib/mesa/VERSION index a19b2d9a0..0548779ef 100644 --- a/lib/mesa/VERSION +++ b/lib/mesa/VERSION @@ -1 +1 @@ -18.3.2 +18.3.4 diff --git a/lib/mesa/aclocal.m4 b/lib/mesa/aclocal.m4 index 510aca0f8..49111f19f 100644 --- a/lib/mesa/aclocal.m4 +++ b/lib/mesa/aclocal.m4 @@ -19,32 +19,63 @@ You have another version of autoconf. It may work, but is not guaranteed to. If you have problems, you may need to regenerate the build system entirely. To do so, use the procedure documented by the package, typically 'autoreconf'.])]) -# pkg.m4 - Macros to locate and utilise pkg-config. -*- Autoconf -*- -# serial 1 (pkg-config-0.24) -# -# Copyright © 2004 Scott James Remnant <scott@netsplit.com>. -# -# This program is free software; you can redistribute it and/or modify -# it under the terms of the GNU General Public License as published by -# the Free Software Foundation; either version 2 of the License, or -# (at your option) any later version. -# -# This program is distributed in the hope that it will be useful, but -# WITHOUT ANY WARRANTY; without even the implied warranty of -# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU -# General Public License for more details. -# -# You should have received a copy of the GNU General Public License -# along with this program; if not, write to the Free Software -# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. -# -# As a special exception to the GNU General Public License, if you -# distribute this file as part of a program that contains a -# configuration script generated by Autoconf, you may include it under -# the same distribution terms that you use for the rest of that program. - -# PKG_PROG_PKG_CONFIG([MIN-VERSION]) -# ---------------------------------- +dnl pkg.m4 - Macros to locate and utilise pkg-config. -*- Autoconf -*- +dnl serial 11 (pkg-config-0.29.1) +dnl +dnl Copyright © 2004 Scott James Remnant <scott@netsplit.com>. +dnl Copyright © 2012-2015 Dan Nicholson <dbn.lists@gmail.com> +dnl +dnl This program is free software; you can redistribute it and/or modify +dnl it under the terms of the GNU General Public License as published by +dnl the Free Software Foundation; either version 2 of the License, or +dnl (at your option) any later version. +dnl +dnl This program is distributed in the hope that it will be useful, but +dnl WITHOUT ANY WARRANTY; without even the implied warranty of +dnl MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU +dnl General Public License for more details. +dnl +dnl You should have received a copy of the GNU General Public License +dnl along with this program; if not, write to the Free Software +dnl Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA +dnl 02111-1307, USA. +dnl +dnl As a special exception to the GNU General Public License, if you +dnl distribute this file as part of a program that contains a +dnl configuration script generated by Autoconf, you may include it under +dnl the same distribution terms that you use for the rest of that +dnl program. + +dnl PKG_PREREQ(MIN-VERSION) +dnl ----------------------- +dnl Since: 0.29 +dnl +dnl Verify that the version of the pkg-config macros are at least +dnl MIN-VERSION. Unlike PKG_PROG_PKG_CONFIG, which checks the user's +dnl installed version of pkg-config, this checks the developer's version +dnl of pkg.m4 when generating configure. +dnl +dnl To ensure that this macro is defined, also add: +dnl m4_ifndef([PKG_PREREQ], +dnl [m4_fatal([must install pkg-config 0.29 or later before running autoconf/autogen])]) +dnl +dnl See the "Since" comment for each macro you use to see what version +dnl of the macros you require. +m4_defun([PKG_PREREQ], +[m4_define([PKG_MACROS_VERSION], [0.29.1]) +m4_if(m4_version_compare(PKG_MACROS_VERSION, [$1]), -1, + [m4_fatal([pkg.m4 version $1 or higher is required but ]PKG_MACROS_VERSION[ found])]) +])dnl PKG_PREREQ + +dnl PKG_PROG_PKG_CONFIG([MIN-VERSION]) +dnl ---------------------------------- +dnl Since: 0.16 +dnl +dnl Search for the pkg-config tool and set the PKG_CONFIG variable to +dnl first found in the path. Checks that the version of pkg-config found +dnl is at least MIN-VERSION. If MIN-VERSION is not specified, 0.9.0 is +dnl used since that's the first version where most current features of +dnl pkg-config existed. AC_DEFUN([PKG_PROG_PKG_CONFIG], [m4_pattern_forbid([^_?PKG_[A-Z_]+$]) m4_pattern_allow([^PKG_CONFIG(_(PATH|LIBDIR|SYSROOT_DIR|ALLOW_SYSTEM_(CFLAGS|LIBS)))?$]) @@ -66,18 +97,19 @@ if test -n "$PKG_CONFIG"; then PKG_CONFIG="" fi fi[]dnl -])# PKG_PROG_PKG_CONFIG +])dnl PKG_PROG_PKG_CONFIG -# PKG_CHECK_EXISTS(MODULES, [ACTION-IF-FOUND], [ACTION-IF-NOT-FOUND]) -# -# Check to see whether a particular set of modules exists. Similar -# to PKG_CHECK_MODULES(), but does not set variables or print errors. -# -# Please remember that m4 expands AC_REQUIRE([PKG_PROG_PKG_CONFIG]) -# only at the first occurence in configure.ac, so if the first place -# it's called might be skipped (such as if it is within an "if", you -# have to call PKG_CHECK_EXISTS manually -# -------------------------------------------------------------- +dnl PKG_CHECK_EXISTS(MODULES, [ACTION-IF-FOUND], [ACTION-IF-NOT-FOUND]) +dnl ------------------------------------------------------------------- +dnl Since: 0.18 +dnl +dnl Check to see whether a particular set of modules exists. Similar to +dnl PKG_CHECK_MODULES(), but does not set variables or print errors. +dnl +dnl Please remember that m4 expands AC_REQUIRE([PKG_PROG_PKG_CONFIG]) +dnl only at the first occurence in configure.ac, so if the first place +dnl it's called might be skipped (such as if it is within an "if", you +dnl have to call PKG_CHECK_EXISTS manually AC_DEFUN([PKG_CHECK_EXISTS], [AC_REQUIRE([PKG_PROG_PKG_CONFIG])dnl if test -n "$PKG_CONFIG" && \ @@ -87,8 +119,10 @@ m4_ifvaln([$3], [else $3])dnl fi]) -# _PKG_CONFIG([VARIABLE], [COMMAND], [MODULES]) -# --------------------------------------------- +dnl _PKG_CONFIG([VARIABLE], [COMMAND], [MODULES]) +dnl --------------------------------------------- +dnl Internal wrapper calling pkg-config via PKG_CONFIG and setting +dnl pkg_failed based on the result. m4_define([_PKG_CONFIG], [if test -n "$$1"; then pkg_cv_[]$1="$$1" @@ -100,10 +134,11 @@ m4_define([_PKG_CONFIG], else pkg_failed=untried fi[]dnl -])# _PKG_CONFIG +])dnl _PKG_CONFIG -# _PKG_SHORT_ERRORS_SUPPORTED -# ----------------------------- +dnl _PKG_SHORT_ERRORS_SUPPORTED +dnl --------------------------- +dnl Internal check to see if pkg-config supports short errors. AC_DEFUN([_PKG_SHORT_ERRORS_SUPPORTED], [AC_REQUIRE([PKG_PROG_PKG_CONFIG]) if $PKG_CONFIG --atleast-pkgconfig-version 0.20; then @@ -111,19 +146,17 @@ if $PKG_CONFIG --atleast-pkgconfig-version 0.20; then else _pkg_short_errors_supported=no fi[]dnl -])# _PKG_SHORT_ERRORS_SUPPORTED +])dnl _PKG_SHORT_ERRORS_SUPPORTED -# PKG_CHECK_MODULES(VARIABLE-PREFIX, MODULES, [ACTION-IF-FOUND], -# [ACTION-IF-NOT-FOUND]) -# -# -# Note that if there is a possibility the first call to -# PKG_CHECK_MODULES might not happen, you should be sure to include an -# explicit call to PKG_PROG_PKG_CONFIG in your configure.ac -# -# -# -------------------------------------------------------------- +dnl PKG_CHECK_MODULES(VARIABLE-PREFIX, MODULES, [ACTION-IF-FOUND], +dnl [ACTION-IF-NOT-FOUND]) +dnl -------------------------------------------------------------- +dnl Since: 0.4.0 +dnl +dnl Note that if there is a possibility the first call to +dnl PKG_CHECK_MODULES might not happen, you should be sure to include an +dnl explicit call to PKG_PROG_PKG_CONFIG in your configure.ac AC_DEFUN([PKG_CHECK_MODULES], [AC_REQUIRE([PKG_PROG_PKG_CONFIG])dnl AC_ARG_VAR([$1][_CFLAGS], [C compiler flags for $1, overriding pkg-config])dnl @@ -177,16 +210,40 @@ else AC_MSG_RESULT([yes]) $3 fi[]dnl -])# PKG_CHECK_MODULES +])dnl PKG_CHECK_MODULES -# PKG_INSTALLDIR(DIRECTORY) -# ------------------------- -# Substitutes the variable pkgconfigdir as the location where a module -# should install pkg-config .pc files. By default the directory is -# $libdir/pkgconfig, but the default can be changed by passing -# DIRECTORY. The user can override through the --with-pkgconfigdir -# parameter. +dnl PKG_CHECK_MODULES_STATIC(VARIABLE-PREFIX, MODULES, [ACTION-IF-FOUND], +dnl [ACTION-IF-NOT-FOUND]) +dnl --------------------------------------------------------------------- +dnl Since: 0.29 +dnl +dnl Checks for existence of MODULES and gathers its build flags with +dnl static libraries enabled. Sets VARIABLE-PREFIX_CFLAGS from --cflags +dnl and VARIABLE-PREFIX_LIBS from --libs. +dnl +dnl Note that if there is a possibility the first call to +dnl PKG_CHECK_MODULES_STATIC might not happen, you should be sure to +dnl include an explicit call to PKG_PROG_PKG_CONFIG in your +dnl configure.ac. +AC_DEFUN([PKG_CHECK_MODULES_STATIC], +[AC_REQUIRE([PKG_PROG_PKG_CONFIG])dnl +_save_PKG_CONFIG=$PKG_CONFIG +PKG_CONFIG="$PKG_CONFIG --static" +PKG_CHECK_MODULES($@) +PKG_CONFIG=$_save_PKG_CONFIG[]dnl +])dnl PKG_CHECK_MODULES_STATIC + + +dnl PKG_INSTALLDIR([DIRECTORY]) +dnl ------------------------- +dnl Since: 0.27 +dnl +dnl Substitutes the variable pkgconfigdir as the location where a module +dnl should install pkg-config .pc files. By default the directory is +dnl $libdir/pkgconfig, but the default can be changed by passing +dnl DIRECTORY. The user can override through the --with-pkgconfigdir +dnl parameter. AC_DEFUN([PKG_INSTALLDIR], [m4_pushdef([pkg_default], [m4_default([$1], ['${libdir}/pkgconfig'])]) m4_pushdef([pkg_description], @@ -197,16 +254,18 @@ AC_ARG_WITH([pkgconfigdir], AC_SUBST([pkgconfigdir], [$with_pkgconfigdir]) m4_popdef([pkg_default]) m4_popdef([pkg_description]) -]) dnl PKG_INSTALLDIR +])dnl PKG_INSTALLDIR -# PKG_NOARCH_INSTALLDIR(DIRECTORY) -# ------------------------- -# Substitutes the variable noarch_pkgconfigdir as the location where a -# module should install arch-independent pkg-config .pc files. By -# default the directory is $datadir/pkgconfig, but the default can be -# changed by passing DIRECTORY. The user can override through the -# --with-noarch-pkgconfigdir parameter. +dnl PKG_NOARCH_INSTALLDIR([DIRECTORY]) +dnl -------------------------------- +dnl Since: 0.27 +dnl +dnl Substitutes the variable noarch_pkgconfigdir as the location where a +dnl module should install arch-independent pkg-config .pc files. By +dnl default the directory is $datadir/pkgconfig, but the default can be +dnl changed by passing DIRECTORY. The user can override through the +dnl --with-noarch-pkgconfigdir parameter. AC_DEFUN([PKG_NOARCH_INSTALLDIR], [m4_pushdef([pkg_default], [m4_default([$1], ['${datadir}/pkgconfig'])]) m4_pushdef([pkg_description], @@ -217,7 +276,7 @@ AC_ARG_WITH([noarch-pkgconfigdir], AC_SUBST([noarch_pkgconfigdir], [$with_noarch_pkgconfigdir]) m4_popdef([pkg_default]) m4_popdef([pkg_description]) -]) dnl PKG_NOARCH_INSTALLDIR +])dnl PKG_NOARCH_INSTALLDIR dnl PKG_CHECK_VAR(VARIABLE, MODULE, CONFIG-VARIABLE, diff --git a/lib/mesa/configure b/lib/mesa/configure index fb58b431b..e5c358498 100755 --- a/lib/mesa/configure +++ b/lib/mesa/configure @@ -1,6 +1,6 @@ #! /bin/sh # Guess values for system-dependent variables and create Makefiles. -# Generated by GNU Autoconf 2.69 for Mesa 18.3.2. +# Generated by GNU Autoconf 2.69 for Mesa 18.3.4. # # Report bugs to <https://bugs.freedesktop.org/enter_bug.cgi?product=Mesa>. # @@ -591,8 +591,8 @@ MAKEFLAGS= # Identity of this package. PACKAGE_NAME='Mesa' PACKAGE_TARNAME='mesa' -PACKAGE_VERSION='18.3.2' -PACKAGE_STRING='Mesa 18.3.2' +PACKAGE_VERSION='18.3.4' +PACKAGE_STRING='Mesa 18.3.4' PACKAGE_BUGREPORT='https://bugs.freedesktop.org/enter_bug.cgi?product=Mesa' PACKAGE_URL='' @@ -1894,7 +1894,7 @@ if test "$ac_init_help" = "long"; then # Omit some internal or obsolete options to make the list less imposing. # This message is too long to be a string in the A/UX 3.1 sh. cat <<_ACEOF -\`configure' configures Mesa 18.3.2 to adapt to many kinds of systems. +\`configure' configures Mesa 18.3.4 to adapt to many kinds of systems. Usage: $0 [OPTION]... [VAR=VALUE]... @@ -1965,7 +1965,7 @@ fi if test -n "$ac_init_help"; then case $ac_init_help in - short | recursive ) echo "Configuration of Mesa 18.3.2:";; + short | recursive ) echo "Configuration of Mesa 18.3.4:";; esac cat <<\_ACEOF @@ -2349,7 +2349,7 @@ fi test -n "$ac_init_help" && exit $ac_status if $ac_init_version; then cat <<\_ACEOF -Mesa configure 18.3.2 +Mesa configure 18.3.4 generated by GNU Autoconf 2.69 Copyright (C) 2012 Free Software Foundation, Inc. @@ -3068,7 +3068,7 @@ cat >config.log <<_ACEOF This file contains any messages produced by compilers while running configure, to aid debugging if configure makes a mistake. -It was created by Mesa $as_me 18.3.2, which was +It was created by Mesa $as_me 18.3.4, which was generated by GNU Autoconf 2.69. Invocation command line was $ $0 $@ @@ -4004,7 +4004,7 @@ fi # Define the identity of the package. PACKAGE='mesa' - VERSION='18.3.2' + VERSION='18.3.4' cat >>confdefs.h <<_ACEOF @@ -25415,6 +25415,7 @@ fi ;; drm) + test "x$enable_egl" = "xyes" && test "x$enable_gbm" = "xno" && as_fn_error $? "EGL platform drm needs gbm" "$LINENO" 5 DEFINES="$DEFINES -DHAVE_DRM_PLATFORM" @@ -30955,7 +30956,7 @@ cat >>$CONFIG_STATUS <<\_ACEOF || ac_write_fail=1 # report actual input values of CONFIG_FILES etc. instead of their # values after options handling. ac_log=" -This file was extended by Mesa $as_me 18.3.2, which was +This file was extended by Mesa $as_me 18.3.4, which was generated by GNU Autoconf 2.69. Invocation command line was CONFIG_FILES = $CONFIG_FILES @@ -31012,7 +31013,7 @@ _ACEOF cat >>$CONFIG_STATUS <<_ACEOF || ac_write_fail=1 ac_cs_config="`$as_echo "$ac_configure_args" | sed 's/^ //; s/[\\""\`\$]/\\\\&/g'`" ac_cs_version="\\ -Mesa config.status 18.3.2 +Mesa config.status 18.3.4 configured by $0, generated by GNU Autoconf 2.69, with options \\"\$ac_cs_config\\" diff --git a/lib/mesa/configure.ac b/lib/mesa/configure.ac index 5f7782e2b..ef4f73777 100644 --- a/lib/mesa/configure.ac +++ b/lib/mesa/configure.ac @@ -1894,6 +1894,7 @@ for plat in $platforms; do ;; drm) + test "x$enable_egl" = "xyes" && test "x$enable_gbm" = "xno" && AC_MSG_ERROR([EGL platform drm needs gbm]) DEFINES="$DEFINES -DHAVE_DRM_PLATFORM" diff --git a/lib/mesa/include/CL/cl_d3d10.h b/lib/mesa/include/CL/cl_d3d10.h index 8c763808c..aedac33f8 100644 --- a/lib/mesa/include/CL/cl_d3d10.h +++ b/lib/mesa/include/CL/cl_d3d10.h @@ -21,7 +21,7 @@ * MATERIALS OR THE USE OR OTHER DEALINGS IN THE MATERIALS. **********************************************************************************/ -/* $Revision: 1.12 $ on $Date: 2019/01/29 11:52:05 $ */ +/* $Revision: 1.13 $ on $Date: 2019/02/19 04:24:00 $ */ #ifndef __OPENCL_CL_D3D10_H #define __OPENCL_CL_D3D10_H diff --git a/lib/mesa/include/CL/cl_d3d11.h b/lib/mesa/include/CL/cl_d3d11.h index 482821eb8..cb0cfa480 100644 --- a/lib/mesa/include/CL/cl_d3d11.h +++ b/lib/mesa/include/CL/cl_d3d11.h @@ -21,7 +21,7 @@ * MATERIALS OR THE USE OR OTHER DEALINGS IN THE MATERIALS. **********************************************************************************/ -/* $Revision: 1.12 $ on $Date: 2019/01/29 11:52:05 $ */ +/* $Revision: 1.13 $ on $Date: 2019/02/19 04:24:00 $ */ #ifndef __OPENCL_CL_D3D11_H #define __OPENCL_CL_D3D11_H diff --git a/lib/mesa/include/CL/cl_dx9_media_sharing.h b/lib/mesa/include/CL/cl_dx9_media_sharing.h index 871996c9f..c0a0fc8ab 100644 --- a/lib/mesa/include/CL/cl_dx9_media_sharing.h +++ b/lib/mesa/include/CL/cl_dx9_media_sharing.h @@ -21,7 +21,7 @@ * MATERIALS OR THE USE OR OTHER DEALINGS IN THE MATERIALS. **********************************************************************************/ -/* $Revision: 1.12 $ on $Date: 2019/01/29 11:52:05 $ */ +/* $Revision: 1.13 $ on $Date: 2019/02/19 04:24:00 $ */ #ifndef __OPENCL_CL_DX9_MEDIA_SHARING_H #define __OPENCL_CL_DX9_MEDIA_SHARING_H diff --git a/lib/mesa/include/CL/cl_ext.h b/lib/mesa/include/CL/cl_ext.h index b203e7abf..02df31cc6 100644 --- a/lib/mesa/include/CL/cl_ext.h +++ b/lib/mesa/include/CL/cl_ext.h @@ -21,7 +21,7 @@ * MATERIALS OR THE USE OR OTHER DEALINGS IN THE MATERIALS. ******************************************************************************/ -/* $Revision: 1.12 $ on $Date: 2019/01/29 11:52:05 $ */ +/* $Revision: 1.13 $ on $Date: 2019/02/19 04:24:00 $ */ /* cl_ext.h contains OpenCL extensions which don't have external */ /* (OpenGL, D3D) dependencies. */ diff --git a/lib/mesa/include/CL/cl_gl_ext.h b/lib/mesa/include/CL/cl_gl_ext.h index 8ded0fbcc..37e279b9e 100644 --- a/lib/mesa/include/CL/cl_gl_ext.h +++ b/lib/mesa/include/CL/cl_gl_ext.h @@ -21,7 +21,7 @@ * MATERIALS OR THE USE OR OTHER DEALINGS IN THE MATERIALS. **********************************************************************************/ -/* $Revision: 1.12 $ on $Date: 2019/01/29 11:52:05 $ */ +/* $Revision: 1.13 $ on $Date: 2019/02/19 04:24:00 $ */ /* cl_gl_ext.h contains vendor (non-KHR) OpenCL extensions which have */ /* OpenGL dependencies. */ diff --git a/lib/mesa/include/CL/cl_platform.h b/lib/mesa/include/CL/cl_platform.h index 2730edeb8..2d4158218 100644 --- a/lib/mesa/include/CL/cl_platform.h +++ b/lib/mesa/include/CL/cl_platform.h @@ -21,7 +21,7 @@ * MATERIALS OR THE USE OR OTHER DEALINGS IN THE MATERIALS. **********************************************************************************/ -/* $Revision: 1.12 $ on $Date: 2019/01/29 11:52:05 $ */ +/* $Revision: 1.13 $ on $Date: 2019/02/19 04:24:00 $ */ #ifndef __CL_PLATFORM_H #define __CL_PLATFORM_H diff --git a/lib/mesa/include/CL/opencl.h b/lib/mesa/include/CL/opencl.h index 5701295d3..a89bb87b5 100644 --- a/lib/mesa/include/CL/opencl.h +++ b/lib/mesa/include/CL/opencl.h @@ -21,7 +21,7 @@ * MATERIALS OR THE USE OR OTHER DEALINGS IN THE MATERIALS. ******************************************************************************/ -/* $Revision: 1.12 $ on $Date: 2019/01/29 11:52:05 $ */ +/* $Revision: 1.13 $ on $Date: 2019/02/19 04:24:00 $ */ #ifndef __OPENCL_H #define __OPENCL_H diff --git a/lib/mesa/include/EGL/eglplatform.h b/lib/mesa/include/EGL/eglplatform.h index d13260bab..61079a136 100644 --- a/lib/mesa/include/EGL/eglplatform.h +++ b/lib/mesa/include/EGL/eglplatform.h @@ -25,7 +25,7 @@ */ /* Platform-specific types and definitions for egl.h - * $Revision: 1.12 $ on $Date: 2019/01/29 11:52:05 $ + * $Revision: 1.13 $ on $Date: 2019/02/19 04:24:00 $ * * Adopters may modify khrplatform.h and this file to suit their platform. * You are encouraged to submit all modifications to the Khronos group so that diff --git a/lib/mesa/include/GL/internal/dri_interface.h b/lib/mesa/include/GL/internal/dri_interface.h index 6f9c2c8b8..c1c15013a 100644 --- a/lib/mesa/include/GL/internal/dri_interface.h +++ b/lib/mesa/include/GL/internal/dri_interface.h @@ -589,7 +589,7 @@ struct __DRIdamageExtensionRec { * SWRast Loader extension. */ #define __DRI_SWRAST_LOADER "DRI_SWRastLoader" -#define __DRI_SWRAST_LOADER_VERSION 4 +#define __DRI_SWRAST_LOADER_VERSION 5 struct __DRIswrastLoaderExtensionRec { __DRIextension base; @@ -649,6 +649,23 @@ struct __DRIswrastLoaderExtensionRec { void (*getImageShm)(__DRIdrawable *readable, int x, int y, int width, int height, int shmid, void *loaderPrivate); + + /** + * Put shm image to drawable (v2) + * + * The original version fixes srcx/y to 0, and expected + * the offset to be adjusted. This version allows src x,y + * to not be included in the offset. This is needed to + * avoid certain overflow checks in the X server, that + * result in lost rendering. + * + * \since 5 + */ + void (*putImageShm2)(__DRIdrawable *drawable, int op, + int x, int y, + int width, int height, int stride, + int shmid, char *shmaddr, unsigned offset, + void *loaderPrivate); }; /** diff --git a/lib/mesa/include/GLES3/gl31.h b/lib/mesa/include/GLES3/gl31.h index 272ed19bb..c4b6f1ef4 100644 --- a/lib/mesa/include/GLES3/gl31.h +++ b/lib/mesa/include/GLES3/gl31.h @@ -33,7 +33,7 @@ extern "C" { ** used to make the header, and the header can be found at ** http://www.opengl.org/registry/ ** -** Khronos $Revision: 1.12 $ on $Date: 2019/01/29 11:52:05 $ +** Khronos $Revision: 1.13 $ on $Date: 2019/02/19 04:24:00 $ */ #include <GLES3/gl3platform.h> diff --git a/lib/mesa/include/GLES3/gl3ext.h b/lib/mesa/include/GLES3/gl3ext.h index d26bb6915..1d24617ad 100644 --- a/lib/mesa/include/GLES3/gl3ext.h +++ b/lib/mesa/include/GLES3/gl3ext.h @@ -1,7 +1,7 @@ #ifndef __gl3ext_h_ #define __gl3ext_h_ -/* $Revision: 1.12 $ on $Date: 2019/01/29 11:52:05 $ */ +/* $Revision: 1.13 $ on $Date: 2019/02/19 04:24:00 $ */ /* * This document is licensed under the SGI Free Software B License Version diff --git a/lib/mesa/include/KHR/khrplatform.h b/lib/mesa/include/KHR/khrplatform.h index 2c3f53d79..f60a58439 100644 --- a/lib/mesa/include/KHR/khrplatform.h +++ b/lib/mesa/include/KHR/khrplatform.h @@ -26,7 +26,7 @@ /* Khronos platform-specific types and definitions. * - * $Revision: 1.12 $ on $Date: 2019/01/29 11:52:05 $ + * $Revision: 1.13 $ on $Date: 2019/02/19 04:24:00 $ * * Adopters may modify this file to suit their platform. Adopters are * encouraged to submit platform specific modifications to the Khronos diff --git a/lib/mesa/include/pci_ids/i965_pci_ids.h b/lib/mesa/include/pci_ids/i965_pci_ids.h index 7201562d8..b91abd7a3 100644 --- a/lib/mesa/include/pci_ids/i965_pci_ids.h +++ b/lib/mesa/include/pci_ids/i965_pci_ids.h @@ -171,6 +171,7 @@ CHIPSET(0x3185, glk_2x6, "Intel(R) UHD Graphics 600 (Geminilake 2x6)") CHIPSET(0x3E90, cfl_gt1, "Intel(R) UHD Graphics 610 (Coffeelake 2x6 GT1)") CHIPSET(0x3E93, cfl_gt1, "Intel(R) UHD Graphics 610 (Coffeelake 2x6 GT1)") CHIPSET(0x3E99, cfl_gt1, "Intel(R) HD Graphics (Coffeelake 2x6 GT1)") +CHIPSET(0x3E9C, cfl_gt1, "Intel(R) HD Graphics (Coffeelake 2x6 GT1)") CHIPSET(0x3E91, cfl_gt2, "Intel(R) UHD Graphics 630 (Coffeelake 3x8 GT2)") CHIPSET(0x3E92, cfl_gt2, "Intel(R) UHD Graphics 630 (Coffeelake 3x8 GT2)") CHIPSET(0x3E96, cfl_gt2, "Intel(R) HD Graphics (Coffeelake 3x8 GT2)") @@ -203,6 +204,10 @@ CHIPSET(0x5A54, cnl_5x8, "Intel(R) HD Graphics (Cannonlake 5x8 GT2)") CHIPSET(0x8A50, icl_8x8, "Intel(R) HD Graphics (Ice Lake 8x8 GT2)") CHIPSET(0x8A51, icl_8x8, "Intel(R) HD Graphics (Ice Lake 8x8 GT2)") CHIPSET(0x8A52, icl_8x8, "Intel(R) HD Graphics (Ice Lake 8x8 GT2)") +CHIPSET(0x8A56, icl_4x8, "Intel(R) HD Graphics (Ice Lake 4x8 GT1)") +CHIPSET(0x8A57, icl_6x8, "Intel(R) HD Graphics (Ice Lake 6x8 GT1.5)") +CHIPSET(0x8A58, icl_4x8, "Intel(R) HD Graphics (Ice Lake 4x8 GT1)") +CHIPSET(0x8A59, icl_6x8, "Intel(R) HD Graphics (Ice Lake 6x8 GT1.5)") CHIPSET(0x8A5A, icl_6x8, "Intel(R) HD Graphics (Ice Lake 6x8 GT1.5)") CHIPSET(0x8A5B, icl_4x8, "Intel(R) HD Graphics (Ice Lake 4x8 GT1)") CHIPSET(0x8A5C, icl_6x8, "Intel(R) HD Graphics (Ice Lake 6x8 GT1.5)") diff --git a/lib/mesa/src/amd/common/ac_nir_to_llvm.c b/lib/mesa/src/amd/common/ac_nir_to_llvm.c index 827cb5d85..593ca7100 100644 --- a/lib/mesa/src/amd/common/ac_nir_to_llvm.c +++ b/lib/mesa/src/amd/common/ac_nir_to_llvm.c @@ -2072,7 +2072,7 @@ visit_store_var(struct ac_nir_context *ctx, int writemask = instr->const_index[0]; LLVMValueRef address = get_src(ctx, instr->src[0]); LLVMValueRef val = get_src(ctx, instr->src[1]); - if (util_is_power_of_two_nonzero(writemask)) { + if (writemask == (1u << ac_get_llvm_num_components(val)) - 1) { val = LLVMBuildBitCast( ctx->ac.builder, val, LLVMGetElementType(LLVMTypeOf(address)), ""); @@ -2802,15 +2802,16 @@ static LLVMValueRef visit_interp(struct ac_nir_context *ctx, const nir_intrinsic_instr *instr) { LLVMValueRef result[4]; - LLVMValueRef interp_param, attr_number; + LLVMValueRef interp_param; unsigned location; unsigned chan; LLVMValueRef src_c0 = NULL; LLVMValueRef src_c1 = NULL; LLVMValueRef src0 = NULL; - nir_variable *var = nir_deref_instr_get_variable(nir_instr_as_deref(instr->src[0].ssa->parent_instr)); - int input_index = ctx->abi->fs_input_attr_indices[var->data.location - VARYING_SLOT_VAR0]; + nir_deref_instr *deref_instr = nir_instr_as_deref(instr->src[0].ssa->parent_instr); + nir_variable *var = nir_deref_instr_get_variable(deref_instr); + int input_base = ctx->abi->fs_input_attr_indices[var->data.location - VARYING_SLOT_VAR0]; switch (instr->intrinsic) { case nir_intrinsic_interp_deref_at_centroid: location = INTERP_CENTROID; @@ -2840,7 +2841,6 @@ static LLVMValueRef visit_interp(struct ac_nir_context *ctx, src_c1 = LLVMBuildFSub(ctx->ac.builder, src_c1, halfval, ""); } interp_param = ctx->abi->lookup_interp_param(ctx->abi, var->data.interpolation, location); - attr_number = LLVMConstInt(ctx->ac.i32, input_index, false); if (location == INTERP_CENTER) { LLVMValueRef ij_out[2]; @@ -2878,26 +2878,65 @@ static LLVMValueRef visit_interp(struct ac_nir_context *ctx, } + LLVMValueRef array_idx = ctx->ac.i32_0; + while(deref_instr->deref_type != nir_deref_type_var) { + if (deref_instr->deref_type == nir_deref_type_array) { + unsigned array_size = glsl_get_aoa_size(deref_instr->type); + if (!array_size) + array_size = 1; + + LLVMValueRef offset; + nir_const_value *const_value = nir_src_as_const_value(deref_instr->arr.index); + if (const_value) { + offset = LLVMConstInt(ctx->ac.i32, array_size * const_value->u32[0], false); + } else { + LLVMValueRef indirect = get_src(ctx, deref_instr->arr.index); + + offset = LLVMBuildMul(ctx->ac.builder, indirect, + LLVMConstInt(ctx->ac.i32, array_size, false), ""); + } + + array_idx = LLVMBuildAdd(ctx->ac.builder, array_idx, offset, ""); + deref_instr = nir_src_as_deref(deref_instr->parent); + } else { + unreachable("Unsupported deref type"); + } + + } + + unsigned input_array_size = glsl_get_aoa_size(var->type); + if (!input_array_size) + input_array_size = 1; + for (chan = 0; chan < 4; chan++) { + LLVMValueRef gather = LLVMGetUndef(LLVMVectorType(ctx->ac.f32, input_array_size)); LLVMValueRef llvm_chan = LLVMConstInt(ctx->ac.i32, chan, false); - if (interp_param) { - interp_param = LLVMBuildBitCast(ctx->ac.builder, + for (unsigned idx = 0; idx < input_array_size; ++idx) { + LLVMValueRef v, attr_number; + + attr_number = LLVMConstInt(ctx->ac.i32, input_base + idx, false); + if (interp_param) { + interp_param = LLVMBuildBitCast(ctx->ac.builder, interp_param, ctx->ac.v2f32, ""); - LLVMValueRef i = LLVMBuildExtractElement( - ctx->ac.builder, interp_param, ctx->ac.i32_0, ""); - LLVMValueRef j = LLVMBuildExtractElement( - ctx->ac.builder, interp_param, ctx->ac.i32_1, ""); - - result[chan] = ac_build_fs_interp(&ctx->ac, - llvm_chan, attr_number, - ctx->abi->prim_mask, i, j); - } else { - result[chan] = ac_build_fs_interp_mov(&ctx->ac, - LLVMConstInt(ctx->ac.i32, 2, false), - llvm_chan, attr_number, - ctx->abi->prim_mask); + LLVMValueRef i = LLVMBuildExtractElement( + ctx->ac.builder, interp_param, ctx->ac.i32_0, ""); + LLVMValueRef j = LLVMBuildExtractElement( + ctx->ac.builder, interp_param, ctx->ac.i32_1, ""); + + v = ac_build_fs_interp(&ctx->ac, llvm_chan, attr_number, + ctx->abi->prim_mask, i, j); + } else { + v = ac_build_fs_interp_mov(&ctx->ac, LLVMConstInt(ctx->ac.i32, 2, false), + llvm_chan, attr_number, ctx->abi->prim_mask); + } + + gather = LLVMBuildInsertElement(ctx->ac.builder, gather, v, + LLVMConstInt(ctx->ac.i32, idx, false), ""); } + + result[chan] = LLVMBuildExtractElement(ctx->ac.builder, gather, array_idx, ""); + } return ac_build_varying_gather_values(&ctx->ac, result, instr->num_components, var->data.location_frac); @@ -3460,7 +3499,7 @@ static void visit_tex(struct ac_nir_context *ctx, nir_tex_instr *instr) * It's unnecessary if the original texture format was * Z32_FLOAT, but we don't know that here. */ - if (args.compare && ctx->ac.chip_class == VI && ctx->abi->clamp_shadow_reference) + if (args.compare && ctx->ac.chip_class >= VI && ctx->abi->clamp_shadow_reference) args.compare = ac_build_clamp(&ctx->ac, ac_to_float(&ctx->ac, args.compare)); /* pack derivatives */ @@ -3851,7 +3890,7 @@ ac_handle_shader_output_decl(struct ac_llvm_context *ctx, } } - bool is_16bit = glsl_type_is_16bit(variable->type); + bool is_16bit = glsl_type_is_16bit(glsl_without_array(variable->type)); LLVMTypeRef type = is_16bit ? ctx->f16 : ctx->f32; for (unsigned i = 0; i < attrib_count; ++i) { for (unsigned chan = 0; chan < 4; chan++) { diff --git a/lib/mesa/src/amd/vulkan/radv_descriptor_set.c b/lib/mesa/src/amd/vulkan/radv_descriptor_set.c index 351cc1613..6ee949c3f 100644 --- a/lib/mesa/src/amd/vulkan/radv_descriptor_set.c +++ b/lib/mesa/src/amd/vulkan/radv_descriptor_set.c @@ -84,7 +84,9 @@ VkResult radv_CreateDescriptorSetLayout( uint32_t immutable_sampler_count = 0; for (uint32_t j = 0; j < pCreateInfo->bindingCount; j++) { max_binding = MAX2(max_binding, pCreateInfo->pBindings[j].binding); - if (pCreateInfo->pBindings[j].pImmutableSamplers) + if ((pCreateInfo->pBindings[j].descriptorType == VK_DESCRIPTOR_TYPE_COMBINED_IMAGE_SAMPLER || + pCreateInfo->pBindings[j].descriptorType == VK_DESCRIPTOR_TYPE_SAMPLER) && + pCreateInfo->pBindings[j].pImmutableSamplers) immutable_sampler_count += pCreateInfo->pBindings[j].descriptorCount; } @@ -182,7 +184,9 @@ VkResult radv_CreateDescriptorSetLayout( set_layout->has_variable_descriptors = true; } - if (binding->pImmutableSamplers) { + if ((binding->descriptorType == VK_DESCRIPTOR_TYPE_COMBINED_IMAGE_SAMPLER || + binding->descriptorType == VK_DESCRIPTOR_TYPE_SAMPLER) && + binding->pImmutableSamplers) { set_layout->binding[b].immutable_samplers_offset = samplers_offset; set_layout->binding[b].immutable_samplers_equal = has_equal_immutable_samplers(binding->pImmutableSamplers, binding->descriptorCount); diff --git a/lib/mesa/src/amd/vulkan/radv_device.c b/lib/mesa/src/amd/vulkan/radv_device.c index ac6cff23d..a3b18845a 100644 --- a/lib/mesa/src/amd/vulkan/radv_device.c +++ b/lib/mesa/src/amd/vulkan/radv_device.c @@ -525,7 +525,7 @@ VkResult radv_CreateInstance( pCreateInfo->pApplicationInfo->apiVersion != 0) { client_version = pCreateInfo->pApplicationInfo->apiVersion; } else { - radv_EnumerateInstanceVersion(&client_version); + client_version = VK_API_VERSION_1_0; } instance = vk_zalloc2(&default_alloc, pAllocator, sizeof(*instance), 8, diff --git a/lib/mesa/src/amd/vulkan/radv_meta_blit.c b/lib/mesa/src/amd/vulkan/radv_meta_blit.c index ef690edb4..f3a8f6464 100644 --- a/lib/mesa/src/amd/vulkan/radv_meta_blit.c +++ b/lib/mesa/src/amd/vulkan/radv_meta_blit.c @@ -849,54 +849,60 @@ build_pipeline(struct radv_device *device, .subpass = 0, }; - switch(aspect) { - case VK_IMAGE_ASPECT_COLOR_BIT: - vk_pipeline_info.pColorBlendState = &(VkPipelineColorBlendStateCreateInfo) { - .sType = VK_STRUCTURE_TYPE_PIPELINE_COLOR_BLEND_STATE_CREATE_INFO, - .attachmentCount = 1, - .pAttachments = (VkPipelineColorBlendAttachmentState []) { - { .colorWriteMask = - VK_COLOR_COMPONENT_A_BIT | - VK_COLOR_COMPONENT_R_BIT | - VK_COLOR_COMPONENT_G_BIT | - VK_COLOR_COMPONENT_B_BIT }, + VkPipelineColorBlendStateCreateInfo color_blend_info = { + .sType = VK_STRUCTURE_TYPE_PIPELINE_COLOR_BLEND_STATE_CREATE_INFO, + .attachmentCount = 1, + .pAttachments = (VkPipelineColorBlendAttachmentState []) { + { + .colorWriteMask = VK_COLOR_COMPONENT_A_BIT | + VK_COLOR_COMPONENT_R_BIT | + VK_COLOR_COMPONENT_G_BIT | + VK_COLOR_COMPONENT_B_BIT }, } }; + + VkPipelineDepthStencilStateCreateInfo depth_info = { + .sType = VK_STRUCTURE_TYPE_PIPELINE_DEPTH_STENCIL_STATE_CREATE_INFO, + .depthTestEnable = true, + .depthWriteEnable = true, + .depthCompareOp = VK_COMPARE_OP_ALWAYS, + }; + + VkPipelineDepthStencilStateCreateInfo stencil_info = { + .sType = VK_STRUCTURE_TYPE_PIPELINE_DEPTH_STENCIL_STATE_CREATE_INFO, + .depthTestEnable = false, + .depthWriteEnable = false, + .stencilTestEnable = true, + .front = { + .failOp = VK_STENCIL_OP_REPLACE, + .passOp = VK_STENCIL_OP_REPLACE, + .depthFailOp = VK_STENCIL_OP_REPLACE, + .compareOp = VK_COMPARE_OP_ALWAYS, + .compareMask = 0xff, + .writeMask = 0xff, + .reference = 0 + }, + .back = { + .failOp = VK_STENCIL_OP_REPLACE, + .passOp = VK_STENCIL_OP_REPLACE, + .depthFailOp = VK_STENCIL_OP_REPLACE, + .compareOp = VK_COMPARE_OP_ALWAYS, + .compareMask = 0xff, + .writeMask = 0xff, + .reference = 0 + }, + .depthCompareOp = VK_COMPARE_OP_ALWAYS, + }; + + switch(aspect) { + case VK_IMAGE_ASPECT_COLOR_BIT: + vk_pipeline_info.pColorBlendState = &color_blend_info; break; case VK_IMAGE_ASPECT_DEPTH_BIT: - vk_pipeline_info.pDepthStencilState = &(VkPipelineDepthStencilStateCreateInfo) { - .sType = VK_STRUCTURE_TYPE_PIPELINE_DEPTH_STENCIL_STATE_CREATE_INFO, - .depthTestEnable = true, - .depthWriteEnable = true, - .depthCompareOp = VK_COMPARE_OP_ALWAYS, - }; + vk_pipeline_info.pDepthStencilState = &depth_info; break; case VK_IMAGE_ASPECT_STENCIL_BIT: - vk_pipeline_info.pDepthStencilState = &(VkPipelineDepthStencilStateCreateInfo) { - .sType = VK_STRUCTURE_TYPE_PIPELINE_DEPTH_STENCIL_STATE_CREATE_INFO, - .depthTestEnable = false, - .depthWriteEnable = false, - .stencilTestEnable = true, - .front = { - .failOp = VK_STENCIL_OP_REPLACE, - .passOp = VK_STENCIL_OP_REPLACE, - .depthFailOp = VK_STENCIL_OP_REPLACE, - .compareOp = VK_COMPARE_OP_ALWAYS, - .compareMask = 0xff, - .writeMask = 0xff, - .reference = 0 - }, - .back = { - .failOp = VK_STENCIL_OP_REPLACE, - .passOp = VK_STENCIL_OP_REPLACE, - .depthFailOp = VK_STENCIL_OP_REPLACE, - .compareOp = VK_COMPARE_OP_ALWAYS, - .compareMask = 0xff, - .writeMask = 0xff, - .reference = 0 - }, - .depthCompareOp = VK_COMPARE_OP_ALWAYS, - }; + vk_pipeline_info.pDepthStencilState = &stencil_info; break; default: unreachable("Unhandled aspect"); diff --git a/lib/mesa/src/amd/vulkan/radv_pipeline.c b/lib/mesa/src/amd/vulkan/radv_pipeline.c index cc025f55e..48d67f365 100644 --- a/lib/mesa/src/amd/vulkan/radv_pipeline.c +++ b/lib/mesa/src/amd/vulkan/radv_pipeline.c @@ -3179,11 +3179,11 @@ radv_compute_db_shader_control(const struct radv_device *device, bool disable_rbplus = device->physical_device->has_rbplus && !device->physical_device->rbplus_allowed; - /* Do not enable the gl_SampleMask fragment shader output if MSAA is - * disabled. + /* It shouldn't be needed to export gl_SampleMask when MSAA is disabled + * but this appears to break Project Cars (DXVK). See + * https://bugs.freedesktop.org/show_bug.cgi?id=109401 */ - bool mask_export_enable = ms->num_samples > 1 && - ps->info.info.ps.writes_sample_mask; + bool mask_export_enable = ps->info.info.ps.writes_sample_mask; return S_02880C_Z_EXPORT_ENABLE(ps->info.info.ps.writes_z) | S_02880C_STENCIL_TEST_VAL_EXPORT_ENABLE(ps->info.info.ps.writes_stencil) | @@ -3371,14 +3371,8 @@ radv_compute_ia_multi_vgt_param_helpers(struct radv_pipeline *pipeline, else ia_multi_vgt_param.primgroup_size = 128; /* recommended without a GS */ - ia_multi_vgt_param.partial_es_wave = false; - if (pipeline->device->has_distributed_tess) { - if (radv_pipeline_has_gs(pipeline)) { - if (device->physical_device->rad_info.chip_class <= VI) - ia_multi_vgt_param.partial_es_wave = true; - } - } /* GS requirement. */ + ia_multi_vgt_param.partial_es_wave = false; if (radv_pipeline_has_gs(pipeline) && device->physical_device->rad_info.chip_class <= VI) if (SI_GS_PER_ES / ia_multi_vgt_param.primgroup_size >= pipeline->device->gs_table_depth - 3) ia_multi_vgt_param.partial_es_wave = true; @@ -3424,13 +3418,8 @@ radv_compute_ia_multi_vgt_param_helpers(struct radv_pipeline *pipeline, /* Needed for 028B6C_DISTRIBUTION_MODE != 0 */ if (device->has_distributed_tess) { if (radv_pipeline_has_gs(pipeline)) { - if (device->physical_device->rad_info.family == CHIP_TONGA || - device->physical_device->rad_info.family == CHIP_FIJI || - device->physical_device->rad_info.family == CHIP_POLARIS10 || - device->physical_device->rad_info.family == CHIP_POLARIS11 || - device->physical_device->rad_info.family == CHIP_POLARIS12 || - device->physical_device->rad_info.family == CHIP_VEGAM) - ia_multi_vgt_param.partial_vs_wave = true; + if (device->physical_device->rad_info.chip_class <= VI) + ia_multi_vgt_param.partial_es_wave = true; } else { ia_multi_vgt_param.partial_vs_wave = true; } @@ -3448,6 +3437,26 @@ radv_compute_ia_multi_vgt_param_helpers(struct radv_pipeline *pipeline, ia_multi_vgt_param.partial_vs_wave = true; } + if (radv_pipeline_has_gs(pipeline)) { + /* On these chips there is the possibility of a hang if the + * pipeline uses a GS and partial_vs_wave is not set. + * + * This mostly does not hit 4-SE chips, as those typically set + * ia_switch_on_eoi and then partial_vs_wave is set for pipelines + * with GS due to another workaround. + * + * Reproducer: https://bugs.freedesktop.org/show_bug.cgi?id=109242 + */ + if (device->physical_device->rad_info.family == CHIP_TONGA || + device->physical_device->rad_info.family == CHIP_FIJI || + device->physical_device->rad_info.family == CHIP_POLARIS10 || + device->physical_device->rad_info.family == CHIP_POLARIS11 || + device->physical_device->rad_info.family == CHIP_POLARIS12 || + device->physical_device->rad_info.family == CHIP_VEGAM) { + ia_multi_vgt_param.partial_vs_wave = true; + } + } + ia_multi_vgt_param.base = S_028AA8_PRIMGROUP_SIZE(ia_multi_vgt_param.primgroup_size - 1) | /* The following field was moved to VGT_SHADER_STAGES_EN in GFX9. */ diff --git a/lib/mesa/src/compiler/glsl/ast_function.cpp b/lib/mesa/src/compiler/glsl/ast_function.cpp index 1fa3f7561..4aff26337 100644 --- a/lib/mesa/src/compiler/glsl/ast_function.cpp +++ b/lib/mesa/src/compiler/glsl/ast_function.cpp @@ -363,31 +363,29 @@ copy_index_derefs_to_temps(ir_instruction *ir, void *data) ir = a->array->as_dereference(); ir_rvalue *idx = a->array_index; - if (idx->as_dereference_variable()) { - ir_variable *var = idx->variable_referenced(); + ir_variable *var = idx->variable_referenced(); - /* If the index is read only it cannot change so there is no need - * to copy it. - */ - if (var->data.read_only || var->data.memory_read_only) - return; - - ir_variable *tmp = new(d->mem_ctx) ir_variable(idx->type, "idx_tmp", - ir_var_temporary); - d->before_instructions->push_tail(tmp); - - ir_dereference_variable *const deref_tmp_1 = - new(d->mem_ctx) ir_dereference_variable(tmp); - ir_assignment *const assignment = - new(d->mem_ctx) ir_assignment(deref_tmp_1, - idx->clone(d->mem_ctx, NULL)); - d->before_instructions->push_tail(assignment); - - /* Replace the array index with a dereference of the new temporary */ - ir_dereference_variable *const deref_tmp_2 = - new(d->mem_ctx) ir_dereference_variable(tmp); - a->array_index = deref_tmp_2; - } + /* If the index is read only it cannot change so there is no need + * to copy it. + */ + if (!var || var->data.read_only || var->data.memory_read_only) + return; + + ir_variable *tmp = new(d->mem_ctx) ir_variable(idx->type, "idx_tmp", + ir_var_temporary); + d->before_instructions->push_tail(tmp); + + ir_dereference_variable *const deref_tmp_1 = + new(d->mem_ctx) ir_dereference_variable(tmp); + ir_assignment *const assignment = + new(d->mem_ctx) ir_assignment(deref_tmp_1, + idx->clone(d->mem_ctx, NULL)); + d->before_instructions->push_tail(assignment); + + /* Replace the array index with a dereference of the new temporary */ + ir_dereference_variable *const deref_tmp_2 = + new(d->mem_ctx) ir_dereference_variable(tmp); + a->array_index = deref_tmp_2; } } @@ -402,7 +400,8 @@ fix_parameter(void *mem_ctx, ir_rvalue *actual, const glsl_type *formal_type, * nothing needs to be done to fix the parameter. */ if (formal_type == actual->type - && (expr == NULL || expr->operation != ir_binop_vector_extract)) + && (expr == NULL || expr->operation != ir_binop_vector_extract) + && actual->as_dereference_variable()) return; /* An array index could also be an out variable so we need to make a copy @@ -456,7 +455,7 @@ fix_parameter(void *mem_ctx, ir_rvalue *actual, const glsl_type *formal_type, ir_dereference_variable *const deref_tmp_1 = new(mem_ctx) ir_dereference_variable(tmp); ir_assignment *const assignment = - new(mem_ctx) ir_assignment(deref_tmp_1, actual); + new(mem_ctx) ir_assignment(deref_tmp_1, actual->clone(mem_ctx, NULL)); before_instructions->push_tail(assignment); } diff --git a/lib/mesa/src/compiler/glsl/lower_output_reads.cpp b/lib/mesa/src/compiler/glsl/lower_output_reads.cpp index bd3accb3d..4f90c7385 100644 --- a/lib/mesa/src/compiler/glsl/lower_output_reads.cpp +++ b/lib/mesa/src/compiler/glsl/lower_output_reads.cpp @@ -101,6 +101,10 @@ output_read_remover::visit(ir_dereference_variable *ir) void *var_ctx = ralloc_parent(ir->var); temp = new(var_ctx) ir_variable(ir->var->type, ir->var->name, ir_var_temporary); + /* copy flags which affect arithematical precision */ + temp->data.invariant = ir->var->data.invariant; + temp->data.precise = ir->var->data.precise; + temp->data.precision = ir->var->data.precision; _mesa_hash_table_insert(replacements, ir->var, temp); ir->var->insert_after(temp); } diff --git a/lib/mesa/src/compiler/nir/nir_opt_copy_prop_vars.c b/lib/mesa/src/compiler/nir/nir_opt_copy_prop_vars.c index 594c4ddd0..422662eb8 100644 --- a/lib/mesa/src/compiler/nir/nir_opt_copy_prop_vars.c +++ b/lib/mesa/src/compiler/nir/nir_opt_copy_prop_vars.c @@ -143,9 +143,19 @@ gather_vars_written(struct copy_prop_var_state *state, written->modes = nir_var_shader_out; break; + case nir_intrinsic_deref_atomic_add: + case nir_intrinsic_deref_atomic_imin: + case nir_intrinsic_deref_atomic_umin: + case nir_intrinsic_deref_atomic_imax: + case nir_intrinsic_deref_atomic_umax: + case nir_intrinsic_deref_atomic_and: + case nir_intrinsic_deref_atomic_or: + case nir_intrinsic_deref_atomic_xor: + case nir_intrinsic_deref_atomic_exchange: + case nir_intrinsic_deref_atomic_comp_swap: case nir_intrinsic_store_deref: case nir_intrinsic_copy_deref: { - /* Destination in _both_ store_deref and copy_deref is src[0]. */ + /* Destination in all of store_deref, copy_deref and the atomics is src[0]. */ nir_deref_instr *dst = nir_src_as_deref(intrin->src[0]); uintptr_t mask = intrin->intrinsic == nir_intrinsic_store_deref ? @@ -750,6 +760,19 @@ copy_prop_vars_block(struct copy_prop_var_state *state, break; } + case nir_intrinsic_deref_atomic_add: + case nir_intrinsic_deref_atomic_imin: + case nir_intrinsic_deref_atomic_umin: + case nir_intrinsic_deref_atomic_imax: + case nir_intrinsic_deref_atomic_umax: + case nir_intrinsic_deref_atomic_and: + case nir_intrinsic_deref_atomic_or: + case nir_intrinsic_deref_atomic_xor: + case nir_intrinsic_deref_atomic_exchange: + case nir_intrinsic_deref_atomic_comp_swap: + kill_aliases(copies, nir_src_as_deref(intrin->src[0]), 0xf); + break; + default: break; } diff --git a/lib/mesa/src/egl/drivers/dri2/egl_dri2.c b/lib/mesa/src/egl/drivers/dri2/egl_dri2.c index 4f226b271..5253a8aaa 100644 --- a/lib/mesa/src/egl/drivers/dri2/egl_dri2.c +++ b/lib/mesa/src/egl/drivers/dri2/egl_dri2.c @@ -2819,7 +2819,8 @@ dri2_bind_wayland_display_wl(_EGLDriver *drv, _EGLDisplay *disp, const struct wayland_drm_callbacks wl_drm_callbacks = { .authenticate = (int(*)(void *, uint32_t)) dri2_dpy->vtbl->authenticate, .reference_buffer = dri2_wl_reference_buffer, - .release_buffer = dri2_wl_release_buffer + .release_buffer = dri2_wl_release_buffer, + .is_format_supported = dri2_wl_is_format_supported }; int flags = 0; uint64_t cap; diff --git a/lib/mesa/src/egl/drivers/dri2/egl_dri2.h b/lib/mesa/src/egl/drivers/dri2/egl_dri2.h index 4abe1ba19..1c83bf216 100644 --- a/lib/mesa/src/egl/drivers/dri2/egl_dri2.h +++ b/lib/mesa/src/egl/drivers/dri2/egl_dri2.h @@ -457,6 +457,8 @@ EGLBoolean dri2_initialize_wayland(_EGLDriver *drv, _EGLDisplay *disp); void dri2_teardown_wayland(struct dri2_egl_display *dri2_dpy); +bool +dri2_wl_is_format_supported(void* user_data, uint32_t format); #else static inline EGLBoolean dri2_initialize_wayland(_EGLDriver *drv, _EGLDisplay *disp) diff --git a/lib/mesa/src/egl/drivers/dri2/platform_wayland.c b/lib/mesa/src/egl/drivers/dri2/platform_wayland.c index 817e9b198..89f4cb7c7 100644 --- a/lib/mesa/src/egl/drivers/dri2/platform_wayland.c +++ b/lib/mesa/src/egl/drivers/dri2/platform_wayland.c @@ -59,49 +59,57 @@ static const struct dri2_wl_visual { uint32_t wl_drm_format; uint32_t wl_shm_format; int dri_image_format; + /* alt_dri_image_format is a substitute wl_buffer format to use for a + * wl-server unsupported dri_image_format, ie. some other dri_image_format in + * the table, of the same precision but with different channel ordering, or + * __DRI_IMAGE_FORMAT_NONE if an alternate format is not needed or supported. + * The code checks if alt_dri_image_format can be used as a fallback for a + * dri_image_format for a given wl-server implementation. + */ + int alt_dri_image_format; int bpp; unsigned int rgba_masks[4]; } dri2_wl_visuals[] = { { "XRGB2101010", WL_DRM_FORMAT_XRGB2101010, WL_SHM_FORMAT_XRGB2101010, - __DRI_IMAGE_FORMAT_XRGB2101010, 32, + __DRI_IMAGE_FORMAT_XRGB2101010, __DRI_IMAGE_FORMAT_XBGR2101010, 32, { 0x3ff00000, 0x000ffc00, 0x000003ff, 0x00000000 } }, { "ARGB2101010", WL_DRM_FORMAT_ARGB2101010, WL_SHM_FORMAT_ARGB2101010, - __DRI_IMAGE_FORMAT_ARGB2101010, 32, + __DRI_IMAGE_FORMAT_ARGB2101010, __DRI_IMAGE_FORMAT_ABGR2101010, 32, { 0x3ff00000, 0x000ffc00, 0x000003ff, 0xc0000000 } }, { "XBGR2101010", WL_DRM_FORMAT_XBGR2101010, WL_SHM_FORMAT_XBGR2101010, - __DRI_IMAGE_FORMAT_XBGR2101010, 32, + __DRI_IMAGE_FORMAT_XBGR2101010, __DRI_IMAGE_FORMAT_XRGB2101010, 32, { 0x000003ff, 0x000ffc00, 0x3ff00000, 0x00000000 } }, { "ABGR2101010", WL_DRM_FORMAT_ABGR2101010, WL_SHM_FORMAT_ABGR2101010, - __DRI_IMAGE_FORMAT_ABGR2101010, 32, + __DRI_IMAGE_FORMAT_ABGR2101010, __DRI_IMAGE_FORMAT_ARGB2101010, 32, { 0x000003ff, 0x000ffc00, 0x3ff00000, 0xc0000000 } }, { "XRGB8888", WL_DRM_FORMAT_XRGB8888, WL_SHM_FORMAT_XRGB8888, - __DRI_IMAGE_FORMAT_XRGB8888, 32, + __DRI_IMAGE_FORMAT_XRGB8888, __DRI_IMAGE_FORMAT_NONE, 32, { 0x00ff0000, 0x0000ff00, 0x000000ff, 0x00000000 } }, { "ARGB8888", WL_DRM_FORMAT_ARGB8888, WL_SHM_FORMAT_ARGB8888, - __DRI_IMAGE_FORMAT_ARGB8888, 32, + __DRI_IMAGE_FORMAT_ARGB8888, __DRI_IMAGE_FORMAT_NONE, 32, { 0x00ff0000, 0x0000ff00, 0x000000ff, 0xff000000 } }, { "RGB565", WL_DRM_FORMAT_RGB565, WL_SHM_FORMAT_RGB565, - __DRI_IMAGE_FORMAT_RGB565, 16, + __DRI_IMAGE_FORMAT_RGB565, __DRI_IMAGE_FORMAT_NONE, 16, { 0xf800, 0x07e0, 0x001f, 0x0000 } }, }; @@ -166,6 +174,24 @@ dri2_wl_visual_idx_from_shm_format(uint32_t shm_format) return -1; } +bool +dri2_wl_is_format_supported(void* user_data, uint32_t format) +{ + _EGLDisplay *disp = (_EGLDisplay *) user_data; + struct dri2_egl_display *dri2_dpy = dri2_egl_display(disp); + int j = dri2_wl_visual_idx_from_fourcc(format); + + if (j == -1) + return false; + + for (int i = 0; dri2_dpy->driver_configs[i]; i++) + if (j == dri2_wl_visual_idx_from_config(dri2_dpy, + dri2_dpy->driver_configs[i])) + return true; + + return false; +} + static int roundtrip(struct dri2_egl_display *dri2_dpy) { @@ -461,15 +487,29 @@ get_back_bo(struct dri2_egl_surface *dri2_surf) int use_flags; int visual_idx; unsigned int dri_image_format; + unsigned int linear_dri_image_format; uint64_t *modifiers; int num_modifiers; visual_idx = dri2_wl_visual_idx_from_fourcc(dri2_surf->format); assert(visual_idx != -1); dri_image_format = dri2_wl_visuals[visual_idx].dri_image_format; + linear_dri_image_format = dri_image_format; modifiers = u_vector_tail(&dri2_dpy->wl_modifiers[visual_idx]); num_modifiers = u_vector_length(&dri2_dpy->wl_modifiers[visual_idx]); + /* Substitute dri image format if server does not support original format */ + if (!(dri2_dpy->formats & (1 << visual_idx))) + linear_dri_image_format = dri2_wl_visuals[visual_idx].alt_dri_image_format; + + /* These asserts hold, as long as dri2_wl_visuals[] is self-consistent and + * the PRIME substitution logic in dri2_wl_add_configs_for_visuals() is free + * of bugs. + */ + assert(linear_dri_image_format != __DRI_IMAGE_FORMAT_NONE); + assert(dri2_dpy->formats & + (1 << dri2_wl_visual_idx_from_dri_image_format(linear_dri_image_format))); + /* There might be a buffer release already queued that wasn't processed */ wl_display_dispatch_queue_pending(dri2_dpy->wl_dpy, dri2_surf->wl_queue); @@ -516,7 +556,7 @@ get_back_bo(struct dri2_egl_surface *dri2_surf) dri2_dpy->image->createImageWithModifiers(dri2_dpy->dri_screen, dri2_surf->base.Width, dri2_surf->base.Height, - dri_image_format, + linear_dri_image_format, &linear_mod, 1, NULL); @@ -525,7 +565,7 @@ get_back_bo(struct dri2_egl_surface *dri2_surf) dri2_dpy->image->createImage(dri2_dpy->dri_screen, dri2_surf->base.Width, dri2_surf->base.Height, - dri_image_format, + linear_dri_image_format, use_flags | __DRI_IMAGE_USE_LINEAR, NULL); @@ -1298,8 +1338,11 @@ dri2_wl_add_configs_for_visuals(_EGLDriver *drv, _EGLDisplay *disp) struct dri2_egl_display *dri2_dpy = dri2_egl_display(disp); unsigned int format_count[ARRAY_SIZE(dri2_wl_visuals)] = { 0 }; unsigned int count = 0; + bool assigned; for (unsigned i = 0; dri2_dpy->driver_configs[i]; i++) { + assigned = false; + for (unsigned j = 0; j < ARRAY_SIZE(dri2_wl_visuals); j++) { struct dri2_egl_config *dri2_conf; @@ -1312,6 +1355,43 @@ dri2_wl_add_configs_for_visuals(_EGLDriver *drv, _EGLDisplay *disp) if (dri2_conf->base.ConfigID == count + 1) count++; format_count[j]++; + assigned = true; + } + } + + if (!assigned && dri2_dpy->is_different_gpu) { + struct dri2_egl_config *dri2_conf; + int alt_dri_image_format, c, s; + + /* No match for config. Try if we can blitImage convert to a visual */ + c = dri2_wl_visual_idx_from_config(dri2_dpy, + dri2_dpy->driver_configs[i]); + + if (c == -1) + continue; + + /* Find optimal target visual for blitImage conversion, if any. */ + alt_dri_image_format = dri2_wl_visuals[c].alt_dri_image_format; + s = dri2_wl_visual_idx_from_dri_image_format(alt_dri_image_format); + + if (s == -1 || !(dri2_dpy->formats & (1 << s))) + continue; + + /* Visual s works for the Wayland server, and c can be converted into s + * by our client gpu during PRIME blitImage conversion to a linear + * wl_buffer, so add visual c as supported by the client renderer. + */ + dri2_conf = dri2_add_config(disp, dri2_dpy->driver_configs[i], + count + 1, EGL_WINDOW_BIT, NULL, + dri2_wl_visuals[c].rgba_masks); + if (dri2_conf) { + if (dri2_conf->base.ConfigID == count + 1) + count++; + format_count[c]++; + if (format_count[c] == 1) + _eglLog(_EGL_DEBUG, "Client format %s to server format %s via " + "PRIME blitImage.", dri2_wl_visuals[c].format_name, + dri2_wl_visuals[s].format_name); } } } diff --git a/lib/mesa/src/egl/wayland/wayland-drm/wayland-drm.c b/lib/mesa/src/egl/wayland/wayland-drm/wayland-drm.c index 3c6696dbf..51cdd2cb8 100644 --- a/lib/mesa/src/egl/wayland/wayland-drm/wayland-drm.c +++ b/lib/mesa/src/egl/wayland/wayland-drm/wayland-drm.c @@ -111,6 +111,8 @@ drm_create_buffer(struct wl_client *client, struct wl_resource *resource, uint32_t stride, uint32_t format) { switch (format) { + case WL_DRM_FORMAT_ABGR2101010: + case WL_DRM_FORMAT_XBGR2101010: case WL_DRM_FORMAT_ARGB2101010: case WL_DRM_FORMAT_XRGB2101010: case WL_DRM_FORMAT_ARGB8888: @@ -210,10 +212,31 @@ bind_drm(struct wl_client *client, void *data, uint32_t version, uint32_t id) wl_resource_set_implementation(resource, &drm_interface, data, NULL); wl_resource_post_event(resource, WL_DRM_DEVICE, drm->device_name); - wl_resource_post_event(resource, WL_DRM_FORMAT, - WL_DRM_FORMAT_ARGB2101010); - wl_resource_post_event(resource, WL_DRM_FORMAT, - WL_DRM_FORMAT_XRGB2101010); + + if (drm->callbacks.is_format_supported(drm->user_data, + WL_DRM_FORMAT_ARGB2101010)) { + wl_resource_post_event(resource, WL_DRM_FORMAT, + WL_DRM_FORMAT_ARGB2101010); + } + + if (drm->callbacks.is_format_supported(drm->user_data, + WL_DRM_FORMAT_XRGB2101010)) { + wl_resource_post_event(resource, WL_DRM_FORMAT, + WL_DRM_FORMAT_XRGB2101010); + } + + if (drm->callbacks.is_format_supported(drm->user_data, + WL_DRM_FORMAT_ABGR2101010)) { + wl_resource_post_event(resource, WL_DRM_FORMAT, + WL_DRM_FORMAT_ABGR2101010); + } + + if (drm->callbacks.is_format_supported(drm->user_data, + WL_DRM_FORMAT_XBGR2101010)) { + wl_resource_post_event(resource, WL_DRM_FORMAT, + WL_DRM_FORMAT_XBGR2101010); + } + wl_resource_post_event(resource, WL_DRM_FORMAT, WL_DRM_FORMAT_ARGB8888); wl_resource_post_event(resource, WL_DRM_FORMAT, diff --git a/lib/mesa/src/gallium/auxiliary/util/u_threaded_context.c b/lib/mesa/src/gallium/auxiliary/util/u_threaded_context.c index 8e3bceae1..b596c3229 100644 --- a/lib/mesa/src/gallium/auxiliary/util/u_threaded_context.c +++ b/lib/mesa/src/gallium/auxiliary/util/u_threaded_context.c @@ -1524,7 +1524,8 @@ tc_buffer_do_flush_region(struct threaded_context *tc, if (ttrans->staging) { struct pipe_box src_box; - u_box_1d(ttrans->offset + box->x % tc->map_buffer_alignment, + u_box_1d(ttrans->offset + ttrans->b.box.x % tc->map_buffer_alignment + + (box->x - ttrans->b.box.x), box->width, &src_box); /* Copy the staging buffer into the original one. */ diff --git a/lib/mesa/src/gallium/drivers/etnaviv/etnaviv_context.c b/lib/mesa/src/gallium/drivers/etnaviv/etnaviv_context.c index 3038d210e..303dff583 100644 --- a/lib/mesa/src/gallium/drivers/etnaviv/etnaviv_context.c +++ b/lib/mesa/src/gallium/drivers/etnaviv/etnaviv_context.c @@ -60,6 +60,8 @@ etna_context_destroy(struct pipe_context *pctx) { struct etna_context *ctx = etna_context(pctx); + util_copy_framebuffer_state(&ctx->framebuffer_s, NULL); + if (ctx->primconvert) util_primconvert_destroy(ctx->primconvert); @@ -296,10 +298,10 @@ etna_draw_vbo(struct pipe_context *pctx, const struct pipe_draw_info *info) if (DBG_ENABLED(ETNA_DBG_FLUSH_ALL)) pctx->flush(pctx, NULL, 0); - if (ctx->framebuffer.cbuf) - etna_resource(ctx->framebuffer.cbuf->texture)->seqno++; - if (ctx->framebuffer.zsbuf) - etna_resource(ctx->framebuffer.zsbuf->texture)->seqno++; + if (ctx->framebuffer_s.cbufs[0]) + etna_resource(ctx->framebuffer_s.cbufs[0]->texture)->seqno++; + if (ctx->framebuffer_s.zsbuf) + etna_resource(ctx->framebuffer_s.zsbuf->texture)->seqno++; if (info->index_size && indexbuf != info->index.resource) pipe_resource_reference(&indexbuf, NULL); } diff --git a/lib/mesa/src/gallium/drivers/etnaviv/etnaviv_internal.h b/lib/mesa/src/gallium/drivers/etnaviv/etnaviv_internal.h index 3424d8a77..77214d9cc 100644 --- a/lib/mesa/src/gallium/drivers/etnaviv/etnaviv_internal.h +++ b/lib/mesa/src/gallium/drivers/etnaviv/etnaviv_internal.h @@ -182,7 +182,6 @@ struct compiled_viewport_state { /* Compiled pipe_framebuffer_state */ struct compiled_framebuffer_state { - struct pipe_surface *cbuf, *zsbuf; /* keep reference to surfaces */ uint32_t GL_MULTI_SAMPLE_CONFIG; uint32_t PE_COLOR_FORMAT; uint32_t PE_DEPTH_CONFIG; diff --git a/lib/mesa/src/gallium/drivers/etnaviv/etnaviv_state.c b/lib/mesa/src/gallium/drivers/etnaviv/etnaviv_state.c index 87ba10b0d..520cc5a77 100644 --- a/lib/mesa/src/gallium/drivers/etnaviv/etnaviv_state.c +++ b/lib/mesa/src/gallium/drivers/etnaviv/etnaviv_state.c @@ -37,6 +37,7 @@ #include "etnaviv_surface.h" #include "etnaviv_translate.h" #include "etnaviv_util.h" +#include "util/u_framebuffer.h" #include "util/u_helpers.h" #include "util/u_inlines.h" #include "util/u_math.h" @@ -130,7 +131,6 @@ etna_set_framebuffer_state(struct pipe_context *pctx, assert(res->layout & ETNA_LAYOUT_BIT_TILE); /* Cannot render to linear surfaces */ etna_update_render_resource(pctx, cbuf->base.texture); - pipe_surface_reference(&cs->cbuf, &cbuf->base); cs->PE_COLOR_FORMAT = VIVS_PE_COLOR_FORMAT_FORMAT(translate_rs_format(cbuf->base.format)) | VIVS_PE_COLOR_FORMAT_COMPONENTS__MASK | @@ -182,7 +182,6 @@ etna_set_framebuffer_state(struct pipe_context *pctx, nr_samples_color = cbuf->base.texture->nr_samples; } else { - pipe_surface_reference(&cs->cbuf, NULL); /* Clearing VIVS_PE_COLOR_FORMAT_COMPONENTS__MASK and * VIVS_PE_COLOR_FORMAT_OVERWRITE prevents us from overwriting the * color target */ @@ -201,7 +200,6 @@ etna_set_framebuffer_state(struct pipe_context *pctx, etna_update_render_resource(pctx, zsbuf->base.texture); - pipe_surface_reference(&cs->zsbuf, &zsbuf->base); assert(res->layout &ETNA_LAYOUT_BIT_TILE); /* Cannot render to linear surfaces */ uint32_t depth_format = translate_depth_format(zsbuf->base.format); @@ -252,7 +250,6 @@ etna_set_framebuffer_state(struct pipe_context *pctx, nr_samples_depth = zsbuf->base.texture->nr_samples; } else { - pipe_surface_reference(&cs->zsbuf, NULL); cs->PE_DEPTH_CONFIG = VIVS_PE_DEPTH_CONFIG_DEPTH_MODE_NONE; cs->PE_DEPTH_ADDR.bo = NULL; cs->PE_DEPTH_STRIDE = 0; @@ -325,7 +322,8 @@ etna_set_framebuffer_state(struct pipe_context *pctx, */ cs->PE_LOGIC_OP = VIVS_PE_LOGIC_OP_SINGLE_BUFFER(ctx->specs.single_buffer ? 3 : 0); - ctx->framebuffer_s = *sv; /* keep copy of original structure */ + /* keep copy of original structure */ + util_copy_framebuffer_state(&ctx->framebuffer_s, sv); ctx->dirty |= ETNA_DIRTY_FRAMEBUFFER | ETNA_DIRTY_DERIVE_TS; } diff --git a/lib/mesa/src/gallium/drivers/freedreno/freedreno_resource.c b/lib/mesa/src/gallium/drivers/freedreno/freedreno_resource.c index 54d738589..eeeda1cf6 100644 --- a/lib/mesa/src/gallium/drivers/freedreno/freedreno_resource.c +++ b/lib/mesa/src/gallium/drivers/freedreno/freedreno_resource.c @@ -839,8 +839,7 @@ fd_resource_create(struct pipe_screen *pscreen, rsc->internal_format = format; rsc->cpp = util_format_get_blocksize(format); - prsc->nr_samples = MAX2(1, prsc->nr_samples); - rsc->cpp *= prsc->nr_samples; + rsc->cpp *= fd_resource_nr_samples(prsc); assert(rsc->cpp); @@ -924,9 +923,9 @@ fd_resource_from_handle(struct pipe_screen *pscreen, if (!rsc->bo) goto fail; - prsc->nr_samples = MAX2(1, prsc->nr_samples); rsc->internal_format = tmpl->format; - rsc->cpp = prsc->nr_samples * util_format_get_blocksize(tmpl->format); + rsc->cpp = util_format_get_blocksize(tmpl->format); + rsc->cpp *= fd_resource_nr_samples(prsc); slice->pitch = handle->stride / rsc->cpp; slice->offset = handle->offset; slice->size0 = handle->stride * prsc->height0; diff --git a/lib/mesa/src/gallium/drivers/freedreno/freedreno_resource.h b/lib/mesa/src/gallium/drivers/freedreno/freedreno_resource.h index 09abb512d..6790352f9 100644 --- a/lib/mesa/src/gallium/drivers/freedreno/freedreno_resource.h +++ b/lib/mesa/src/gallium/drivers/freedreno/freedreno_resource.h @@ -178,6 +178,15 @@ fd_resource_level_linear(struct pipe_resource *prsc, int level) return false; } +/* access # of samples, with 0 normalized to 1 (which is what we care about + * most of the time) + */ +static inline unsigned +fd_resource_nr_samples(struct pipe_resource *prsc) +{ + return MAX2(1, prsc->nr_samples); +} + void fd_blitter_pipe_begin(struct fd_context *ctx, bool render_cond, bool discard, enum fd_render_stage stage); void fd_blitter_pipe_end(struct fd_context *ctx); diff --git a/lib/mesa/src/gallium/drivers/freedreno/freedreno_texture.c b/lib/mesa/src/gallium/drivers/freedreno/freedreno_texture.c index d92298d2e..84b4df6c1 100644 --- a/lib/mesa/src/gallium/drivers/freedreno/freedreno_texture.c +++ b/lib/mesa/src/gallium/drivers/freedreno/freedreno_texture.c @@ -31,6 +31,7 @@ #include "freedreno_texture.h" #include "freedreno_context.h" +#include "freedreno_resource.h" #include "freedreno_util.h" static void @@ -83,7 +84,7 @@ static void set_sampler_views(struct fd_texture_stateobj *tex, tex->num_textures = util_last_bit(tex->valid_textures); for (i = 0; i < tex->num_textures; i++) { - uint nr_samples = tex->textures[i]->texture->nr_samples; + uint nr_samples = fd_resource_nr_samples(tex->textures[i]->texture); samplers |= (nr_samples >> 1) << (i * 2); } diff --git a/lib/mesa/src/gallium/drivers/nouveau/codegen/nv50_ir_peephole.cpp b/lib/mesa/src/gallium/drivers/nouveau/codegen/nv50_ir_peephole.cpp index ca0192a9c..997df1607 100644 --- a/lib/mesa/src/gallium/drivers/nouveau/codegen/nv50_ir_peephole.cpp +++ b/lib/mesa/src/gallium/drivers/nouveau/codegen/nv50_ir_peephole.cpp @@ -1044,7 +1044,7 @@ ConstantFolding::opnd(Instruction *i, ImmediateValue &imm0, int s) break; } case OP_MUL: - if (i->dType == TYPE_F32) + if (i->dType == TYPE_F32 && !i->precise) tryCollapseChainedMULs(i, s, imm0); if (i->subOp == NV50_IR_SUBOP_MUL_HIGH) { diff --git a/lib/mesa/src/gallium/drivers/nouveau/nvc0/nvc0_screen.c b/lib/mesa/src/gallium/drivers/nouveau/nvc0/nvc0_screen.c index d0d39aa53..9059d4e48 100644 --- a/lib/mesa/src/gallium/drivers/nouveau/nvc0/nvc0_screen.c +++ b/lib/mesa/src/gallium/drivers/nouveau/nvc0/nvc0_screen.c @@ -1279,8 +1279,8 @@ nvc0_screen_create(struct nouveau_device *dev) for (i = 0; i < NVC0_MAX_VIEWPORTS; i++) { BEGIN_NVC0(push, NVC0_3D(SCISSOR_ENABLE(i)), 3); PUSH_DATA (push, 1); - PUSH_DATA (push, 8192 << 16); - PUSH_DATA (push, 8192 << 16); + PUSH_DATA (push, 16384 << 16); + PUSH_DATA (push, 16384 << 16); } #define MK_MACRO(m, n) i = nvc0_graph_set_macro(screen, m, i, sizeof(n), n); diff --git a/lib/mesa/src/gallium/drivers/radeonsi/si_state_draw.c b/lib/mesa/src/gallium/drivers/radeonsi/si_state_draw.c index 612ca910c..413cbc627 100644 --- a/lib/mesa/src/gallium/drivers/radeonsi/si_state_draw.c +++ b/lib/mesa/src/gallium/drivers/radeonsi/si_state_draw.c @@ -348,20 +348,11 @@ si_get_init_multi_vgt_param(struct si_screen *sscreen, key->u.uses_gs) partial_vs_wave = true; - /* Needed for 028B6C_DISTRIBUTION_MODE != 0 */ + /* Needed for 028B6C_DISTRIBUTION_MODE != 0. (implies >= VI) */ if (sscreen->has_distributed_tess) { if (key->u.uses_gs) { - if (sscreen->info.chip_class <= VI) + if (sscreen->info.chip_class == VI) partial_es_wave = true; - - /* GPU hang workaround. */ - if (sscreen->info.family == CHIP_TONGA || - sscreen->info.family == CHIP_FIJI || - sscreen->info.family == CHIP_POLARIS10 || - sscreen->info.family == CHIP_POLARIS11 || - sscreen->info.family == CHIP_POLARIS12 || - sscreen->info.family == CHIP_VEGAM) - partial_vs_wave = true; } else { partial_vs_wave = true; } @@ -417,6 +408,18 @@ si_get_init_multi_vgt_param(struct si_screen *sscreen, if (sscreen->info.max_se == 4 && !wd_switch_on_eop) ia_switch_on_eoi = true; + /* HW engineers suggested that PARTIAL_VS_WAVE_ON should be set + * to work around a GS hang. + */ + if (key->u.uses_gs && + (sscreen->info.family == CHIP_TONGA || + sscreen->info.family == CHIP_FIJI || + sscreen->info.family == CHIP_POLARIS10 || + sscreen->info.family == CHIP_POLARIS11 || + sscreen->info.family == CHIP_POLARIS12 || + sscreen->info.family == CHIP_VEGAM)) + partial_vs_wave = true; + /* Required by Hawaii and, for some special cases, by VI. */ if (ia_switch_on_eoi && (sscreen->info.family == CHIP_HAWAII || diff --git a/lib/mesa/src/gallium/drivers/radeonsi/si_state_shaders.c b/lib/mesa/src/gallium/drivers/radeonsi/si_state_shaders.c index ad7d21e78..950fb41a5 100644 --- a/lib/mesa/src/gallium/drivers/radeonsi/si_state_shaders.c +++ b/lib/mesa/src/gallium/drivers/radeonsi/si_state_shaders.c @@ -1662,7 +1662,7 @@ static inline void si_shader_selector_key(struct pipe_context *ctx, key->part.ps.epilog.alpha_func = si_get_alpha_test_func(sctx); /* ps_uses_fbfetch is true only if the color buffer is bound. */ - if (sctx->ps_uses_fbfetch) { + if (sctx->ps_uses_fbfetch && !sctx->blitter->running) { struct pipe_surface *cb0 = sctx->framebuffer.state.cbufs[0]; struct pipe_resource *tex = cb0->texture; diff --git a/lib/mesa/src/gallium/drivers/swr/swr_fence.cpp b/lib/mesa/src/gallium/drivers/swr/swr_fence.cpp index b05ac8cec..074d82a3b 100644 --- a/lib/mesa/src/gallium/drivers/swr/swr_fence.cpp +++ b/lib/mesa/src/gallium/drivers/swr/swr_fence.cpp @@ -50,7 +50,9 @@ swr_fence_cb(uint64_t userData, uint64_t userData2, uint64_t userData3) swr_fence_do_work(fence); /* Correct value is in SwrSync data, and not the fence write field. */ - fence->read = userData2; + /* Contexts may not finish in order, but fence value always increases */ + if (fence->read < userData2) + fence->read = userData2; } /* diff --git a/lib/mesa/src/gallium/drivers/vc4/vc4_tiling_lt.c b/lib/mesa/src/gallium/drivers/vc4/vc4_tiling_lt.c index ec42a3dc2..167161fdf 100644 --- a/lib/mesa/src/gallium/drivers/vc4/vc4_tiling_lt.c +++ b/lib/mesa/src/gallium/drivers/vc4/vc4_tiling_lt.c @@ -73,42 +73,46 @@ vc4_load_utile(void *cpu, void *gpu, uint32_t cpu_stride, uint32_t cpp) /* Load from the GPU in one shot, no interleave, to * d0-d7. */ - "vldm %0, {q0, q1, q2, q3}\n" + "vldm %[gpu], {q0, q1, q2, q3}\n" /* Store each 8-byte line to cpu-side destination, * incrementing it by the stride each time. */ - "vst1.8 d0, [%1], %2\n" - "vst1.8 d1, [%1], %2\n" - "vst1.8 d2, [%1], %2\n" - "vst1.8 d3, [%1], %2\n" - "vst1.8 d4, [%1], %2\n" - "vst1.8 d5, [%1], %2\n" - "vst1.8 d6, [%1], %2\n" - "vst1.8 d7, [%1]\n" - : - : "r"(gpu), "r"(cpu), "r"(cpu_stride) + "vst1.8 d0, [%[cpu]], %[cpu_stride]\n" + "vst1.8 d1, [%[cpu]], %[cpu_stride]\n" + "vst1.8 d2, [%[cpu]], %[cpu_stride]\n" + "vst1.8 d3, [%[cpu]], %[cpu_stride]\n" + "vst1.8 d4, [%[cpu]], %[cpu_stride]\n" + "vst1.8 d5, [%[cpu]], %[cpu_stride]\n" + "vst1.8 d6, [%[cpu]], %[cpu_stride]\n" + "vst1.8 d7, [%[cpu]]\n" + : [cpu] "+r"(cpu) + : [gpu] "r"(gpu), + [cpu_stride] "r"(cpu_stride) : "q0", "q1", "q2", "q3"); } else { assert(gpu_stride == 16); + void *cpu2 = cpu + 8; __asm__ volatile ( /* Load from the GPU in one shot, no interleave, to * d0-d7. */ - "vldm %0, {q0, q1, q2, q3};\n" + "vldm %[gpu], {q0, q1, q2, q3};\n" /* Store each 16-byte line in 2 parts to the cpu-side * destination. (vld1 can only store one d-register * at a time). */ - "vst1.8 d0, [%1], %3\n" - "vst1.8 d1, [%2], %3\n" - "vst1.8 d2, [%1], %3\n" - "vst1.8 d3, [%2], %3\n" - "vst1.8 d4, [%1], %3\n" - "vst1.8 d5, [%2], %3\n" - "vst1.8 d6, [%1]\n" - "vst1.8 d7, [%2]\n" - : - : "r"(gpu), "r"(cpu), "r"(cpu + 8), "r"(cpu_stride) + "vst1.8 d0, [%[cpu]], %[cpu_stride]\n" + "vst1.8 d1, [%[cpu2]],%[cpu_stride]\n" + "vst1.8 d2, [%[cpu]], %[cpu_stride]\n" + "vst1.8 d3, [%[cpu2]],%[cpu_stride]\n" + "vst1.8 d4, [%[cpu]], %[cpu_stride]\n" + "vst1.8 d5, [%[cpu2]],%[cpu_stride]\n" + "vst1.8 d6, [%[cpu]]\n" + "vst1.8 d7, [%[cpu2]]\n" + : [cpu] "+r"(cpu), + [cpu2] "+r"(cpu2) + : [gpu] "r"(gpu), + [cpu_stride] "r"(cpu_stride) : "q0", "q1", "q2", "q3"); } #elif defined (PIPE_ARCH_AARCH64) @@ -117,42 +121,46 @@ vc4_load_utile(void *cpu, void *gpu, uint32_t cpu_stride, uint32_t cpp) /* Load from the GPU in one shot, no interleave, to * d0-d7. */ - "ld1 {v0.2d, v1.2d, v2.2d, v3.2d}, [%0]\n" + "ld1 {v0.2d, v1.2d, v2.2d, v3.2d}, [%[gpu]]\n" /* Store each 8-byte line to cpu-side destination, * incrementing it by the stride each time. */ - "st1 {v0.D}[0], [%1], %2\n" - "st1 {v0.D}[1], [%1], %2\n" - "st1 {v1.D}[0], [%1], %2\n" - "st1 {v1.D}[1], [%1], %2\n" - "st1 {v2.D}[0], [%1], %2\n" - "st1 {v2.D}[1], [%1], %2\n" - "st1 {v3.D}[0], [%1], %2\n" - "st1 {v3.D}[1], [%1]\n" - : - : "r"(gpu), "r"(cpu), "r"(cpu_stride) + "st1 {v0.D}[0], [%[cpu]], %[cpu_stride]\n" + "st1 {v0.D}[1], [%[cpu]], %[cpu_stride]\n" + "st1 {v1.D}[0], [%[cpu]], %[cpu_stride]\n" + "st1 {v1.D}[1], [%[cpu]], %[cpu_stride]\n" + "st1 {v2.D}[0], [%[cpu]], %[cpu_stride]\n" + "st1 {v2.D}[1], [%[cpu]], %[cpu_stride]\n" + "st1 {v3.D}[0], [%[cpu]], %[cpu_stride]\n" + "st1 {v3.D}[1], [%[cpu]]\n" + : [cpu] "+r"(cpu) + : [gpu] "r"(gpu), + [cpu_stride] "r"(cpu_stride) : "v0", "v1", "v2", "v3"); } else { assert(gpu_stride == 16); + void *cpu2 = cpu + 8; __asm__ volatile ( /* Load from the GPU in one shot, no interleave, to * d0-d7. */ - "ld1 {v0.2d, v1.2d, v2.2d, v3.2d}, [%0]\n" + "ld1 {v0.2d, v1.2d, v2.2d, v3.2d}, [%[gpu]]\n" /* Store each 16-byte line in 2 parts to the cpu-side * destination. (vld1 can only store one d-register * at a time). */ - "st1 {v0.D}[0], [%1], %3\n" - "st1 {v0.D}[1], [%2], %3\n" - "st1 {v1.D}[0], [%1], %3\n" - "st1 {v1.D}[1], [%2], %3\n" - "st1 {v2.D}[0], [%1], %3\n" - "st1 {v2.D}[1], [%2], %3\n" - "st1 {v3.D}[0], [%1]\n" - "st1 {v3.D}[1], [%2]\n" - : - : "r"(gpu), "r"(cpu), "r"(cpu + 8), "r"(cpu_stride) + "st1 {v0.D}[0], [%[cpu]], %[cpu_stride]\n" + "st1 {v0.D}[1], [%[cpu2]],%[cpu_stride]\n" + "st1 {v1.D}[0], [%[cpu]], %[cpu_stride]\n" + "st1 {v1.D}[1], [%[cpu2]],%[cpu_stride]\n" + "st1 {v2.D}[0], [%[cpu]], %[cpu_stride]\n" + "st1 {v2.D}[1], [%[cpu2]],%[cpu_stride]\n" + "st1 {v3.D}[0], [%[cpu]]\n" + "st1 {v3.D}[1], [%[cpu2]]\n" + : [cpu] "+r"(cpu), + [cpu2] "+r"(cpu2) + : [gpu] "r"(gpu), + [cpu_stride] "r"(cpu_stride) : "v0", "v1", "v2", "v3"); } #else @@ -174,40 +182,44 @@ vc4_store_utile(void *gpu, void *cpu, uint32_t cpu_stride, uint32_t cpp) /* Load each 8-byte line from cpu-side source, * incrementing it by the stride each time. */ - "vld1.8 d0, [%1], %2\n" - "vld1.8 d1, [%1], %2\n" - "vld1.8 d2, [%1], %2\n" - "vld1.8 d3, [%1], %2\n" - "vld1.8 d4, [%1], %2\n" - "vld1.8 d5, [%1], %2\n" - "vld1.8 d6, [%1], %2\n" - "vld1.8 d7, [%1]\n" + "vld1.8 d0, [%[cpu]], %[cpu_stride]\n" + "vld1.8 d1, [%[cpu]], %[cpu_stride]\n" + "vld1.8 d2, [%[cpu]], %[cpu_stride]\n" + "vld1.8 d3, [%[cpu]], %[cpu_stride]\n" + "vld1.8 d4, [%[cpu]], %[cpu_stride]\n" + "vld1.8 d5, [%[cpu]], %[cpu_stride]\n" + "vld1.8 d6, [%[cpu]], %[cpu_stride]\n" + "vld1.8 d7, [%[cpu]]\n" /* Load from the GPU in one shot, no interleave, to * d0-d7. */ - "vstm %0, {q0, q1, q2, q3}\n" - : - : "r"(gpu), "r"(cpu), "r"(cpu_stride) + "vstm %[gpu], {q0, q1, q2, q3}\n" + : [cpu] "+r"(cpu) + : [gpu] "r"(gpu), + [cpu_stride] "r"(cpu_stride) : "q0", "q1", "q2", "q3"); } else { assert(gpu_stride == 16); + void *cpu2 = cpu + 8; __asm__ volatile ( /* Load each 16-byte line in 2 parts from the cpu-side * destination. (vld1 can only store one d-register * at a time). */ - "vld1.8 d0, [%1], %3\n" - "vld1.8 d1, [%2], %3\n" - "vld1.8 d2, [%1], %3\n" - "vld1.8 d3, [%2], %3\n" - "vld1.8 d4, [%1], %3\n" - "vld1.8 d5, [%2], %3\n" - "vld1.8 d6, [%1]\n" - "vld1.8 d7, [%2]\n" + "vld1.8 d0, [%[cpu]], %[cpu_stride]\n" + "vld1.8 d1, [%[cpu2]],%[cpu_stride]\n" + "vld1.8 d2, [%[cpu]], %[cpu_stride]\n" + "vld1.8 d3, [%[cpu2]],%[cpu_stride]\n" + "vld1.8 d4, [%[cpu]], %[cpu_stride]\n" + "vld1.8 d5, [%[cpu2]],%[cpu_stride]\n" + "vld1.8 d6, [%[cpu]]\n" + "vld1.8 d7, [%[cpu2]]\n" /* Store to the GPU in one shot, no interleave. */ - "vstm %0, {q0, q1, q2, q3}\n" - : - : "r"(gpu), "r"(cpu), "r"(cpu + 8), "r"(cpu_stride) + "vstm %[gpu], {q0, q1, q2, q3}\n" + : [cpu] "+r"(cpu), + [cpu2] "+r"(cpu2) + : [gpu] "r"(gpu), + [cpu_stride] "r"(cpu_stride) : "q0", "q1", "q2", "q3"); } #elif defined (PIPE_ARCH_AARCH64) @@ -216,38 +228,42 @@ vc4_store_utile(void *gpu, void *cpu, uint32_t cpu_stride, uint32_t cpp) /* Load each 8-byte line from cpu-side source, * incrementing it by the stride each time. */ - "ld1 {v0.D}[0], [%1], %2\n" - "ld1 {v0.D}[1], [%1], %2\n" - "ld1 {v1.D}[0], [%1], %2\n" - "ld1 {v1.D}[1], [%1], %2\n" - "ld1 {v2.D}[0], [%1], %2\n" - "ld1 {v2.D}[1], [%1], %2\n" - "ld1 {v3.D}[0], [%1], %2\n" - "ld1 {v3.D}[1], [%1]\n" + "ld1 {v0.D}[0], [%[cpu]], %[cpu_stride]\n" + "ld1 {v0.D}[1], [%[cpu]], %[cpu_stride]\n" + "ld1 {v1.D}[0], [%[cpu]], %[cpu_stride]\n" + "ld1 {v1.D}[1], [%[cpu]], %[cpu_stride]\n" + "ld1 {v2.D}[0], [%[cpu]], %[cpu_stride]\n" + "ld1 {v2.D}[1], [%[cpu]], %[cpu_stride]\n" + "ld1 {v3.D}[0], [%[cpu]], %[cpu_stride]\n" + "ld1 {v3.D}[1], [%[cpu]]\n" /* Store to the GPU in one shot, no interleave. */ - "st1 {v0.2d, v1.2d, v2.2d, v3.2d}, [%0]\n" - : - : "r"(gpu), "r"(cpu), "r"(cpu_stride) + "st1 {v0.2d, v1.2d, v2.2d, v3.2d}, [%[gpu]]\n" + : [cpu] "+r"(cpu) + : [gpu] "r"(gpu), + [cpu_stride] "r"(cpu_stride) : "v0", "v1", "v2", "v3"); } else { assert(gpu_stride == 16); + void *cpu2 = cpu + 8; __asm__ volatile ( /* Load each 16-byte line in 2 parts from the cpu-side * destination. (vld1 can only store one d-register * at a time). */ - "ld1 {v0.D}[0], [%1], %3\n" - "ld1 {v0.D}[1], [%2], %3\n" - "ld1 {v1.D}[0], [%1], %3\n" - "ld1 {v1.D}[1], [%2], %3\n" - "ld1 {v2.D}[0], [%1], %3\n" - "ld1 {v2.D}[1], [%2], %3\n" - "ld1 {v3.D}[0], [%1]\n" - "ld1 {v3.D}[1], [%2]\n" + "ld1 {v0.D}[0], [%[cpu]], %[cpu_stride]\n" + "ld1 {v0.D}[1], [%[cpu2]],%[cpu_stride]\n" + "ld1 {v1.D}[0], [%[cpu]], %[cpu_stride]\n" + "ld1 {v1.D}[1], [%[cpu2]],%[cpu_stride]\n" + "ld1 {v2.D}[0], [%[cpu]], %[cpu_stride]\n" + "ld1 {v2.D}[1], [%[cpu2]],%[cpu_stride]\n" + "ld1 {v3.D}[0], [%[cpu]]\n" + "ld1 {v3.D}[1], [%[cpu2]]\n" /* Store to the GPU in one shot, no interleave. */ - "st1 {v0.2d, v1.2d, v2.2d, v3.2d}, [%0]\n" - : - : "r"(gpu), "r"(cpu), "r"(cpu + 8), "r"(cpu_stride) + "st1 {v0.2d, v1.2d, v2.2d, v3.2d}, [%[gpu]]\n" + : [cpu] "+r"(cpu), + [cpu2] "+r"(cpu2) + : [gpu] "r"(gpu), + [cpu_stride] "r"(cpu_stride) : "v0", "v1", "v2", "v3"); } #else diff --git a/lib/mesa/src/gallium/include/pipe/p_video_enums.h b/lib/mesa/src/gallium/include/pipe/p_video_enums.h index b5b8b0622..adbe7858d 100644 --- a/lib/mesa/src/gallium/include/pipe/p_video_enums.h +++ b/lib/mesa/src/gallium/include/pipe/p_video_enums.h @@ -70,7 +70,8 @@ enum pipe_video_profile PIPE_VIDEO_PROFILE_HEVC_MAIN_444, PIPE_VIDEO_PROFILE_JPEG_BASELINE, PIPE_VIDEO_PROFILE_VP9_PROFILE0, - PIPE_VIDEO_PROFILE_VP9_PROFILE2 + PIPE_VIDEO_PROFILE_VP9_PROFILE2, + PIPE_VIDEO_PROFILE_MAX }; /* Video caps, can be different for each codec/profile */ diff --git a/lib/mesa/src/gallium/state_trackers/dri/drisw.c b/lib/mesa/src/gallium/state_trackers/dri/drisw.c index 5a0d2e135..927ac39ce 100644 --- a/lib/mesa/src/gallium/state_trackers/dri/drisw.c +++ b/lib/mesa/src/gallium/state_trackers/dri/drisw.c @@ -79,15 +79,21 @@ put_image2(__DRIdrawable *dPriv, void *data, int x, int y, static inline void put_image_shm(__DRIdrawable *dPriv, int shmid, char *shmaddr, - unsigned offset, int x, int y, + unsigned offset, unsigned offset_x, int x, int y, unsigned width, unsigned height, unsigned stride) { __DRIscreen *sPriv = dPriv->driScreenPriv; const __DRIswrastLoaderExtension *loader = sPriv->swrast_loader; - loader->putImageShm(dPriv, __DRI_SWRAST_IMAGE_OP_SWAP, - x, y, width, height, stride, - shmid, shmaddr, offset, dPriv->loaderPrivate); + /* if we have the newer interface, don't have to add the offset_x here. */ + if (loader->base.version > 4 && loader->putImageShm2) + loader->putImageShm2(dPriv, __DRI_SWRAST_IMAGE_OP_SWAP, + x, y, width, height, stride, + shmid, shmaddr, offset, dPriv->loaderPrivate); + else + loader->putImageShm(dPriv, __DRI_SWRAST_IMAGE_OP_SWAP, + x, y, width, height, stride, + shmid, shmaddr, offset + offset_x, dPriv->loaderPrivate); } static inline void @@ -179,12 +185,13 @@ drisw_put_image2(struct dri_drawable *drawable, static inline void drisw_put_image_shm(struct dri_drawable *drawable, int shmid, char *shmaddr, unsigned offset, + unsigned offset_x, int x, int y, unsigned width, unsigned height, unsigned stride) { __DRIdrawable *dPriv = drawable->dPriv; - put_image_shm(dPriv, shmid, shmaddr, offset, x, y, width, height, stride); + put_image_shm(dPriv, shmid, shmaddr, offset, offset_x, x, y, width, height, stride); } static inline void diff --git a/lib/mesa/src/gallium/state_trackers/nine/surface9.c b/lib/mesa/src/gallium/state_trackers/nine/surface9.c index 10518219a..ebb2f9d0c 100644 --- a/lib/mesa/src/gallium/state_trackers/nine/surface9.c +++ b/lib/mesa/src/gallium/state_trackers/nine/surface9.c @@ -668,6 +668,19 @@ NineSurface9_CopyMemToDefault( struct NineSurface9 *This, From->data, From->stride, 0, /* depth = 1 */ &src_box); + if (From->texture == D3DRTYPE_TEXTURE) { + struct NineTexture9 *tex = + NineTexture9(From->base.base.container); + /* D3DPOOL_SYSTEMMEM with buffer content passed + * from the user: execute the upload right now. + * It is possible it is enough to delay upload + * until the surface refcount is 0, but the + * bind refcount may not be 0, and thus the dtor + * is not executed (and doesn't trigger the + * pending_uploads_counter check). */ + if (!tex->managed_buffer) + nine_csmt_process(This->base.base.device); + } if (This->data_conversion) (void) util_format_translate(This->format_conversion, diff --git a/lib/mesa/src/gallium/state_trackers/va/context.c b/lib/mesa/src/gallium/state_trackers/va/context.c index 14e904ee4..47a5e7be2 100644 --- a/lib/mesa/src/gallium/state_trackers/va/context.c +++ b/lib/mesa/src/gallium/state_trackers/va/context.c @@ -175,7 +175,7 @@ VA_DRIVER_INIT_FUNC(VADriverContextP ctx) ctx->version_minor = 1; *ctx->vtable = vtable; *ctx->vtable_vpp = vtable_vpp; - ctx->max_profiles = PIPE_VIDEO_PROFILE_MPEG4_AVC_HIGH - PIPE_VIDEO_PROFILE_UNKNOWN; + ctx->max_profiles = PIPE_VIDEO_PROFILE_MAX - PIPE_VIDEO_PROFILE_UNKNOWN - 1; ctx->max_entrypoints = 2; ctx->max_attributes = 1; ctx->max_image_formats = VL_VA_MAX_IMAGE_FORMATS; diff --git a/lib/mesa/src/gallium/winsys/amdgpu/drm/amdgpu_cs.c b/lib/mesa/src/gallium/winsys/amdgpu/drm/amdgpu_cs.c index 5986810d4..3f0a6a1c9 100644 --- a/lib/mesa/src/gallium/winsys/amdgpu/drm/amdgpu_cs.c +++ b/lib/mesa/src/gallium/winsys/amdgpu/drm/amdgpu_cs.c @@ -1217,8 +1217,6 @@ static void amdgpu_add_fence_dependencies_bo_lists(struct amdgpu_cs *acs) { struct amdgpu_cs_context *cs = acs->csc; - cs->num_fence_dependencies = 0; - amdgpu_add_fence_dependencies_bo_list(acs, cs->fence, cs->num_real_buffers, cs->real_buffers); amdgpu_add_fence_dependencies_bo_list(acs, cs->fence, cs->num_slab_buffers, cs->slab_buffers); amdgpu_add_fence_dependencies_bo_list(acs, cs->fence, cs->num_sparse_buffers, cs->sparse_buffers); diff --git a/lib/mesa/src/gallium/winsys/sw/dri/dri_sw_winsys.c b/lib/mesa/src/gallium/winsys/sw/dri/dri_sw_winsys.c index cd44b036c..c0200f939 100644 --- a/lib/mesa/src/gallium/winsys/sw/dri/dri_sw_winsys.c +++ b/lib/mesa/src/gallium/winsys/sw/dri/dri_sw_winsys.c @@ -244,15 +244,20 @@ dri_sw_displaytarget_display(struct sw_winsys *ws, unsigned width, height, x = 0, y = 0; unsigned blsize = util_format_get_blocksize(dri_sw_dt->format); unsigned offset = 0; + unsigned offset_x = 0; char *data = dri_sw_dt->data; - + bool is_shm = dri_sw_dt->shmid != -1; /* Set the width to 'stride / cpp'. * * PutImage correctly clips to the width of the dst drawable. */ if (box) { - offset = (dri_sw_dt->stride * box->y) + box->x * blsize; + offset = dri_sw_dt->stride * box->y; + offset_x = box->x * blsize; data += offset; + /* don't add x offset for shm, the put_image_shm will deal with it */ + if (!is_shm) + data += offset_x; x = box->x; y = box->y; width = box->width; @@ -262,8 +267,8 @@ dri_sw_displaytarget_display(struct sw_winsys *ws, height = dri_sw_dt->height; } - if (dri_sw_dt->shmid != -1) { - dri_sw_ws->lf->put_image_shm(dri_drawable, dri_sw_dt->shmid, dri_sw_dt->data, offset, + if (is_shm) { + dri_sw_ws->lf->put_image_shm(dri_drawable, dri_sw_dt->shmid, dri_sw_dt->data, offset, offset_x, x, y, width, height, dri_sw_dt->stride); return; } diff --git a/lib/mesa/src/gallium/winsys/vc4/drm/vc4_drm_winsys.c b/lib/mesa/src/gallium/winsys/vc4/drm/vc4_drm_winsys.c index b2ffa90fe..73717d25f 100644 --- a/lib/mesa/src/gallium/winsys/vc4/drm/vc4_drm_winsys.c +++ b/lib/mesa/src/gallium/winsys/vc4/drm/vc4_drm_winsys.c @@ -37,5 +37,5 @@ vc4_drm_screen_create(int fd) struct pipe_screen * vc4_drm_screen_create_renderonly(struct renderonly *ro) { - return vc4_screen_create(fcntl(ro->gpu_fd, F_DUPFD_CLOEXEC, 3), ro); + return vc4_screen_create(ro->gpu_fd, ro); } diff --git a/lib/mesa/src/getopt/getopt.h b/lib/mesa/src/getopt/getopt.h index 7bb85944d..7b0a911d2 100644 --- a/lib/mesa/src/getopt/getopt.h +++ b/lib/mesa/src/getopt/getopt.h @@ -1,4 +1,4 @@ -/* $OpenBSD: getopt.h,v 1.12 2019/01/29 11:52:21 jsg Exp $ */ +/* $OpenBSD: getopt.h,v 1.13 2019/02/19 04:24:01 jsg Exp $ */ /* $NetBSD: getopt.h,v 1.4 2000/07/07 10:43:54 ad Exp $ */ /*- diff --git a/lib/mesa/src/getopt/getopt_long.c b/lib/mesa/src/getopt/getopt_long.c index 5a4045d08..b6842c600 100644 --- a/lib/mesa/src/getopt/getopt_long.c +++ b/lib/mesa/src/getopt/getopt_long.c @@ -1,4 +1,4 @@ -/* $OpenBSD: getopt_long.c,v 1.12 2019/01/29 11:52:21 jsg Exp $ */ +/* $OpenBSD: getopt_long.c,v 1.13 2019/02/19 04:24:01 jsg Exp $ */ /* $NetBSD: getopt_long.c,v 1.15 2002/01/31 22:43:40 tv Exp $ */ /* diff --git a/lib/mesa/src/glx/drisw_glx.c b/lib/mesa/src/glx/drisw_glx.c index a2777100a..fa0f0d7bf 100644 --- a/lib/mesa/src/glx/drisw_glx.c +++ b/lib/mesa/src/glx/drisw_glx.c @@ -201,7 +201,8 @@ bytes_per_line(unsigned pitch_bits, unsigned mul) static void swrastXPutImage(__DRIdrawable * draw, int op, - int x, int y, int w, int h, int stride, + int srcx, int srcy, int x, int y, + int w, int h, int stride, int shmid, char *data, void *loaderPrivate) { struct drisw_drawable *pdp = loaderPrivate; @@ -235,12 +236,12 @@ swrastXPutImage(__DRIdrawable * draw, int op, if (pdp->shminfo.shmid >= 0) { ximage->width = ximage->bytes_per_line / ((ximage->bits_per_pixel + 7)/ 8); ximage->height = h; - XShmPutImage(dpy, drawable, gc, ximage, 0, 0, x, y, w, h, False); + XShmPutImage(dpy, drawable, gc, ximage, srcx, srcy, x, y, w, h, False); XSync(dpy, False); } else { ximage->width = w; ximage->height = h; - XPutImage(dpy, drawable, gc, ximage, 0, 0, x, y, w, h); + XPutImage(dpy, drawable, gc, ximage, srcx, srcy, x, y, w, h); } ximage->data = NULL; } @@ -254,7 +255,21 @@ swrastPutImageShm(__DRIdrawable * draw, int op, struct drisw_drawable *pdp = loaderPrivate; pdp->shminfo.shmaddr = shmaddr; - swrastXPutImage(draw, op, x, y, w, h, stride, shmid, + swrastXPutImage(draw, op, 0, 0, x, y, w, h, stride, shmid, + shmaddr + offset, loaderPrivate); +} + +static void +swrastPutImageShm2(__DRIdrawable * draw, int op, + int x, int y, + int w, int h, int stride, + int shmid, char *shmaddr, unsigned offset, + void *loaderPrivate) +{ + struct drisw_drawable *pdp = loaderPrivate; + + pdp->shminfo.shmaddr = shmaddr; + swrastXPutImage(draw, op, x, 0, x, y, w, h, stride, shmid, shmaddr + offset, loaderPrivate); } @@ -263,7 +278,7 @@ swrastPutImage2(__DRIdrawable * draw, int op, int x, int y, int w, int h, int stride, char *data, void *loaderPrivate) { - swrastXPutImage(draw, op, x, y, w, h, stride, -1, + swrastXPutImage(draw, op, 0, 0, x, y, w, h, stride, -1, data, loaderPrivate); } @@ -272,7 +287,7 @@ swrastPutImage(__DRIdrawable * draw, int op, int x, int y, int w, int h, char *data, void *loaderPrivate) { - swrastXPutImage(draw, op, x, y, w, h, 0, -1, + swrastXPutImage(draw, op, 0, 0, x, y, w, h, 0, -1, data, loaderPrivate); } @@ -340,7 +355,7 @@ swrastGetImageShm(__DRIdrawable * read, } static const __DRIswrastLoaderExtension swrastLoaderExtension_shm = { - .base = {__DRI_SWRAST_LOADER, 4 }, + .base = {__DRI_SWRAST_LOADER, 5 }, .getDrawableInfo = swrastGetDrawableInfo, .putImage = swrastPutImage, @@ -349,6 +364,7 @@ static const __DRIswrastLoaderExtension swrastLoaderExtension_shm = { .getImage2 = swrastGetImage2, .putImageShm = swrastPutImageShm, .getImageShm = swrastGetImageShm, + .putImageShm2 = swrastPutImageShm2, }; static const __DRIextension *loader_extensions_shm[] = { diff --git a/lib/mesa/src/intel/compiler/brw_fs.cpp b/lib/mesa/src/intel/compiler/brw_fs.cpp index f68c667a1..e6e6d7177 100644 --- a/lib/mesa/src/intel/compiler/brw_fs.cpp +++ b/lib/mesa/src/intel/compiler/brw_fs.cpp @@ -251,6 +251,7 @@ fs_inst::is_send_from_grf() const case SHADER_OPCODE_TYPED_ATOMIC: case SHADER_OPCODE_TYPED_SURFACE_READ: case SHADER_OPCODE_TYPED_SURFACE_WRITE: + case SHADER_OPCODE_IMAGE_SIZE: case SHADER_OPCODE_URB_WRITE_SIMD8: case SHADER_OPCODE_URB_WRITE_SIMD8_PER_SLOT: case SHADER_OPCODE_URB_WRITE_SIMD8_MASKED: @@ -892,6 +893,7 @@ fs_inst::size_read(int arg) const case SHADER_OPCODE_TYPED_ATOMIC: case SHADER_OPCODE_TYPED_SURFACE_READ: case SHADER_OPCODE_TYPED_SURFACE_WRITE: + case SHADER_OPCODE_IMAGE_SIZE: case FS_OPCODE_INTERPOLATE_AT_SAMPLE: case FS_OPCODE_INTERPOLATE_AT_SHARED_OFFSET: case SHADER_OPCODE_BYTE_SCATTERED_WRITE: diff --git a/lib/mesa/src/intel/compiler/brw_fs_copy_propagation.cpp b/lib/mesa/src/intel/compiler/brw_fs_copy_propagation.cpp index a76e0f3a6..c23ce1ef4 100644 --- a/lib/mesa/src/intel/compiler/brw_fs_copy_propagation.cpp +++ b/lib/mesa/src/intel/compiler/brw_fs_copy_propagation.cpp @@ -371,6 +371,20 @@ can_take_stride(fs_inst *inst, unsigned arg, unsigned stride, return true; } +static bool +instruction_requires_packed_data(fs_inst *inst) +{ + switch (inst->opcode) { + case FS_OPCODE_DDX_FINE: + case FS_OPCODE_DDX_COARSE: + case FS_OPCODE_DDY_FINE: + case FS_OPCODE_DDY_COARSE: + return true; + default: + return false; + } +} + bool fs_visitor::try_copy_propagate(fs_inst *inst, int arg, acp_entry *entry) { @@ -417,6 +431,13 @@ fs_visitor::try_copy_propagate(fs_inst *inst, int arg, acp_entry *entry) inst->opcode == SHADER_OPCODE_GEN4_SCRATCH_WRITE) return false; + /* Some instructions implemented in the generator backend, such as + * derivatives, assume that their operands are packed so we can't + * generally propagate strided regions to them. + */ + if (instruction_requires_packed_data(inst) && entry->src.stride > 1) + return false; + /* Bail if the result of composing both strides would exceed the * hardware limit. */ diff --git a/lib/mesa/src/intel/compiler/brw_fs_reg_allocate.cpp b/lib/mesa/src/intel/compiler/brw_fs_reg_allocate.cpp index 42ccb28de..946e23c38 100644 --- a/lib/mesa/src/intel/compiler/brw_fs_reg_allocate.cpp +++ b/lib/mesa/src/intel/compiler/brw_fs_reg_allocate.cpp @@ -667,15 +667,14 @@ fs_visitor::assign_regs(bool allow_spilling, bool spill_all) * messages adding a node interference to the grf127_send_hack_node. * This node has a fixed asignment to grf127. * - * We don't apply it to SIMD16 because previous code avoids any register - * overlap between sources and destination. + * We don't apply it to SIMD16 instructions because previous code avoids + * any register overlap between sources and destination. */ ra_set_node_reg(g, grf127_send_hack_node, 127); - if (dispatch_width == 8) { - foreach_block_and_inst(block, fs_inst, inst, cfg) { - if (inst->is_send_from_grf() && inst->dst.file == VGRF) - ra_add_node_interference(g, inst->dst.nr, grf127_send_hack_node); - } + foreach_block_and_inst(block, fs_inst, inst, cfg) { + if (inst->exec_size < 16 && inst->is_send_from_grf() && + inst->dst.file == VGRF) + ra_add_node_interference(g, inst->dst.nr, grf127_send_hack_node); } if (spilled_any_registers) { diff --git a/lib/mesa/src/intel/vulkan/anv_descriptor_set.c b/lib/mesa/src/intel/vulkan/anv_descriptor_set.c index 2bd1d86f4..bbe7369fa 100644 --- a/lib/mesa/src/intel/vulkan/anv_descriptor_set.c +++ b/lib/mesa/src/intel/vulkan/anv_descriptor_set.c @@ -94,7 +94,22 @@ VkResult anv_CreateDescriptorSetLayout( uint32_t immutable_sampler_count = 0; for (uint32_t j = 0; j < pCreateInfo->bindingCount; j++) { max_binding = MAX2(max_binding, pCreateInfo->pBindings[j].binding); - if (pCreateInfo->pBindings[j].pImmutableSamplers) + + /* From the Vulkan 1.1.97 spec for VkDescriptorSetLayoutBinding: + * + * "If descriptorType specifies a VK_DESCRIPTOR_TYPE_SAMPLER or + * VK_DESCRIPTOR_TYPE_COMBINED_IMAGE_SAMPLER type descriptor, then + * pImmutableSamplers can be used to initialize a set of immutable + * samplers. [...] If descriptorType is not one of these descriptor + * types, then pImmutableSamplers is ignored. + * + * We need to be careful here and only parse pImmutableSamplers if we + * have one of the right descriptor types. + */ + VkDescriptorType desc_type = pCreateInfo->pBindings[j].descriptorType; + if ((desc_type == VK_DESCRIPTOR_TYPE_SAMPLER || + desc_type == VK_DESCRIPTOR_TYPE_COMBINED_IMAGE_SAMPLER) && + pCreateInfo->pBindings[j].pImmutableSamplers) immutable_sampler_count += pCreateInfo->pBindings[j].descriptorCount; } @@ -153,6 +168,12 @@ VkResult anv_CreateDescriptorSetLayout( if (binding == NULL) continue; + /* We temporarily stashed the pointer to the binding in the + * immutable_samplers pointer. Now that we've pulled it back out + * again, we reset immutable_samplers to NULL. + */ + set_layout->binding[b].immutable_samplers = NULL; + if (binding->descriptorCount == 0) continue; @@ -170,6 +191,15 @@ VkResult anv_CreateDescriptorSetLayout( set_layout->binding[b].stage[s].sampler_index = sampler_count[s]; sampler_count[s] += binding->descriptorCount; } + + if (binding->pImmutableSamplers) { + set_layout->binding[b].immutable_samplers = samplers; + samplers += binding->descriptorCount; + + for (uint32_t i = 0; i < binding->descriptorCount; i++) + set_layout->binding[b].immutable_samplers[i] = + anv_sampler_from_handle(binding->pImmutableSamplers[i]); + } break; default: break; @@ -221,17 +251,6 @@ VkResult anv_CreateDescriptorSetLayout( break; } - if (binding->pImmutableSamplers) { - set_layout->binding[b].immutable_samplers = samplers; - samplers += binding->descriptorCount; - - for (uint32_t i = 0; i < binding->descriptorCount; i++) - set_layout->binding[b].immutable_samplers[i] = - anv_sampler_from_handle(binding->pImmutableSamplers[i]); - } else { - set_layout->binding[b].immutable_samplers = NULL; - } - set_layout->shader_stages |= binding->stageFlags; } diff --git a/lib/mesa/src/intel/vulkan/anv_device.c b/lib/mesa/src/intel/vulkan/anv_device.c index 924470b30..071a30e6a 100644 --- a/lib/mesa/src/intel/vulkan/anv_device.c +++ b/lib/mesa/src/intel/vulkan/anv_device.c @@ -980,9 +980,12 @@ void anv_GetPhysicalDeviceProperties( const uint32_t max_samplers = (devinfo->gen >= 8 || devinfo->is_haswell) ? 128 : 16; + const uint32_t max_images = devinfo->gen < 9 ? MAX_GEN8_IMAGES : MAX_IMAGES; + VkSampleCountFlags sample_counts = isl_device_get_sample_counts(&pdevice->isl_dev); + VkPhysicalDeviceLimits limits = { .maxImageDimension1D = (1 << 14), .maxImageDimension2D = (1 << 14), @@ -1002,7 +1005,7 @@ void anv_GetPhysicalDeviceProperties( .maxPerStageDescriptorUniformBuffers = 64, .maxPerStageDescriptorStorageBuffers = 64, .maxPerStageDescriptorSampledImages = max_samplers, - .maxPerStageDescriptorStorageImages = 64, + .maxPerStageDescriptorStorageImages = max_images, .maxPerStageDescriptorInputAttachments = 64, .maxPerStageResources = 250, .maxDescriptorSetSamplers = 6 * max_samplers, /* number of stages * maxPerStageDescriptorSamplers */ @@ -1011,7 +1014,7 @@ void anv_GetPhysicalDeviceProperties( .maxDescriptorSetStorageBuffers = 6 * 64, /* number of stages * maxPerStageDescriptorStorageBuffers */ .maxDescriptorSetStorageBuffersDynamic = MAX_DYNAMIC_BUFFERS / 2, .maxDescriptorSetSampledImages = 6 * max_samplers, /* number of stages * maxPerStageDescriptorSampledImages */ - .maxDescriptorSetStorageImages = 6 * 64, /* number of stages * maxPerStageDescriptorStorageImages */ + .maxDescriptorSetStorageImages = 6 * max_images, /* number of stages * maxPerStageDescriptorStorageImages */ .maxDescriptorSetInputAttachments = 256, .maxVertexInputAttributes = MAX_VBS, .maxVertexInputBindings = MAX_VBS, diff --git a/lib/mesa/src/intel/vulkan/anv_nir.h b/lib/mesa/src/intel/vulkan/anv_nir.h index cf90c90f8..dd6c89529 100644 --- a/lib/mesa/src/intel/vulkan/anv_nir.h +++ b/lib/mesa/src/intel/vulkan/anv_nir.h @@ -40,7 +40,8 @@ bool anv_nir_lower_multiview(nir_shader *shader, uint32_t view_mask); bool anv_nir_lower_ycbcr_textures(nir_shader *shader, struct anv_pipeline_layout *layout); -void anv_nir_apply_pipeline_layout(struct anv_pipeline *pipeline, +void anv_nir_apply_pipeline_layout(const struct anv_physical_device *pdevice, + bool robust_buffer_access, struct anv_pipeline_layout *layout, nir_shader *shader, struct brw_stage_prog_data *prog_data, diff --git a/lib/mesa/src/intel/vulkan/anv_nir_apply_pipeline_layout.c b/lib/mesa/src/intel/vulkan/anv_nir_apply_pipeline_layout.c index 60c196e5c..4b0581947 100644 --- a/lib/mesa/src/intel/vulkan/anv_nir_apply_pipeline_layout.c +++ b/lib/mesa/src/intel/vulkan/anv_nir_apply_pipeline_layout.c @@ -428,7 +428,8 @@ setup_vec4_uniform_value(uint32_t *params, uint32_t offset, unsigned n) } void -anv_nir_apply_pipeline_layout(struct anv_pipeline *pipeline, +anv_nir_apply_pipeline_layout(const struct anv_physical_device *pdevice, + bool robust_buffer_access, struct anv_pipeline_layout *layout, nir_shader *shader, struct brw_stage_prog_data *prog_data, @@ -439,7 +440,7 @@ anv_nir_apply_pipeline_layout(struct anv_pipeline *pipeline, struct apply_pipeline_layout_state state = { .shader = shader, .layout = layout, - .add_bounds_checks = pipeline->device->robust_buffer_access, + .add_bounds_checks = robust_buffer_access, }; void *mem_ctx = ralloc_context(NULL); @@ -518,8 +519,8 @@ anv_nir_apply_pipeline_layout(struct anv_pipeline *pipeline, } } - if (map->image_count > 0) { - assert(map->image_count <= MAX_IMAGES); + if (map->image_count > 0 && pdevice->compiler->devinfo->gen < 9) { + assert(map->image_count <= MAX_GEN8_IMAGES); assert(shader->num_uniforms == prog_data->nr_params * 4); state.first_image_uniform = shader->num_uniforms; uint32_t *param = brw_stage_prog_data_add_params(prog_data, diff --git a/lib/mesa/src/intel/vulkan/anv_pipeline.c b/lib/mesa/src/intel/vulkan/anv_pipeline.c index f170366d0..ee37685fc 100644 --- a/lib/mesa/src/intel/vulkan/anv_pipeline.c +++ b/lib/mesa/src/intel/vulkan/anv_pipeline.c @@ -532,7 +532,9 @@ anv_pipeline_lower_nir(struct anv_pipeline *pipeline, /* Apply the actual pipeline layout to UBOs, SSBOs, and textures */ if (layout) { - anv_nir_apply_pipeline_layout(pipeline, layout, nir, prog_data, + anv_nir_apply_pipeline_layout(&pipeline->device->instance->physicalDevice, + pipeline->device->robust_buffer_access, + layout, nir, prog_data, &stage->bind_map); } diff --git a/lib/mesa/src/intel/vulkan/anv_private.h b/lib/mesa/src/intel/vulkan/anv_private.h index 37c710ad0..b705650a3 100644 --- a/lib/mesa/src/intel/vulkan/anv_private.h +++ b/lib/mesa/src/intel/vulkan/anv_private.h @@ -157,7 +157,8 @@ struct gen_l3_config; #define MAX_SCISSORS 16 #define MAX_PUSH_CONSTANTS_SIZE 128 #define MAX_DYNAMIC_BUFFERS 16 -#define MAX_IMAGES 8 +#define MAX_IMAGES 64 +#define MAX_GEN8_IMAGES 8 #define MAX_PUSH_DESCRIPTORS 32 /* Minimum requirement */ /* The kernel relocation API has a limitation of a 32-bit delta value @@ -1874,7 +1875,7 @@ struct anv_push_constants { uint32_t base_work_group_id[3]; /* Image data for image_load_store on pre-SKL */ - struct brw_image_param images[MAX_IMAGES]; + struct brw_image_param images[MAX_GEN8_IMAGES]; }; struct anv_dynamic_state { diff --git a/lib/mesa/src/intel/vulkan/gen7_cmd_buffer.c b/lib/mesa/src/intel/vulkan/gen7_cmd_buffer.c index da51cb978..90892a149 100644 --- a/lib/mesa/src/intel/vulkan/gen7_cmd_buffer.c +++ b/lib/mesa/src/intel/vulkan/gen7_cmd_buffer.c @@ -70,12 +70,36 @@ gen7_cmd_buffer_emit_scissor(struct anv_cmd_buffer *cmd_buffer) }; const int max = 0xffff; + + uint32_t y_min = s->offset.y; + uint32_t x_min = s->offset.x; + uint32_t y_max = s->offset.y + s->extent.height - 1; + uint32_t x_max = s->offset.x + s->extent.width - 1; + + /* Do this math using int64_t so overflow gets clamped correctly. */ + if (cmd_buffer->level == VK_COMMAND_BUFFER_LEVEL_PRIMARY) { + y_min = clamp_int64((uint64_t) y_min, + cmd_buffer->state.render_area.offset.y, max); + x_min = clamp_int64((uint64_t) x_min, + cmd_buffer->state.render_area.offset.x, max); + y_max = clamp_int64((uint64_t) y_max, 0, + cmd_buffer->state.render_area.offset.y + + cmd_buffer->state.render_area.extent.height - 1); + x_max = clamp_int64((uint64_t) x_max, 0, + cmd_buffer->state.render_area.offset.x + + cmd_buffer->state.render_area.extent.width - 1); + } else if (fb) { + y_min = clamp_int64((uint64_t) y_min, 0, max); + x_min = clamp_int64((uint64_t) x_min, 0, max); + y_max = clamp_int64((uint64_t) y_max, 0, fb->height - 1); + x_max = clamp_int64((uint64_t) x_max, 0, fb->width - 1); + } + struct GEN7_SCISSOR_RECT scissor = { - /* Do this math using int64_t so overflow gets clamped correctly. */ - .ScissorRectangleYMin = clamp_int64(s->offset.y, 0, max), - .ScissorRectangleXMin = clamp_int64(s->offset.x, 0, max), - .ScissorRectangleYMax = clamp_int64((uint64_t) s->offset.y + s->extent.height - 1, 0, fb->height - 1), - .ScissorRectangleXMax = clamp_int64((uint64_t) s->offset.x + s->extent.width - 1, 0, fb->width - 1) + .ScissorRectangleYMin = y_min, + .ScissorRectangleXMin = x_min, + .ScissorRectangleYMax = y_max, + .ScissorRectangleXMax = x_max }; if (s->extent.width <= 0 || s->extent.height <= 0) { diff --git a/lib/mesa/src/intel/vulkan/genX_cmd_buffer.c b/lib/mesa/src/intel/vulkan/genX_cmd_buffer.c index dcf376549..5b38bf966 100644 --- a/lib/mesa/src/intel/vulkan/genX_cmd_buffer.c +++ b/lib/mesa/src/intel/vulkan/genX_cmd_buffer.c @@ -1998,6 +1998,7 @@ emit_binding_table(struct anv_cmd_buffer *cmd_buffer, gl_shader_stage stage, struct anv_state *bt_state) { + const struct gen_device_info *devinfo = &cmd_buffer->device->info; struct anv_subpass *subpass = cmd_buffer->state.subpass; struct anv_cmd_pipeline_state *pipe_state; struct anv_pipeline *pipeline; @@ -2055,7 +2056,8 @@ emit_binding_table(struct anv_cmd_buffer *cmd_buffer, if (map->surface_count == 0) goto out; - if (map->image_count > 0) { + /* We only use push constant space for images before gen9 */ + if (map->image_count > 0 && devinfo->gen < 9) { VkResult result = anv_cmd_buffer_ensure_push_constant_field(cmd_buffer, stage, images); if (result != VK_SUCCESS) @@ -2168,11 +2170,15 @@ emit_binding_table(struct anv_cmd_buffer *cmd_buffer, surface_state = sstate.state; assert(surface_state.alloc_size); add_surface_state_relocs(cmd_buffer, sstate); + if (devinfo->gen < 9) { + assert(image < MAX_GEN8_IMAGES); + struct brw_image_param *image_param = + &cmd_buffer->state.push_constants[stage]->images[image]; - struct brw_image_param *image_param = - &cmd_buffer->state.push_constants[stage]->images[image++]; - - *image_param = desc->image_view->planes[binding->plane].storage_image_param; + *image_param = + desc->image_view->planes[binding->plane].storage_image_param; + } + image++; break; } @@ -2217,11 +2223,14 @@ emit_binding_table(struct anv_cmd_buffer *cmd_buffer, assert(surface_state.alloc_size); add_surface_reloc(cmd_buffer, surface_state, desc->buffer_view->address); + if (devinfo->gen < 9) { + assert(image < MAX_GEN8_IMAGES); + struct brw_image_param *image_param = + &cmd_buffer->state.push_constants[stage]->images[image]; - struct brw_image_param *image_param = - &cmd_buffer->state.push_constants[stage]->images[image++]; - - *image_param = desc->buffer_view->storage_image_param; + *image_param = desc->buffer_view->storage_image_param; + } + image++; break; default: diff --git a/lib/mesa/src/loader/loader_dri3_helper.c b/lib/mesa/src/loader/loader_dri3_helper.c index 7cd6b1e8a..a8c1f8fc9 100644 --- a/lib/mesa/src/loader/loader_dri3_helper.c +++ b/lib/mesa/src/loader/loader_dri3_helper.c @@ -1273,12 +1273,20 @@ dri3_alloc_render_buffer(struct loader_dri3_drawable *draw, unsigned int format, free(mod_reply); - buffer->image = draw->ext->image->createImageWithModifiers(draw->dri_screen, - width, height, - format, - modifiers, - count, - buffer); + /* don't use createImageWithModifiers() if we have no + * modifiers, other things depend on the use flags when + * there are no modifiers to know that a buffer can be + * shared. + */ + if (modifiers) { + buffer->image = draw->ext->image->createImageWithModifiers(draw->dri_screen, + width, height, + format, + modifiers, + count, + buffer); + } + free(modifiers); } #endif diff --git a/lib/mesa/src/mesa/state_tracker/st_extensions.c b/lib/mesa/src/mesa/state_tracker/st_extensions.c index 798ee6087..d3113b3fb 100644 --- a/lib/mesa/src/mesa/state_tracker/st_extensions.c +++ b/lib/mesa/src/mesa/state_tracker/st_extensions.c @@ -222,8 +222,13 @@ void st_init_limits(struct pipe_screen *screen, pc->MaxUniformComponents = MIN2(pc->MaxUniformComponents, MAX_UNIFORMS * 4); + /* For ARB programs, prog_src_register::Index is a signed 13-bit number. + * This gives us a limit of 4096 values - but we may need to generate + * internal values in addition to what the source program uses. So, we + * drop the limit one step lower, to 2048, to be safe. + */ pc->MaxParameters = - pc->MaxNativeParameters = pc->MaxUniformComponents / 4; + pc->MaxNativeParameters = MIN2(pc->MaxUniformComponents / 4, 2048); pc->MaxInputComponents = screen->get_shader_param(screen, sh, PIPE_SHADER_CAP_MAX_INPUTS) * 4; pc->MaxOutputComponents = diff --git a/lib/mesa/src/mesa/state_tracker/st_manager.c b/lib/mesa/src/mesa/state_tracker/st_manager.c index 776b563e5..7b74a37b9 100644 --- a/lib/mesa/src/mesa/state_tracker/st_manager.c +++ b/lib/mesa/src/mesa/state_tracker/st_manager.c @@ -1071,7 +1071,12 @@ st_api_make_current(struct st_api *stapi, struct st_context_iface *stctxi, st_framebuffers_purge(st); } else { + GET_CURRENT_CONTEXT(ctx); + ret = _mesa_make_current(NULL, NULL, NULL); + + if (ctx) + st_framebuffers_purge(ctx->st); } return ret; |