diff options
Diffstat (limited to 'lib/mesa/src/gallium/drivers/r300')
-rw-r--r-- | lib/mesa/src/gallium/drivers/r300/Makefile.in | 55 | ||||
-rw-r--r-- | lib/mesa/src/gallium/drivers/r300/r300_blit.c | 14 | ||||
-rw-r--r-- | lib/mesa/src/gallium/drivers/r300/r300_context.c | 33 | ||||
-rw-r--r-- | lib/mesa/src/gallium/drivers/r300/r300_query.c | 22 | ||||
-rw-r--r-- | lib/mesa/src/gallium/drivers/r300/r300_screen.c | 74 | ||||
-rw-r--r-- | lib/mesa/src/gallium/drivers/r300/r300_screen.h | 4 | ||||
-rw-r--r-- | lib/mesa/src/gallium/drivers/r300/r300_state.c | 59 | ||||
-rw-r--r-- | lib/mesa/src/gallium/drivers/r300/r300_texture.c | 133 |
8 files changed, 236 insertions, 158 deletions
diff --git a/lib/mesa/src/gallium/drivers/r300/Makefile.in b/lib/mesa/src/gallium/drivers/r300/Makefile.in index aba4803bf..075e2646b 100644 --- a/lib/mesa/src/gallium/drivers/r300/Makefile.in +++ b/lib/mesa/src/gallium/drivers/r300/Makefile.in @@ -54,13 +54,10 @@ target_triplet = @target@ DIST_COMMON = $(srcdir)/Makefile.am $(srcdir)/Makefile.in \ $(srcdir)/Makefile.sources $(top_srcdir)/bin/depcomp \ $(top_srcdir)/src/gallium/Automake.inc -@HAVE_LIBDRM_TRUE@am__append_1 = \ -@HAVE_LIBDRM_TRUE@ $(LIBDRM_LIBS) - -@HAVE_DRISW_TRUE@am__append_2 = \ +@HAVE_DRISW_TRUE@am__append_1 = \ @HAVE_DRISW_TRUE@ $(top_builddir)/src/gallium/winsys/sw/dri/libswdri.la -@HAVE_DRISW_KMS_TRUE@am__append_3 = \ +@HAVE_DRISW_KMS_TRUE@am__append_2 = \ @HAVE_DRISW_KMS_TRUE@ $(top_builddir)/src/gallium/winsys/sw/kms-dri/libswkmsdri.la \ @HAVE_DRISW_KMS_TRUE@ $(LIBDRM_LIBS) @@ -132,13 +129,11 @@ am__objects_2 = compiler/tests/r300_compiler_tests-r300_compiler_tests.$(OBJEXT) am_r300_compiler_tests_OBJECTS = $(am__objects_2) r300_compiler_tests_OBJECTS = $(am_r300_compiler_tests_OBJECTS) am__DEPENDENCIES_1 = -@HAVE_LIBDRM_TRUE@am__DEPENDENCIES_2 = $(am__DEPENDENCIES_1) -am__DEPENDENCIES_3 = $(am__DEPENDENCIES_1) $(am__DEPENDENCIES_1) \ - $(am__DEPENDENCIES_1) $(am__DEPENDENCIES_1) \ - $(am__DEPENDENCIES_1) $(am__DEPENDENCIES_2) +am__DEPENDENCIES_2 = $(am__DEPENDENCIES_1) $(am__DEPENDENCIES_1) \ + $(am__DEPENDENCIES_1) r300_compiler_tests_DEPENDENCIES = libr300.la \ $(top_builddir)/src/gallium/auxiliary/libgallium.la \ - $(top_builddir)/src/util/libmesautil.la $(am__DEPENDENCIES_3) + $(top_builddir)/src/util/libmesautil.la $(am__DEPENDENCIES_2) AM_V_P = $(am__v_P_@AM_V@) am__v_P_ = $(am__v_P_@AM_DEFAULT_V@) am__v_P_0 = false @@ -192,8 +187,6 @@ AMDGPU_CFLAGS = @AMDGPU_CFLAGS@ AMDGPU_LIBS = @AMDGPU_LIBS@ AMTAR = @AMTAR@ AM_DEFAULT_VERBOSITY = @AM_DEFAULT_VERBOSITY@ -ANDROID_CFLAGS = @ANDROID_CFLAGS@ -ANDROID_LIBS = @ANDROID_LIBS@ AR = @AR@ AUTOCONF = @AUTOCONF@ AUTOHEADER = @AUTOHEADER@ @@ -224,6 +217,8 @@ DLLTOOL = @DLLTOOL@ DLOPEN_LIBS = @DLOPEN_LIBS@ DRI2PROTO_CFLAGS = @DRI2PROTO_CFLAGS@ DRI2PROTO_LIBS = @DRI2PROTO_LIBS@ +DRI3PROTO_CFLAGS = @DRI3PROTO_CFLAGS@ +DRI3PROTO_LIBS = @DRI3PROTO_LIBS@ DRIGL_CFLAGS = @DRIGL_CFLAGS@ DRIGL_LIBS = @DRIGL_LIBS@ DRI_DRIVER_INSTALL_DIR = @DRI_DRIVER_INSTALL_DIR@ @@ -236,11 +231,10 @@ ECHO_C = @ECHO_C@ ECHO_N = @ECHO_N@ ECHO_T = @ECHO_T@ EGL_CFLAGS = @EGL_CFLAGS@ +EGL_CLIENT_APIS = @EGL_CLIENT_APIS@ EGL_LIB_DEPS = @EGL_LIB_DEPS@ EGL_NATIVE_PLATFORM = @EGL_NATIVE_PLATFORM@ EGREP = @EGREP@ -ETNAVIV_CFLAGS = @ETNAVIV_CFLAGS@ -ETNAVIV_LIBS = @ETNAVIV_LIBS@ EXEEXT = @EXEEXT@ EXPAT_CFLAGS = @EXPAT_CFLAGS@ EXPAT_LIBS = @EXPAT_LIBS@ @@ -288,27 +282,31 @@ LIBDRM_CFLAGS = @LIBDRM_CFLAGS@ LIBDRM_LIBS = @LIBDRM_LIBS@ LIBELF_CFLAGS = @LIBELF_CFLAGS@ LIBELF_LIBS = @LIBELF_LIBS@ -LIBGLVND_DATADIR = @LIBGLVND_DATADIR@ LIBOBJS = @LIBOBJS@ LIBS = @LIBS@ -LIBSENSORS_LIBS = @LIBSENSORS_LIBS@ +LIBSENSORS_LDFLAGS = @LIBSENSORS_LDFLAGS@ +LIBSHA1_CFLAGS = @LIBSHA1_CFLAGS@ +LIBSHA1_LIBS = @LIBSHA1_LIBS@ LIBTOOL = @LIBTOOL@ -LIBUNWIND_CFLAGS = @LIBUNWIND_CFLAGS@ -LIBUNWIND_LIBS = @LIBUNWIND_LIBS@ LIB_DIR = @LIB_DIR@ LIB_EXT = @LIB_EXT@ LIPO = @LIPO@ +LLVM_BINDIR = @LLVM_BINDIR@ LLVM_CFLAGS = @LLVM_CFLAGS@ LLVM_CONFIG = @LLVM_CONFIG@ +LLVM_CPPFLAGS = @LLVM_CPPFLAGS@ LLVM_CXXFLAGS = @LLVM_CXXFLAGS@ LLVM_INCLUDEDIR = @LLVM_INCLUDEDIR@ LLVM_LDFLAGS = @LLVM_LDFLAGS@ +LLVM_LIBDIR = @LLVM_LIBDIR@ LLVM_LIBS = @LLVM_LIBS@ +LLVM_VERSION = @LLVM_VERSION@ LN_S = @LN_S@ LTLIBOBJS = @LTLIBOBJS@ MAINT = @MAINT@ MAKEINFO = @MAKEINFO@ MANIFEST_TOOL = @MANIFEST_TOOL@ +MESA_LLVM = @MESA_LLVM@ MKDIR_P = @MKDIR_P@ MSVC2013_COMPAT_CFLAGS = @MSVC2013_COMPAT_CFLAGS@ MSVC2013_COMPAT_CXXFLAGS = @MSVC2013_COMPAT_CXXFLAGS@ @@ -329,6 +327,8 @@ OMX_LIBS = @OMX_LIBS@ OMX_LIB_INSTALL_DIR = @OMX_LIB_INSTALL_DIR@ OPENCL_LIBNAME = @OPENCL_LIBNAME@ OPENCL_VERSION = @OPENCL_VERSION@ +OPENSSL_CFLAGS = @OPENSSL_CFLAGS@ +OPENSSL_LIBS = @OPENSSL_LIBS@ OSMESA_LIB = @OSMESA_LIB@ OSMESA_LIB_DEPS = @OSMESA_LIB_DEPS@ OSMESA_PC_LIB_PRIV = @OSMESA_PC_LIB_PRIV@ @@ -348,6 +348,8 @@ PKG_CONFIG = @PKG_CONFIG@ PKG_CONFIG_LIBDIR = @PKG_CONFIG_LIBDIR@ PKG_CONFIG_PATH = @PKG_CONFIG_PATH@ POSIX_SHELL = @POSIX_SHELL@ +PRESENTPROTO_CFLAGS = @PRESENTPROTO_CFLAGS@ +PRESENTPROTO_LIBS = @PRESENTPROTO_LIBS@ PTHREADSTUBS_CFLAGS = @PTHREADSTUBS_CFLAGS@ PTHREADSTUBS_LIBS = @PTHREADSTUBS_LIBS@ PTHREAD_CC = @PTHREAD_CC@ @@ -363,6 +365,8 @@ SED = @SED@ SELINUX_CFLAGS = @SELINUX_CFLAGS@ SELINUX_LIBS = @SELINUX_LIBS@ SET_MAKE = @SET_MAKE@ +SHA1_CFLAGS = @SHA1_CFLAGS@ +SHA1_LIBS = @SHA1_LIBS@ SHELL = @SHELL@ SIMPENROSE_CFLAGS = @SIMPENROSE_CFLAGS@ SIMPENROSE_LIBS = @SIMPENROSE_LIBS@ @@ -371,6 +375,7 @@ STRIP = @STRIP@ SWR_AVX2_CXXFLAGS = @SWR_AVX2_CXXFLAGS@ SWR_AVX_CXXFLAGS = @SWR_AVX_CXXFLAGS@ SWR_CXX11_CXXFLAGS = @SWR_CXX11_CXXFLAGS@ +TIMESTAMP_CMD = @TIMESTAMP_CMD@ VALGRIND_CFLAGS = @VALGRIND_CFLAGS@ VALGRIND_LIBS = @VALGRIND_LIBS@ VA_CFLAGS = @VA_CFLAGS@ @@ -386,6 +391,7 @@ VDPAU_LIB_INSTALL_DIR = @VDPAU_LIB_INSTALL_DIR@ VDPAU_MAJOR = @VDPAU_MAJOR@ VDPAU_MINOR = @VDPAU_MINOR@ VERSION = @VERSION@ +VG_LIB_DEPS = @VG_LIB_DEPS@ VISIBILITY_CFLAGS = @VISIBILITY_CFLAGS@ VISIBILITY_CXXFLAGS = @VISIBILITY_CXXFLAGS@ VL_CFLAGS = @VL_CFLAGS@ @@ -414,10 +420,9 @@ XVMC_LIBS = @XVMC_LIBS@ XVMC_LIB_INSTALL_DIR = @XVMC_LIB_INSTALL_DIR@ XVMC_MAJOR = @XVMC_MAJOR@ XVMC_MINOR = @XVMC_MINOR@ +XXD = @XXD@ YACC = @YACC@ YFLAGS = @YFLAGS@ -ZLIB_CFLAGS = @ZLIB_CFLAGS@ -ZLIB_LIBS = @ZLIB_LIBS@ abs_builddir = @abs_builddir@ abs_srcdir = @abs_srcdir@ abs_top_builddir = @abs_top_builddir@ @@ -636,8 +641,12 @@ GALLIUM_TARGET_CFLAGS = \ $(LIBDRM_CFLAGS) \ $(VISIBILITY_CFLAGS) -GALLIUM_COMMON_LIB_DEPS = -lm $(LIBUNWIND_LIBS) $(LIBSENSORS_LIBS) \ - $(CLOCK_LIB) $(PTHREAD_LIBS) $(DLOPEN_LIBS) $(am__append_1) +GALLIUM_COMMON_LIB_DEPS = \ + -lm \ + $(CLOCK_LIB) \ + $(PTHREAD_LIBS) \ + $(DLOPEN_LIBS) + GALLIUM_WINSYS_CFLAGS = \ -I$(top_srcdir)/src \ -I$(top_srcdir)/include \ @@ -649,7 +658,7 @@ GALLIUM_WINSYS_CFLAGS = \ GALLIUM_PIPE_LOADER_WINSYS_LIBS = \ $(top_builddir)/src/gallium/winsys/sw/null/libws_null.la \ $(top_builddir)/src/gallium/winsys/sw/wrapper/libwsw.la \ - $(am__append_2) $(am__append_3) + $(am__append_1) $(am__append_2) AM_CFLAGS = \ -I$(top_srcdir)/src \ -I$(top_srcdir)/src/mesa/program \ diff --git a/lib/mesa/src/gallium/drivers/r300/r300_blit.c b/lib/mesa/src/gallium/drivers/r300/r300_blit.c index b8cc316c2..b5c3ae5ac 100644 --- a/lib/mesa/src/gallium/drivers/r300/r300_blit.c +++ b/lib/mesa/src/gallium/drivers/r300/r300_blit.c @@ -382,7 +382,7 @@ static void r300_clear(struct pipe_context* pipe, r300_get_num_cs_end_dwords(r300); /* Reserve CS space. */ - if (dwords > (r300->cs->max_dw - r300->cs->cdw)) { + if (!r300->rws->cs_check_space(r300->cs, dwords)) { r300_flush(&r300->context, RADEON_FLUSH_ASYNC, NULL); } @@ -430,11 +430,13 @@ static void r300_clear_render_target(struct pipe_context *pipe, struct pipe_surface *dst, const union pipe_color_union *color, unsigned dstx, unsigned dsty, - unsigned width, unsigned height) + unsigned width, unsigned height, + bool render_condition_enabled) { struct r300_context *r300 = r300_context(pipe); - r300_blitter_begin(r300, R300_CLEAR_SURFACE); + r300_blitter_begin(r300, R300_CLEAR_SURFACE | + (render_condition_enabled ? 0 : R300_IGNORE_RENDER_COND)); util_blitter_clear_render_target(r300->blitter, dst, color, dstx, dsty, width, height); r300_blitter_end(r300); @@ -447,7 +449,8 @@ static void r300_clear_depth_stencil(struct pipe_context *pipe, double depth, unsigned stencil, unsigned dstx, unsigned dsty, - unsigned width, unsigned height) + unsigned width, unsigned height, + bool render_condition_enabled) { struct r300_context *r300 = r300_context(pipe); struct pipe_framebuffer_state *fb = @@ -460,7 +463,8 @@ static void r300_clear_depth_stencil(struct pipe_context *pipe, } /* XXX Do not decompress ZMask of the currently-set zbuffer. */ - r300_blitter_begin(r300, R300_CLEAR_SURFACE); + r300_blitter_begin(r300, R300_CLEAR_SURFACE | + (render_condition_enabled ? 0 : R300_IGNORE_RENDER_COND)); util_blitter_clear_depth_stencil(r300->blitter, dst, clear_flags, depth, stencil, dstx, dsty, width, height); r300_blitter_end(r300); diff --git a/lib/mesa/src/gallium/drivers/r300/r300_context.c b/lib/mesa/src/gallium/drivers/r300/r300_context.c index 8c24ad6d9..b914cdb91 100644 --- a/lib/mesa/src/gallium/drivers/r300/r300_context.c +++ b/lib/mesa/src/gallium/drivers/r300/r300_context.c @@ -100,7 +100,7 @@ static void r300_destroy_context(struct pipe_context* context) rc_destroy_regalloc_state(&r300->fs_regalloc_state); /* XXX: No way to tell if this was initialized or not? */ - util_slab_destroy(&r300->pool_transfers); + slab_destroy_child(&r300->pool_transfers); /* Free the structs allocated in r300_setup_atoms() */ if (r300->aa_state.state) { @@ -156,7 +156,6 @@ static boolean r300_setup_atoms(struct r300_context* r300) boolean is_rv350 = r300->screen->caps.is_rv350; boolean is_r500 = r300->screen->caps.is_r500; boolean has_tcl = r300->screen->caps.has_tcl; - boolean drm_2_6_0 = r300->screen->info.drm_minor >= 6; /* Create the actual atom list. * @@ -175,11 +174,11 @@ static boolean r300_setup_atoms(struct r300_context* r300) R300_INIT_ATOM(gpu_flush, 9); R300_INIT_ATOM(aa_state, 4); R300_INIT_ATOM(fb_state, 0); - R300_INIT_ATOM(hyperz_state, is_r500 || (is_rv350 && drm_2_6_0) ? 10 : 8); + R300_INIT_ATOM(hyperz_state, is_r500 || is_rv350 ? 10 : 8); /* ZB (unpipelined), SC. */ R300_INIT_ATOM(ztop_state, 2); /* ZB, FG. */ - R300_INIT_ATOM(dsa_state, is_r500 ? (drm_2_6_0 ? 10 : 8) : 6); + R300_INIT_ATOM(dsa_state, is_r500 ? 10 : 6); /* RB3D. */ R300_INIT_ATOM(blend_state, 8); R300_INIT_ATOM(blend_color_state, is_r500 ? 3 : 2); @@ -191,7 +190,7 @@ static boolean r300_setup_atoms(struct r300_context* r300) /* VAP. */ R300_INIT_ATOM(viewport_state, 9); R300_INIT_ATOM(pvs_flush, 2); - R300_INIT_ATOM(vap_invariant_state, is_r500 ? 11 : 9); + R300_INIT_ATOM(vap_invariant_state, is_r500 || !has_tcl ? 11 : 9); R300_INIT_ATOM(vertex_stream_state, 0); R300_INIT_ATOM(vs_state, 0); R300_INIT_ATOM(vs_constants, 0); @@ -315,6 +314,14 @@ static void r300_init_states(struct pipe_context *pipe) if (r300->screen->caps.is_r500) { OUT_CB_REG(R500_VAP_TEX_TO_COLOR_CNTL, 0); + } else if (!r300->screen->caps.has_tcl) { + /* RSxxx: + * Static VAP setup since r300_emit_vs_state() is never called. + */ + OUT_CB_REG(R300_VAP_CNTL, R300_PVS_NUM_SLOTS(10) | + R300_PVS_NUM_CNTLRS(5) | + R300_PVS_NUM_FPUS(2) | + R300_PVS_VF_MAX_VTX_NUM(5)); } END_CB; } @@ -353,9 +360,7 @@ static void r300_init_states(struct pipe_context *pipe) OUT_CB_REG(R300_ZB_DEPTHCLEARVALUE, 0); OUT_CB_REG(R300_SC_HYPERZ, R300_SC_HYPERZ_ADJ_2); - if (r300->screen->caps.is_r500 || - (r300->screen->caps.is_rv350 && - r300->screen->info.drm_minor >= 6)) { + if (r300->screen->caps.is_r500 || r300->screen->caps.is_rv350) { OUT_CB_REG(R300_GB_Z_PEQ_CONFIG, 0); } END_CB; @@ -363,7 +368,7 @@ static void r300_init_states(struct pipe_context *pipe) } struct pipe_context* r300_create_context(struct pipe_screen* screen, - void *priv) + void *priv, unsigned flags) { struct r300_context* r300 = CALLOC_STRUCT(r300_context); struct r300_screen* r300screen = r300_screen(screen); @@ -380,15 +385,13 @@ struct pipe_context* r300_create_context(struct pipe_screen* screen, r300->context.destroy = r300_destroy_context; - util_slab_create(&r300->pool_transfers, - sizeof(struct pipe_transfer), 64, - UTIL_SLAB_SINGLETHREADED); + slab_create_child(&r300->pool_transfers, &r300screen->pool_transfers); r300->ctx = rws->ctx_create(rws); if (!r300->ctx) goto fail; - r300->cs = rws->cs_create(r300->ctx, RING_GFX, r300_flush_callback, r300, NULL); + r300->cs = rws->cs_create(r300->ctx, RING_GFX, r300_flush_callback, r300); if (r300->cs == NULL) goto fail; @@ -421,8 +424,8 @@ struct pipe_context* r300_create_context(struct pipe_screen* screen, r300->context.create_video_codec = vl_create_decoder; r300->context.create_video_buffer = vl_video_buffer_create; - r300->uploader = u_upload_create(&r300->context, 256 * 1024, 4, - PIPE_BIND_CUSTOM); + r300->uploader = u_upload_create(&r300->context, 256 * 1024, + PIPE_BIND_CUSTOM, PIPE_USAGE_STREAM); r300->blitter = util_blitter_create(&r300->context); if (r300->blitter == NULL) diff --git a/lib/mesa/src/gallium/drivers/r300/r300_query.c b/lib/mesa/src/gallium/drivers/r300/r300_query.c index 4dd8156f6..79e2198d3 100644 --- a/lib/mesa/src/gallium/drivers/r300/r300_query.c +++ b/lib/mesa/src/gallium/drivers/r300/r300_query.c @@ -58,14 +58,14 @@ static struct pipe_query *r300_create_query(struct pipe_context *pipe, else q->num_pipes = r300screen->info.r300_num_gb_pipes; - q->buf = r300->rws->buffer_create(r300->rws, 4096, 4096, TRUE, + q->buf = r300->rws->buffer_create(r300->rws, + r300screen->info.gart_page_size, + r300screen->info.gart_page_size, RADEON_DOMAIN_GTT, 0); if (!q->buf) { FREE(q); return NULL; } - q->cs_buf = r300->rws->buffer_get_cs_handle(q->buf); - return (struct pipe_query*)q; } @@ -112,7 +112,7 @@ void r300_stop_query(struct r300_context *r300) r300->query_current = NULL; } -static void r300_end_query(struct pipe_context* pipe, +static bool r300_end_query(struct pipe_context* pipe, struct pipe_query* query) { struct r300_context* r300 = r300_context(pipe); @@ -122,16 +122,18 @@ static void r300_end_query(struct pipe_context* pipe, pb_reference(&q->buf, NULL); r300_flush(pipe, RADEON_FLUSH_ASYNC, (struct pipe_fence_handle**)&q->buf); - return; + return true; } if (q != r300->query_current) { fprintf(stderr, "r300: end_query: Got invalid query.\n"); assert(0); - return; + return false; } r300_stop_query(r300); + + return true; } static boolean r300_get_query_result(struct pipe_context* pipe, @@ -155,7 +157,7 @@ static boolean r300_get_query_result(struct pipe_context* pipe, return vresult->b; } - map = r300->rws->buffer_map(q->cs_buf, r300->cs, + map = r300->rws->buffer_map(q->buf, r300->cs, PIPE_TRANSFER_READ | (!wait ? PIPE_TRANSFER_DONTBLOCK : 0)); if (!map) @@ -202,6 +204,11 @@ static void r300_render_condition(struct pipe_context *pipe, } } +static void +r300_set_active_query_state(struct pipe_context *pipe, boolean enable) +{ +} + void r300_init_query_functions(struct r300_context* r300) { r300->context.create_query = r300_create_query; @@ -209,5 +216,6 @@ void r300_init_query_functions(struct r300_context* r300) r300->context.begin_query = r300_begin_query; r300->context.end_query = r300_end_query; r300->context.get_query_result = r300_get_query_result; + r300->context.set_active_query_state = r300_set_active_query_state; r300->context.render_condition = r300_render_condition; } diff --git a/lib/mesa/src/gallium/drivers/r300/r300_screen.c b/lib/mesa/src/gallium/drivers/r300/r300_screen.c index 869dfc05e..0b147f9b7 100644 --- a/lib/mesa/src/gallium/drivers/r300/r300_screen.c +++ b/lib/mesa/src/gallium/drivers/r300/r300_screen.c @@ -95,6 +95,7 @@ static int r300_get_param(struct pipe_screen* pscreen, enum pipe_cap param) /* Supported features (boolean caps). */ case PIPE_CAP_NPOT_TEXTURES: case PIPE_CAP_MIXED_FRAMEBUFFER_SIZES: + case PIPE_CAP_MIXED_COLOR_DEPTH_BITS: case PIPE_CAP_TWO_SIDED_STENCIL: case PIPE_CAP_ANISOTROPIC_FILTER: case PIPE_CAP_POINT_SPRITE: @@ -183,6 +184,8 @@ static int r300_get_param(struct pipe_screen* pscreen, enum pipe_cap param) case PIPE_CAP_SAMPLE_SHADING: case PIPE_CAP_TEXTURE_GATHER_OFFSETS: case PIPE_CAP_DRAW_INDIRECT: + case PIPE_CAP_MULTI_DRAW_INDIRECT: + case PIPE_CAP_MULTI_DRAW_INDIRECT_PARAMS: case PIPE_CAP_TGSI_FS_FINE_DERIVATIVE: case PIPE_CAP_CONDITIONAL_RENDER_INVERTED: case PIPE_CAP_SAMPLER_VIEW_TARGET: @@ -195,6 +198,32 @@ static int r300_get_param(struct pipe_screen* pscreen, enum pipe_cap param) case PIPE_CAP_TEXTURE_FLOAT_LINEAR: case PIPE_CAP_TEXTURE_HALF_FLOAT_LINEAR: case PIPE_CAP_DEPTH_BOUNDS_TEST: + case PIPE_CAP_TGSI_TXQS: + case PIPE_CAP_FORCE_PERSAMPLE_INTERP: + case PIPE_CAP_SHAREABLE_SHADERS: + case PIPE_CAP_COPY_BETWEEN_COMPRESSED_AND_PLAIN_FORMATS: + case PIPE_CAP_CLEAR_TEXTURE: + case PIPE_CAP_DRAW_PARAMETERS: + case PIPE_CAP_TGSI_PACK_HALF_FLOAT: + case PIPE_CAP_TGSI_FS_POSITION_IS_SYSVAL: + case PIPE_CAP_TGSI_FS_FACE_IS_INTEGER_SYSVAL: + case PIPE_CAP_SHADER_BUFFER_OFFSET_ALIGNMENT: + case PIPE_CAP_INVALIDATE_BUFFER: + case PIPE_CAP_GENERATE_MIPMAP: + case PIPE_CAP_STRING_MARKER: + case PIPE_CAP_BUFFER_SAMPLER_VIEW_RGBA_ONLY: + case PIPE_CAP_SURFACE_REINTERPRET_BLOCKS: + case PIPE_CAP_QUERY_BUFFER_OBJECT: + case PIPE_CAP_QUERY_MEMORY_INFO: + case PIPE_CAP_FRAMEBUFFER_NO_ATTACHMENT: + case PIPE_CAP_ROBUST_BUFFER_ACCESS_BEHAVIOR: + case PIPE_CAP_CULL_DISTANCE: + case PIPE_CAP_PRIMITIVE_RESTART_FOR_PATCHES: + case PIPE_CAP_TGSI_VOTE: + case PIPE_CAP_MAX_WINDOW_RECTANGLES: + case PIPE_CAP_POLYGON_OFFSET_UNITS_UNSCALED: + case PIPE_CAP_VIEWPORT_SUBPIXEL_BITS: + case PIPE_CAP_TGSI_ARRAY_COMPONENTS: return 0; /* SWTCL-only features. */ @@ -240,6 +269,14 @@ static int r300_get_param(struct pipe_screen* pscreen, enum pipe_cap param) return r300screen->info.vram_size >> 20; case PIPE_CAP_UMA: return 0; + case PIPE_CAP_PCI_GROUP: + return r300screen->info.pci_domain; + case PIPE_CAP_PCI_BUS: + return r300screen->info.pci_bus; + case PIPE_CAP_PCI_DEVICE: + return r300screen->info.pci_dev; + case PIPE_CAP_PCI_FUNCTION: + return r300screen->info.pci_func; } return 0; } @@ -299,11 +336,15 @@ static int r300_get_shader_param(struct pipe_screen *pscreen, unsigned shader, e case PIPE_SHADER_CAP_TGSI_DROUND_SUPPORTED: case PIPE_SHADER_CAP_TGSI_DFRACEXP_DLDEXP_SUPPORTED: case PIPE_SHADER_CAP_TGSI_FMA_SUPPORTED: + case PIPE_SHADER_CAP_MAX_SHADER_BUFFERS: + case PIPE_SHADER_CAP_MAX_SHADER_IMAGES: return 0; case PIPE_SHADER_CAP_MAX_UNROLL_ITERATIONS_HINT: return 32; case PIPE_SHADER_CAP_PREFERRED_IR: return PIPE_SHADER_IR_TGSI; + case PIPE_SHADER_CAP_SUPPORTED_IRS: + return 0; } break; case PIPE_SHADER_VERTEX: @@ -357,11 +398,15 @@ static int r300_get_shader_param(struct pipe_screen *pscreen, unsigned shader, e case PIPE_SHADER_CAP_TGSI_DROUND_SUPPORTED: case PIPE_SHADER_CAP_TGSI_DFRACEXP_DLDEXP_SUPPORTED: case PIPE_SHADER_CAP_TGSI_FMA_SUPPORTED: + case PIPE_SHADER_CAP_MAX_SHADER_BUFFERS: + case PIPE_SHADER_CAP_MAX_SHADER_IMAGES: return 0; case PIPE_SHADER_CAP_MAX_UNROLL_ITERATIONS_HINT: return 32; case PIPE_SHADER_CAP_PREFERRED_IR: return PIPE_SHADER_IR_TGSI; + case PIPE_SHADER_CAP_SUPPORTED_IRS: + return 0; } break; } @@ -502,7 +547,6 @@ static boolean r300_is_format_supported(struct pipe_screen* screen, unsigned usage) { uint32_t retval = 0; - boolean drm_2_8_0 = r300_screen(screen)->info.drm_minor >= 8; boolean is_r500 = r300_screen(screen)->caps.is_r500; boolean is_r400 = r300_screen(screen)->caps.is_r400; boolean is_color2101010 = format == PIPE_FORMAT_R10G10B10A2_UNORM || @@ -518,13 +562,6 @@ static boolean r300_is_format_supported(struct pipe_screen* screen, format == PIPE_FORMAT_RGTC2_SNORM || format == PIPE_FORMAT_LATC2_UNORM || format == PIPE_FORMAT_LATC2_SNORM; - boolean is_x16f_xy16f = format == PIPE_FORMAT_R16_FLOAT || - format == PIPE_FORMAT_R16G16_FLOAT || - format == PIPE_FORMAT_A16_FLOAT || - format == PIPE_FORMAT_L16_FLOAT || - format == PIPE_FORMAT_L16A16_FLOAT || - format == PIPE_FORMAT_R16A16_FLOAT || - format == PIPE_FORMAT_I16_FLOAT; boolean is_half_float = format == PIPE_FORMAT_R16_FLOAT || format == PIPE_FORMAT_R16G16_FLOAT || format == PIPE_FORMAT_R16G16B16_FLOAT || @@ -543,10 +580,6 @@ static boolean r300_is_format_supported(struct pipe_screen* screen, case 2: case 4: case 6: - /* We need DRM 2.8.0. */ - if (!drm_2_8_0) { - return FALSE; - } /* No texturing and scanout. */ if (usage & (PIPE_BIND_SAMPLER_VIEW | PIPE_BIND_DISPLAY_TARGET | @@ -586,8 +619,6 @@ static boolean r300_is_format_supported(struct pipe_screen* screen, (is_r500 || !is_ati1n) && /* ATI2N is supported on r4xx-r5xx. */ (is_r400 || is_r500 || !is_ati2n) && - /* R16F and RG16F texture support was added in as late as DRM 2.8.0 */ - (drm_2_8_0 || !is_x16f_xy16f) && r300_is_sampler_format_supported(format)) { retval |= PIPE_BIND_SAMPLER_VIEW; } @@ -599,7 +630,7 @@ static boolean r300_is_format_supported(struct pipe_screen* screen, PIPE_BIND_SHARED | PIPE_BIND_BLENDABLE)) && /* 2101010 cannot be rendered to on non-r5xx. */ - (!is_color2101010 || (is_r500 && drm_2_8_0)) && + (!is_color2101010 || is_r500) && r300_is_colorbuffer_format_supported(format)) { retval |= usage & (PIPE_BIND_RENDER_TARGET | @@ -634,12 +665,6 @@ static boolean r300_is_format_supported(struct pipe_screen* screen, } } - /* Transfers are always supported. */ - if (usage & PIPE_BIND_TRANSFER_READ) - retval |= PIPE_BIND_TRANSFER_READ; - if (usage & PIPE_BIND_TRANSFER_WRITE) - retval |= PIPE_BIND_TRANSFER_WRITE; - return retval == usage; } @@ -652,6 +677,7 @@ static void r300_destroy_screen(struct pipe_screen* pscreen) return; pipe_mutex_destroy(r300screen->cmask_mutex); + slab_destroy_parent(&r300screen->pool_transfers); if (rws) rws->destroy(rws); @@ -669,6 +695,7 @@ static void r300_fence_reference(struct pipe_screen *screen, } static boolean r300_fence_finish(struct pipe_screen *screen, + struct pipe_context *ctx, struct pipe_fence_handle *fence, uint64_t timeout) { @@ -696,9 +723,6 @@ struct pipe_screen* r300_screen_create(struct radeon_winsys *rws) if (SCREEN_DBG_ON(r300screen, DBG_NO_HIZ)) r300screen->caps.hiz_ram = 0; - if (r300screen->info.drm_minor < 8) - r300screen->caps.has_us_format = FALSE; - r300screen->rws = rws; r300screen->screen.destroy = r300_destroy_screen; r300screen->screen.get_name = r300_get_name; @@ -716,6 +740,8 @@ struct pipe_screen* r300_screen_create(struct radeon_winsys *rws) r300_init_screen_resource_functions(r300screen); + slab_create_parent(&r300screen->pool_transfers, sizeof(struct pipe_transfer), 64); + util_format_s3tc_init(); pipe_mutex_init(r300screen->cmask_mutex); diff --git a/lib/mesa/src/gallium/drivers/r300/r300_screen.h b/lib/mesa/src/gallium/drivers/r300/r300_screen.h index e15c3c7de..4b783af95 100644 --- a/lib/mesa/src/gallium/drivers/r300/r300_screen.h +++ b/lib/mesa/src/gallium/drivers/r300/r300_screen.h @@ -27,7 +27,7 @@ #include "r300_chipset.h" #include "radeon/radeon_winsys.h" #include "pipe/p_screen.h" -#include "util/u_slab.h" +#include "util/slab.h" #include "os/os_thread.h" #include <stdio.h> @@ -44,6 +44,8 @@ struct r300_screen { /** Combination of DBG_xxx flags */ unsigned debug; + struct slab_parent_pool pool_transfers; + /* The MSAA texture with CMASK access; */ struct pipe_resource *cmask_resource; pipe_mutex cmask_mutex; diff --git a/lib/mesa/src/gallium/drivers/r300/r300_state.c b/lib/mesa/src/gallium/drivers/r300/r300_state.c index d99d5ae01..196c0df88 100644 --- a/lib/mesa/src/gallium/drivers/r300/r300_state.c +++ b/lib/mesa/src/gallium/drivers/r300/r300_state.c @@ -834,45 +834,6 @@ static void r300_set_stencil_ref(struct pipe_context* pipe, r300_mark_atom_dirty(r300, &r300->dsa_state); } -static void r300_tex_set_tiling_flags(struct r300_context *r300, - struct r300_resource *tex, - unsigned level) -{ - /* Check if the macrotile flag needs to be changed. - * Skip changing the flags otherwise. */ - if (tex->tex.macrotile[tex->surface_level] != - tex->tex.macrotile[level]) { - r300->rws->buffer_set_tiling(tex->buf, r300->cs, - tex->tex.microtile, tex->tex.macrotile[level], - 0, 0, 0, 0, 0, 0, 0, - tex->tex.stride_in_bytes[0], false); - - tex->surface_level = level; - } -} - -/* This switcheroo is needed just because of goddamned MACRO_SWITCH. */ -static void r300_fb_set_tiling_flags(struct r300_context *r300, - const struct pipe_framebuffer_state *state) -{ - unsigned i; - - /* Set tiling flags for new surfaces. */ - for (i = 0; i < state->nr_cbufs; i++) { - if (!state->cbufs[i]) - continue; - - r300_tex_set_tiling_flags(r300, - r300_resource(state->cbufs[i]->texture), - state->cbufs[i]->u.tex.level); - } - if (state->zsbuf) { - r300_tex_set_tiling_flags(r300, - r300_resource(state->zsbuf->texture), - state->zsbuf->u.tex.level); - } -} - static void r300_print_fb_surf_info(struct pipe_surface *surf, unsigned index, const char *binding) { @@ -1017,13 +978,6 @@ r300_set_framebuffer_state(struct pipe_context* pipe, /* Re-swizzle the blend color. */ r300_set_blend_color(pipe, &((struct r300_blend_color_state*)r300->blend_color_state.state)->state); - if (r300->screen->info.drm_minor < 12) { - /* The tiling flags are dependent on the surface miplevel, unfortunately. - * This workarounds a bad design decision in old kernels which were - * rewriting tile fields in registers. */ - r300_fb_set_tiling_flags(r300, state); - } - if (unlock_zbuffer) { pipe_surface_reference(&r300->locked_zbuffer, NULL); } @@ -1125,7 +1079,7 @@ static void r300_bind_fs_state(struct pipe_context* pipe, void* shader) struct r300_context* r300 = r300_context(pipe); struct r300_fragment_shader* fs = (struct r300_fragment_shader*)shader; - if (fs == NULL) { + if (!fs) { r300->fs.state = NULL; return; } @@ -1515,7 +1469,7 @@ static void* } static void r300_bind_sampler_states(struct pipe_context* pipe, - unsigned shader, + enum pipe_shader_type shader, unsigned start, unsigned count, void** states) { @@ -1568,7 +1522,8 @@ static uint32_t r300_assign_texture_cache_region(unsigned index, unsigned num) return R300_TX_CACHE(num + index); } -static void r300_set_sampler_views(struct pipe_context* pipe, unsigned shader, +static void r300_set_sampler_views(struct pipe_context* pipe, + enum pipe_shader_type shader, unsigned start, unsigned count, struct pipe_sampler_view** views) { @@ -1950,7 +1905,7 @@ static void r300_bind_vertex_elements_state(struct pipe_context *pipe, struct r300_context *r300 = r300_context(pipe); struct r300_vertex_element_state *velems = state; - if (velems == NULL) { + if (!velems) { return; } @@ -1996,7 +1951,7 @@ static void r300_bind_vs_state(struct pipe_context* pipe, void* shader) struct r300_context* r300 = r300_context(pipe); struct r300_vertex_shader* vs = (struct r300_vertex_shader*)shader; - if (vs == NULL) { + if (!vs) { r300->vs_state.state = NULL; return; } @@ -2049,7 +2004,7 @@ static void r300_delete_vs_state(struct pipe_context* pipe, void* shader) static void r300_set_constant_buffer(struct pipe_context *pipe, uint shader, uint index, - struct pipe_constant_buffer *cb) + const struct pipe_constant_buffer *cb) { struct r300_context* r300 = r300_context(pipe); struct r300_constant_buffer *cbuf; diff --git a/lib/mesa/src/gallium/drivers/r300/r300_texture.c b/lib/mesa/src/gallium/drivers/r300/r300_texture.c index 5e4d50df2..929c3fe6c 100644 --- a/lib/mesa/src/gallium/drivers/r300/r300_texture.c +++ b/lib/mesa/src/gallium/drivers/r300/r300_texture.c @@ -38,6 +38,68 @@ #include "pipe/p_screen.h" +/* These formats are supported by swapping their bytes. + * The swizzles must be set exactly like their non-swapped counterparts, + * because byte-swapping is what reverses the component order, not swizzling. + * + * This function returns the format that must be used to program CB and TX + * swizzles. + */ +static enum pipe_format r300_unbyteswap_array_format(enum pipe_format format) +{ + /* FIXME: Disabled on little endian because of a reported regression: + * https://bugs.freedesktop.org/show_bug.cgi?id=98869 */ + if (PIPE_ENDIAN_NATIVE != PIPE_ENDIAN_BIG) + return format; + + /* Only BGRA 8888 array formats are supported for simplicity of + * the implementation. */ + switch (format) { + case PIPE_FORMAT_A8R8G8B8_UNORM: + return PIPE_FORMAT_B8G8R8A8_UNORM; + case PIPE_FORMAT_A8R8G8B8_SRGB: + return PIPE_FORMAT_B8G8R8A8_SRGB; + case PIPE_FORMAT_X8R8G8B8_UNORM: + return PIPE_FORMAT_B8G8R8X8_UNORM; + case PIPE_FORMAT_X8R8G8B8_SRGB: + return PIPE_FORMAT_B8G8R8X8_SRGB; + default: + return format; + } +} + +static unsigned r300_get_endian_swap(enum pipe_format format) +{ + const struct util_format_description *desc; + unsigned swap_size; + + if (r300_unbyteswap_array_format(format) != format) + return R300_SURF_DWORD_SWAP; + + if (PIPE_ENDIAN_NATIVE != PIPE_ENDIAN_BIG) + return R300_SURF_NO_SWAP; + + desc = util_format_description(format); + if (!desc) + return R300_SURF_NO_SWAP; + + /* Compressed formats should be in the little endian format. */ + if (desc->block.width != 1 || desc->block.height != 1) + return R300_SURF_NO_SWAP; + + swap_size = desc->is_array ? desc->channel[0].size : desc->block.bits; + + switch (swap_size) { + default: /* shouldn't happen? */ + case 8: + return R300_SURF_NO_SWAP; + case 16: + return R300_SURF_WORD_SWAP; + case 32: + return R300_SURF_DWORD_SWAP; + } +} + unsigned r300_get_swizzle_combined(const unsigned char *swizzle_format, const unsigned char *swizzle_view, boolean dxtc_swizzle) @@ -68,22 +130,22 @@ unsigned r300_get_swizzle_combined(const unsigned char *swizzle_format, /* Get swizzle. */ for (i = 0; i < 4; i++) { switch (swizzle[i]) { - case UTIL_FORMAT_SWIZZLE_Y: + case PIPE_SWIZZLE_Y: result |= swizzle_bit[1] << swizzle_shift[i]; break; - case UTIL_FORMAT_SWIZZLE_Z: + case PIPE_SWIZZLE_Z: result |= swizzle_bit[2] << swizzle_shift[i]; break; - case UTIL_FORMAT_SWIZZLE_W: + case PIPE_SWIZZLE_W: result |= swizzle_bit[3] << swizzle_shift[i]; break; - case UTIL_FORMAT_SWIZZLE_0: + case PIPE_SWIZZLE_0: result |= R300_TX_FORMAT_ZERO << swizzle_shift[i]; break; - case UTIL_FORMAT_SWIZZLE_1: + case PIPE_SWIZZLE_1: result |= R300_TX_FORMAT_ONE << swizzle_shift[i]; break; - default: /* UTIL_FORMAT_SWIZZLE_X */ + default: /* PIPE_SWIZZLE_X */ result |= swizzle_bit[0] << swizzle_shift[i]; } } @@ -118,6 +180,7 @@ uint32_t r300_translate_texformat(enum pipe_format format, R300_TX_FORMAT_SIGNED_X, }; + format = r300_unbyteswap_array_format(format); desc = util_format_description(format); /* Colorspace (return non-RGB formats directly). */ @@ -400,6 +463,8 @@ uint32_t r500_tx_format_msb_bit(enum pipe_format format) * output. For the swizzling of the targets, check the shader's format. */ static uint32_t r300_translate_colorformat(enum pipe_format format) { + format = r300_unbyteswap_array_format(format); + switch (format) { /* 8-bit buffers. */ case PIPE_FORMAT_A8_UNORM: @@ -534,6 +599,7 @@ static uint32_t r300_translate_out_fmt(enum pipe_format format) const struct util_format_description *desc; boolean uniform_sign; + format = r300_unbyteswap_array_format(format); desc = util_format_description(format); /* Find the first non-VOID channel. */ @@ -730,6 +796,8 @@ static uint32_t r300_translate_out_fmt(enum pipe_format format) static uint32_t r300_translate_colormask_swizzle(enum pipe_format format) { + format = r300_unbyteswap_array_format(format); + switch (format) { case PIPE_FORMAT_A8_UNORM: case PIPE_FORMAT_A8_SNORM: @@ -918,7 +986,8 @@ void r300_texture_setup_format_state(struct r300_screen *screen, } out->tile_config = R300_TXO_MACRO_TILE(desc->macrotile[level]) | - R300_TXO_MICRO_TILE(desc->microtile); + R300_TXO_MICRO_TILE(desc->microtile) | + R300_TXO_ENDIAN(r300_get_endian_swap(format)); } static void r300_texture_setup_fb_state(struct r300_surface *surf) @@ -933,7 +1002,8 @@ static void r300_texture_setup_fb_state(struct r300_surface *surf) surf->pitch = stride | R300_DEPTHMACROTILE(tex->tex.macrotile[level]) | - R300_DEPTHMICROTILE(tex->tex.microtile); + R300_DEPTHMICROTILE(tex->tex.microtile) | + R300_DEPTHENDIAN(r300_get_endian_swap(surf->base.format)); surf->format = r300_translate_zsformat(surf->base.format); surf->pitch_zmask = tex->tex.zmask_stride_in_pixels[level]; surf->pitch_hiz = tex->tex.hiz_stride_in_pixels[level]; @@ -944,7 +1014,8 @@ static void r300_texture_setup_fb_state(struct r300_surface *surf) stride | r300_translate_colorformat(format) | R300_COLOR_TILE(tex->tex.macrotile[level]) | - R300_COLOR_MICROTILE(tex->tex.microtile); + R300_COLOR_MICROTILE(tex->tex.microtile) | + R300_COLOR_ENDIAN(r300_get_endian_swap(format)); surf->format = r300_translate_out_fmt(format); surf->colormask_swizzle = r300_translate_colormask_swizzle(format); @@ -970,8 +1041,10 @@ static void r300_texture_destroy(struct pipe_screen *screen, } boolean r300_resource_get_handle(struct pipe_screen* screen, + struct pipe_context *ctx, struct pipe_resource *texture, - struct winsys_handle *whandle) + struct winsys_handle *whandle, + unsigned usage) { struct radeon_winsys *rws = r300_screen(screen)->rws; struct r300_resource* tex = (struct r300_resource*)texture; @@ -980,8 +1053,8 @@ boolean r300_resource_get_handle(struct pipe_screen* screen, return FALSE; } - return rws->buffer_get_handle(tex->buf, - tex->tex.stride_in_bytes[0], whandle); + return rws->buffer_get_handle(tex->buf, tex->tex.stride_in_bytes[0], + 0, 0, whandle); } static const struct u_resource_vtbl r300_texture_vtbl = @@ -991,7 +1064,6 @@ static const struct u_resource_vtbl r300_texture_vtbl = r300_texture_transfer_map, /* transfer_map */ NULL, /* transfer_flush_region */ r300_texture_transfer_unmap, /* transfer_unmap */ - NULL /* transfer_inline_write */ }; /* The common texture constructor. */ @@ -1005,6 +1077,7 @@ r300_texture_create_object(struct r300_screen *rscreen, { struct radeon_winsys *rws = rscreen->rws; struct r300_resource *tex = NULL; + struct radeon_bo_metadata tiling = {}; tex = CALLOC_STRUCT(r300_resource); if (!tex) { @@ -1045,8 +1118,8 @@ r300_texture_create_object(struct r300_screen *rscreen, /* Create the backing buffer if needed. */ if (!tex->buf) { - tex->buf = rws->buffer_create(rws, tex->tex.size_in_bytes, 2048, TRUE, - tex->domain, 0); + tex->buf = rws->buffer_create(rws, tex->tex.size_in_bytes, 2048, + tex->domain, RADEON_FLAG_HANDLE); if (!tex->buf) { goto fail; @@ -1059,12 +1132,10 @@ r300_texture_create_object(struct r300_screen *rscreen, util_format_is_depth_or_stencil(base->format) ? "depth" : "color"); } - tex->cs_buf = rws->buffer_get_cs_handle(tex->buf); - - rws->buffer_set_tiling(tex->buf, NULL, - tex->tex.microtile, tex->tex.macrotile[0], - 0, 0, 0, 0, 0, 0, 0, - tex->tex.stride_in_bytes[0], false); + tiling.microtile = tex->tex.microtile; + tiling.macrotile = tex->tex.macrotile[0]; + tiling.stride = tex->tex.stride_in_bytes[0]; + rws->buffer_set_metadata(tex->buf, &tiling); return tex; @@ -1099,13 +1170,14 @@ struct pipe_resource *r300_texture_create(struct pipe_screen *screen, struct pipe_resource *r300_texture_from_handle(struct pipe_screen *screen, const struct pipe_resource *base, - struct winsys_handle *whandle) + struct winsys_handle *whandle, + unsigned usage) { struct r300_screen *rscreen = r300_screen(screen); struct radeon_winsys *rws = rscreen->rws; struct pb_buffer *buffer; - enum radeon_bo_layout microtile, macrotile; unsigned stride; + struct radeon_bo_metadata tiling = {}; /* Support only 2D textures without mipmaps */ if ((base->target != PIPE_TEXTURE_2D && @@ -1115,29 +1187,28 @@ struct pipe_resource *r300_texture_from_handle(struct pipe_screen *screen, return NULL; } - buffer = rws->buffer_from_handle(rws, whandle, &stride); + buffer = rws->buffer_from_handle(rws, whandle, &stride, NULL); if (!buffer) return NULL; - rws->buffer_get_tiling(buffer, µtile, ¯otile, NULL, NULL, NULL, - NULL, NULL, NULL); + rws->buffer_get_metadata(buffer, &tiling); /* Enforce a microtiled zbuffer. */ if (util_format_is_depth_or_stencil(base->format) && - microtile == RADEON_LAYOUT_LINEAR) { + tiling.microtile == RADEON_LAYOUT_LINEAR) { switch (util_format_get_blocksize(base->format)) { case 4: - microtile = RADEON_LAYOUT_TILED; + tiling.microtile = RADEON_LAYOUT_TILED; break; case 2: - microtile = RADEON_LAYOUT_SQUARETILED; + tiling.microtile = RADEON_LAYOUT_SQUARETILED; break; } } return (struct pipe_resource*) - r300_texture_create_object(rscreen, base, microtile, macrotile, + r300_texture_create_object(rscreen, base, tiling.microtile, tiling.macrotile, stride, buffer); } @@ -1169,7 +1240,7 @@ struct pipe_surface* r300_create_surface_custom(struct pipe_context * ctx, surface->base.u.tex.last_layer = surf_tmpl->u.tex.last_layer; surface->buf = tex->buf; - surface->cs_buf = tex->cs_buf; + surface->buf = tex->buf; /* Prefer VRAM if there are multiple domains to choose from. */ surface->domain = tex->domain; |