diff options
Diffstat (limited to 'lib/mesa/src/gallium/winsys/svga')
13 files changed, 292 insertions, 311 deletions
diff --git a/lib/mesa/src/gallium/winsys/svga/drm/Makefile.in b/lib/mesa/src/gallium/winsys/svga/drm/Makefile.in index 99c5bc009..4bccda3e7 100644 --- a/lib/mesa/src/gallium/winsys/svga/drm/Makefile.in +++ b/lib/mesa/src/gallium/winsys/svga/drm/Makefile.in @@ -76,13 +76,10 @@ target_triplet = @target@ DIST_COMMON = $(srcdir)/Makefile.am $(srcdir)/Makefile.in \ $(srcdir)/Makefile.sources $(top_srcdir)/bin/depcomp \ $(top_srcdir)/src/gallium/Automake.inc -@HAVE_LIBDRM_TRUE@am__append_1 = \ -@HAVE_LIBDRM_TRUE@ $(LIBDRM_LIBS) - -@HAVE_DRISW_TRUE@am__append_2 = \ +@HAVE_DRISW_TRUE@am__append_1 = \ @HAVE_DRISW_TRUE@ $(top_builddir)/src/gallium/winsys/sw/dri/libswdri.la -@HAVE_DRISW_KMS_TRUE@am__append_3 = \ +@HAVE_DRISW_KMS_TRUE@am__append_2 = \ @HAVE_DRISW_KMS_TRUE@ $(top_builddir)/src/gallium/winsys/sw/kms-dri/libswkmsdri.la \ @HAVE_DRISW_KMS_TRUE@ $(LIBDRM_LIBS) @@ -164,8 +161,6 @@ AMDGPU_CFLAGS = @AMDGPU_CFLAGS@ AMDGPU_LIBS = @AMDGPU_LIBS@ AMTAR = @AMTAR@ AM_DEFAULT_VERBOSITY = @AM_DEFAULT_VERBOSITY@ -ANDROID_CFLAGS = @ANDROID_CFLAGS@ -ANDROID_LIBS = @ANDROID_LIBS@ AR = @AR@ AUTOCONF = @AUTOCONF@ AUTOHEADER = @AUTOHEADER@ @@ -198,6 +193,8 @@ DLLTOOL = @DLLTOOL@ DLOPEN_LIBS = @DLOPEN_LIBS@ DRI2PROTO_CFLAGS = @DRI2PROTO_CFLAGS@ DRI2PROTO_LIBS = @DRI2PROTO_LIBS@ +DRI3PROTO_CFLAGS = @DRI3PROTO_CFLAGS@ +DRI3PROTO_LIBS = @DRI3PROTO_LIBS@ DRIGL_CFLAGS = @DRIGL_CFLAGS@ DRIGL_LIBS = @DRIGL_LIBS@ DRI_DRIVER_INSTALL_DIR = @DRI_DRIVER_INSTALL_DIR@ @@ -210,11 +207,10 @@ ECHO_C = @ECHO_C@ ECHO_N = @ECHO_N@ ECHO_T = @ECHO_T@ EGL_CFLAGS = @EGL_CFLAGS@ +EGL_CLIENT_APIS = @EGL_CLIENT_APIS@ EGL_LIB_DEPS = @EGL_LIB_DEPS@ EGL_NATIVE_PLATFORM = @EGL_NATIVE_PLATFORM@ EGREP = @EGREP@ -ETNAVIV_CFLAGS = @ETNAVIV_CFLAGS@ -ETNAVIV_LIBS = @ETNAVIV_LIBS@ EXEEXT = @EXEEXT@ EXPAT_CFLAGS = @EXPAT_CFLAGS@ EXPAT_LIBS = @EXPAT_LIBS@ @@ -241,8 +237,6 @@ GL_PC_LIB_PRIV = @GL_PC_LIB_PRIV@ GL_PC_REQ_PRIV = @GL_PC_REQ_PRIV@ GREP = @GREP@ HAVE_XF86VIDMODE = @HAVE_XF86VIDMODE@ -I915_CFLAGS = @I915_CFLAGS@ -I915_LIBS = @I915_LIBS@ INDENT = @INDENT@ INDENT_FLAGS = @INDENT_FLAGS@ INSTALL = @INSTALL@ @@ -250,40 +244,45 @@ INSTALL_DATA = @INSTALL_DATA@ INSTALL_PROGRAM = @INSTALL_PROGRAM@ INSTALL_SCRIPT = @INSTALL_SCRIPT@ INSTALL_STRIP_PROGRAM = @INSTALL_STRIP_PROGRAM@ +INTEL_CFLAGS = @INTEL_CFLAGS@ +INTEL_LIBS = @INTEL_LIBS@ LD = @LD@ LDFLAGS = @LDFLAGS@ LD_NO_UNDEFINED = @LD_NO_UNDEFINED@ LEX = @LEX@ LEXLIB = @LEXLIB@ LEX_OUTPUT_ROOT = @LEX_OUTPUT_ROOT@ -LIBATOMIC_LIBS = @LIBATOMIC_LIBS@ LIBCLC_INCLUDEDIR = @LIBCLC_INCLUDEDIR@ LIBCLC_LIBEXECDIR = @LIBCLC_LIBEXECDIR@ LIBDRM_CFLAGS = @LIBDRM_CFLAGS@ LIBDRM_LIBS = @LIBDRM_LIBS@ LIBELF_CFLAGS = @LIBELF_CFLAGS@ LIBELF_LIBS = @LIBELF_LIBS@ -LIBGLVND_DATADIR = @LIBGLVND_DATADIR@ LIBOBJS = @LIBOBJS@ LIBS = @LIBS@ -LIBSENSORS_LIBS = @LIBSENSORS_LIBS@ +LIBSENSORS_LDFLAGS = @LIBSENSORS_LDFLAGS@ +LIBSHA1_CFLAGS = @LIBSHA1_CFLAGS@ +LIBSHA1_LIBS = @LIBSHA1_LIBS@ LIBTOOL = @LIBTOOL@ -LIBUNWIND_CFLAGS = @LIBUNWIND_CFLAGS@ -LIBUNWIND_LIBS = @LIBUNWIND_LIBS@ LIB_DIR = @LIB_DIR@ LIB_EXT = @LIB_EXT@ LIPO = @LIPO@ +LLVM_BINDIR = @LLVM_BINDIR@ LLVM_CFLAGS = @LLVM_CFLAGS@ LLVM_CONFIG = @LLVM_CONFIG@ +LLVM_CPPFLAGS = @LLVM_CPPFLAGS@ LLVM_CXXFLAGS = @LLVM_CXXFLAGS@ LLVM_INCLUDEDIR = @LLVM_INCLUDEDIR@ LLVM_LDFLAGS = @LLVM_LDFLAGS@ +LLVM_LIBDIR = @LLVM_LIBDIR@ LLVM_LIBS = @LLVM_LIBS@ +LLVM_VERSION = @LLVM_VERSION@ LN_S = @LN_S@ LTLIBOBJS = @LTLIBOBJS@ MAINT = @MAINT@ MAKEINFO = @MAKEINFO@ MANIFEST_TOOL = @MANIFEST_TOOL@ +MESA_LLVM = @MESA_LLVM@ MKDIR_P = @MKDIR_P@ MSVC2013_COMPAT_CFLAGS = @MSVC2013_COMPAT_CFLAGS@ MSVC2013_COMPAT_CXXFLAGS = @MSVC2013_COMPAT_CXXFLAGS@ @@ -304,6 +303,8 @@ OMX_LIBS = @OMX_LIBS@ OMX_LIB_INSTALL_DIR = @OMX_LIB_INSTALL_DIR@ OPENCL_LIBNAME = @OPENCL_LIBNAME@ OPENCL_VERSION = @OPENCL_VERSION@ +OPENSSL_CFLAGS = @OPENSSL_CFLAGS@ +OPENSSL_LIBS = @OPENSSL_LIBS@ OSMESA_LIB = @OSMESA_LIB@ OSMESA_LIB_DEPS = @OSMESA_LIB_DEPS@ OSMESA_PC_LIB_PRIV = @OSMESA_PC_LIB_PRIV@ @@ -323,6 +324,8 @@ PKG_CONFIG = @PKG_CONFIG@ PKG_CONFIG_LIBDIR = @PKG_CONFIG_LIBDIR@ PKG_CONFIG_PATH = @PKG_CONFIG_PATH@ POSIX_SHELL = @POSIX_SHELL@ +PRESENTPROTO_CFLAGS = @PRESENTPROTO_CFLAGS@ +PRESENTPROTO_LIBS = @PRESENTPROTO_LIBS@ PTHREADSTUBS_CFLAGS = @PTHREADSTUBS_CFLAGS@ PTHREADSTUBS_LIBS = @PTHREADSTUBS_LIBS@ PTHREAD_CC = @PTHREAD_CC@ @@ -338,6 +341,8 @@ SED = @SED@ SELINUX_CFLAGS = @SELINUX_CFLAGS@ SELINUX_LIBS = @SELINUX_LIBS@ SET_MAKE = @SET_MAKE@ +SHA1_CFLAGS = @SHA1_CFLAGS@ +SHA1_LIBS = @SHA1_LIBS@ SHELL = @SHELL@ SIMPENROSE_CFLAGS = @SIMPENROSE_CFLAGS@ SIMPENROSE_LIBS = @SIMPENROSE_LIBS@ @@ -346,8 +351,7 @@ STRIP = @STRIP@ SWR_AVX2_CXXFLAGS = @SWR_AVX2_CXXFLAGS@ SWR_AVX_CXXFLAGS = @SWR_AVX_CXXFLAGS@ SWR_CXX11_CXXFLAGS = @SWR_CXX11_CXXFLAGS@ -SWR_KNL_CXXFLAGS = @SWR_KNL_CXXFLAGS@ -SWR_SKX_CXXFLAGS = @SWR_SKX_CXXFLAGS@ +TIMESTAMP_CMD = @TIMESTAMP_CMD@ VALGRIND_CFLAGS = @VALGRIND_CFLAGS@ VALGRIND_LIBS = @VALGRIND_LIBS@ VA_CFLAGS = @VA_CFLAGS@ @@ -355,12 +359,15 @@ VA_LIBS = @VA_LIBS@ VA_LIB_INSTALL_DIR = @VA_LIB_INSTALL_DIR@ VA_MAJOR = @VA_MAJOR@ VA_MINOR = @VA_MINOR@ +VC4_CFLAGS = @VC4_CFLAGS@ +VC4_LIBS = @VC4_LIBS@ VDPAU_CFLAGS = @VDPAU_CFLAGS@ VDPAU_LIBS = @VDPAU_LIBS@ VDPAU_LIB_INSTALL_DIR = @VDPAU_LIB_INSTALL_DIR@ VDPAU_MAJOR = @VDPAU_MAJOR@ VDPAU_MINOR = @VDPAU_MINOR@ VERSION = @VERSION@ +VG_LIB_DEPS = @VG_LIB_DEPS@ VISIBILITY_CFLAGS = @VISIBILITY_CFLAGS@ VISIBILITY_CXXFLAGS = @VISIBILITY_CXXFLAGS@ VL_CFLAGS = @VL_CFLAGS@ @@ -368,7 +375,6 @@ VL_LIBS = @VL_LIBS@ VULKAN_ICD_INSTALL_DIR = @VULKAN_ICD_INSTALL_DIR@ WAYLAND_CFLAGS = @WAYLAND_CFLAGS@ WAYLAND_LIBS = @WAYLAND_LIBS@ -WAYLAND_PROTOCOLS_DATADIR = @WAYLAND_PROTOCOLS_DATADIR@ WAYLAND_SCANNER = @WAYLAND_SCANNER@ WAYLAND_SCANNER_CFLAGS = @WAYLAND_SCANNER_CFLAGS@ WAYLAND_SCANNER_LIBS = @WAYLAND_SCANNER_LIBS@ @@ -390,10 +396,9 @@ XVMC_LIBS = @XVMC_LIBS@ XVMC_LIB_INSTALL_DIR = @XVMC_LIB_INSTALL_DIR@ XVMC_MAJOR = @XVMC_MAJOR@ XVMC_MINOR = @XVMC_MINOR@ +XXD = @XXD@ YACC = @YACC@ YFLAGS = @YFLAGS@ -ZLIB_CFLAGS = @ZLIB_CFLAGS@ -ZLIB_LIBS = @ZLIB_LIBS@ abs_builddir = @abs_builddir@ abs_srcdir = @abs_srcdir@ abs_top_builddir = @abs_top_builddir@ @@ -524,8 +529,12 @@ GALLIUM_TARGET_CFLAGS = \ $(LIBDRM_CFLAGS) \ $(VISIBILITY_CFLAGS) -GALLIUM_COMMON_LIB_DEPS = -lm $(LIBUNWIND_LIBS) $(LIBSENSORS_LIBS) \ - $(CLOCK_LIB) $(PTHREAD_LIBS) $(DLOPEN_LIBS) $(am__append_1) +GALLIUM_COMMON_LIB_DEPS = \ + -lm \ + $(CLOCK_LIB) \ + $(PTHREAD_LIBS) \ + $(DLOPEN_LIBS) + GALLIUM_WINSYS_CFLAGS = \ -I$(top_srcdir)/src \ -I$(top_srcdir)/include \ @@ -537,7 +546,7 @@ GALLIUM_WINSYS_CFLAGS = \ GALLIUM_PIPE_LOADER_WINSYS_LIBS = \ $(top_builddir)/src/gallium/winsys/sw/null/libws_null.la \ $(top_builddir)/src/gallium/winsys/sw/wrapper/libwsw.la \ - $(am__append_2) $(am__append_3) + $(am__append_1) $(am__append_2) AM_CFLAGS = \ -I$(top_srcdir)/src/gallium/drivers/svga \ -I$(top_srcdir)/src/gallium/drivers/svga/include \ diff --git a/lib/mesa/src/gallium/winsys/svga/drm/pb_buffer_simple_fenced.c b/lib/mesa/src/gallium/winsys/svga/drm/pb_buffer_simple_fenced.c index f7211c29a..d049d1dbc 100644 --- a/lib/mesa/src/gallium/winsys/svga/drm/pb_buffer_simple_fenced.c +++ b/lib/mesa/src/gallium/winsys/svga/drm/pb_buffer_simple_fenced.c @@ -70,7 +70,7 @@ struct fenced_manager /** * Following members are mutable and protected by this mutex. */ - mtx_t mutex; + pipe_mutex mutex; /** * Fenced buffer list. @@ -311,11 +311,11 @@ fenced_buffer_finish_locked(struct fenced_manager *fenced_mgr, ops->fence_reference(ops, &fence, fenced_buf->fence); - mtx_unlock(&fenced_mgr->mutex); + pipe_mutex_unlock(fenced_mgr->mutex); finished = ops->fence_finish(ops, fenced_buf->fence, 0); - mtx_lock(&fenced_mgr->mutex); + pipe_mutex_lock(fenced_mgr->mutex); assert(pipe_is_referenced(&fenced_buf->base.reference)); @@ -508,11 +508,11 @@ fenced_buffer_destroy(struct pb_buffer *buf) assert(!pipe_is_referenced(&fenced_buf->base.reference)); - mtx_lock(&fenced_mgr->mutex); + pipe_mutex_lock(fenced_mgr->mutex); fenced_buffer_destroy_locked(fenced_mgr, fenced_buf); - mtx_unlock(&fenced_mgr->mutex); + pipe_mutex_unlock(fenced_mgr->mutex); } @@ -525,7 +525,7 @@ fenced_buffer_map(struct pb_buffer *buf, struct pb_fence_ops *ops = fenced_mgr->ops; void *map = NULL; - mtx_lock(&fenced_mgr->mutex); + pipe_mutex_lock(fenced_mgr->mutex); assert(!(flags & PB_USAGE_GPU_READ_WRITE)); @@ -564,7 +564,7 @@ fenced_buffer_map(struct pb_buffer *buf, } done: - mtx_unlock(&fenced_mgr->mutex); + pipe_mutex_unlock(fenced_mgr->mutex); return map; } @@ -576,7 +576,7 @@ fenced_buffer_unmap(struct pb_buffer *buf) struct fenced_buffer *fenced_buf = fenced_buffer(buf); struct fenced_manager *fenced_mgr = fenced_buf->mgr; - mtx_lock(&fenced_mgr->mutex); + pipe_mutex_lock(fenced_mgr->mutex); assert(fenced_buf->mapcount); if(fenced_buf->mapcount) { @@ -587,7 +587,7 @@ fenced_buffer_unmap(struct pb_buffer *buf) fenced_buf->flags &= ~PB_USAGE_CPU_READ_WRITE; } - mtx_unlock(&fenced_mgr->mutex); + pipe_mutex_unlock(fenced_mgr->mutex); } @@ -600,7 +600,7 @@ fenced_buffer_validate(struct pb_buffer *buf, struct fenced_manager *fenced_mgr = fenced_buf->mgr; enum pipe_error ret; - mtx_lock(&fenced_mgr->mutex); + pipe_mutex_lock(fenced_mgr->mutex); if(!vl) { /* invalidate */ @@ -635,7 +635,7 @@ fenced_buffer_validate(struct pb_buffer *buf, fenced_buf->validation_flags |= flags; done: - mtx_unlock(&fenced_mgr->mutex); + pipe_mutex_unlock(fenced_mgr->mutex); return ret; } @@ -649,7 +649,7 @@ fenced_buffer_fence(struct pb_buffer *buf, struct fenced_manager *fenced_mgr = fenced_buf->mgr; struct pb_fence_ops *ops = fenced_mgr->ops; - mtx_lock(&fenced_mgr->mutex); + pipe_mutex_lock(fenced_mgr->mutex); assert(pipe_is_referenced(&fenced_buf->base.reference)); assert(fenced_buf->buffer); @@ -676,7 +676,7 @@ fenced_buffer_fence(struct pb_buffer *buf, fenced_buf->validation_flags = 0; } - mtx_unlock(&fenced_mgr->mutex); + pipe_mutex_unlock(fenced_mgr->mutex); } @@ -688,7 +688,7 @@ fenced_buffer_get_base_buffer(struct pb_buffer *buf, struct fenced_buffer *fenced_buf = fenced_buffer(buf); struct fenced_manager *fenced_mgr = fenced_buf->mgr; - mtx_lock(&fenced_mgr->mutex); + pipe_mutex_lock(fenced_mgr->mutex); assert(fenced_buf->buffer); @@ -699,7 +699,7 @@ fenced_buffer_get_base_buffer(struct pb_buffer *buf, *offset = 0; } - mtx_unlock(&fenced_mgr->mutex); + pipe_mutex_unlock(fenced_mgr->mutex); } @@ -739,7 +739,7 @@ fenced_bufmgr_create_buffer(struct pb_manager *mgr, fenced_buf->base.vtbl = &fenced_buffer_vtbl; fenced_buf->mgr = fenced_mgr; - mtx_lock(&fenced_mgr->mutex); + pipe_mutex_lock(fenced_mgr->mutex); /* * Try to create GPU storage without stalling, @@ -758,12 +758,12 @@ fenced_bufmgr_create_buffer(struct pb_manager *mgr, LIST_ADDTAIL(&fenced_buf->head, &fenced_mgr->unfenced); ++fenced_mgr->num_unfenced; - mtx_unlock(&fenced_mgr->mutex); + pipe_mutex_unlock(fenced_mgr->mutex); return &fenced_buf->base; no_storage: - mtx_unlock(&fenced_mgr->mutex); + pipe_mutex_unlock(fenced_mgr->mutex); FREE(fenced_buf); no_buffer: return NULL; @@ -775,10 +775,10 @@ fenced_bufmgr_flush(struct pb_manager *mgr) { struct fenced_manager *fenced_mgr = fenced_manager(mgr); - mtx_lock(&fenced_mgr->mutex); + pipe_mutex_lock(fenced_mgr->mutex); while(fenced_manager_check_signalled_locked(fenced_mgr, TRUE)) ; - mtx_unlock(&fenced_mgr->mutex); + pipe_mutex_unlock(fenced_mgr->mutex); assert(fenced_mgr->provider->flush); if(fenced_mgr->provider->flush) @@ -791,15 +791,15 @@ fenced_bufmgr_destroy(struct pb_manager *mgr) { struct fenced_manager *fenced_mgr = fenced_manager(mgr); - mtx_lock(&fenced_mgr->mutex); + pipe_mutex_lock(fenced_mgr->mutex); /* Wait on outstanding fences */ while (fenced_mgr->num_fenced) { - mtx_unlock(&fenced_mgr->mutex); + pipe_mutex_unlock(fenced_mgr->mutex); #if defined(PIPE_OS_LINUX) || defined(PIPE_OS_BSD) || defined(PIPE_OS_SOLARIS) sched_yield(); #endif - mtx_lock(&fenced_mgr->mutex); + pipe_mutex_lock(fenced_mgr->mutex); while(fenced_manager_check_signalled_locked(fenced_mgr, TRUE)) ; } @@ -808,8 +808,8 @@ fenced_bufmgr_destroy(struct pb_manager *mgr) /*assert(!fenced_mgr->num_unfenced);*/ #endif - mtx_unlock(&fenced_mgr->mutex); - mtx_destroy(&fenced_mgr->mutex); + pipe_mutex_unlock(fenced_mgr->mutex); + pipe_mutex_destroy(fenced_mgr->mutex); FREE(fenced_mgr); } @@ -841,7 +841,7 @@ simple_fenced_bufmgr_create(struct pb_manager *provider, LIST_INITHEAD(&fenced_mgr->unfenced); fenced_mgr->num_unfenced = 0; - (void) mtx_init(&fenced_mgr->mutex, mtx_plain); + pipe_mutex_init(fenced_mgr->mutex); return &fenced_mgr->base; } diff --git a/lib/mesa/src/gallium/winsys/svga/drm/vmw_context.c b/lib/mesa/src/gallium/winsys/svga/drm/vmw_context.c index c0ee833e3..8d23bff5d 100644 --- a/lib/mesa/src/gallium/winsys/svga/drm/vmw_context.c +++ b/lib/mesa/src/gallium/winsys/svga/drm/vmw_context.c @@ -179,36 +179,11 @@ vmw_swc_flush(struct svga_winsys_context *swc, struct pipe_fence_handle **pfence) { struct vmw_svga_winsys_context *vswc = vmw_svga_winsys_context(swc); - struct vmw_winsys_screen *vws = vswc->vws; struct pipe_fence_handle *fence = NULL; unsigned i; enum pipe_error ret; - /* - * If we hit a retry, lock the mutex and retry immediately. - * If we then still hit a retry, sleep until another thread - * wakes us up after it has released its buffers from the - * validate list. - * - * If we hit another error condition, we still need to broadcast since - * pb_validate_validate releases validated buffers in its error path. - */ - ret = pb_validate_validate(vswc->validate); - if (ret != PIPE_OK) { - mtx_lock(&vws->cs_mutex); - while (ret == PIPE_ERROR_RETRY) { - ret = pb_validate_validate(vswc->validate); - if (ret == PIPE_ERROR_RETRY) { - cnd_wait(&vws->cs_cond, &vws->cs_mutex); - } - } - if (ret != PIPE_OK) { - cnd_broadcast(&vws->cs_cond); - } - mtx_unlock(&vws->cs_mutex); - } - assert(ret == PIPE_OK); if(ret == PIPE_OK) { @@ -235,19 +210,14 @@ vmw_swc_flush(struct svga_winsys_context *swc, } if (vswc->command.used || pfence != NULL) - vmw_ioctl_command(vws, - vswc->base.cid, - 0, + vmw_ioctl_command(vswc->vws, + vswc->base.cid, + 0, vswc->command.buffer, vswc->command.used, - &fence, - vswc->base.imported_fence_fd, - vswc->base.hints); + &fence); pb_validate_fence(vswc->validate, fence); - mtx_lock(&vws->cs_mutex); - cnd_broadcast(&vws->cs_cond); - mtx_unlock(&vws->cs_mutex); } vswc->command.used = 0; @@ -282,17 +252,11 @@ vmw_swc_flush(struct svga_winsys_context *swc, debug_flush_flush(vswc->fctx); #endif swc->hints &= ~SVGA_HINT_FLAG_CAN_PRE_FLUSH; - swc->hints &= ~SVGA_HINT_FLAG_EXPORT_FENCE_FD; vswc->preemptive_flush = FALSE; vswc->seen_surfaces = 0; vswc->seen_regions = 0; vswc->seen_mobs = 0; - if (vswc->base.imported_fence_fd != -1) { - close(vswc->base.imported_fence_fd); - vswc->base.imported_fence_fd = -1; - } - if(pfence) vmw_fence_reference(vswc->vws, pfence, fence); @@ -564,12 +528,12 @@ vmw_swc_surface_relocation(struct svga_winsys_context *swc, * Make sure backup buffer ends up fenced. */ - mtx_lock(&vsurf->mutex); + pipe_mutex_lock(vsurf->mutex); assert(vsurf->buf != NULL); vmw_swc_mob_relocation(swc, mobid, NULL, (struct svga_winsys_buffer *) vsurf->buf, 0, flags); - mtx_unlock(&vsurf->mutex); + pipe_mutex_unlock(vsurf->mutex); } } @@ -816,12 +780,11 @@ vmw_svga_winsys_context_create(struct svga_winsys_screen *sws) vswc->base.flush = vmw_swc_flush; vswc->base.surface_map = vmw_svga_winsys_surface_map; vswc->base.surface_unmap = vmw_svga_winsys_surface_unmap; - vswc->base.surface_invalidate = vmw_svga_winsys_surface_invalidate; - vswc->base.shader_create = vmw_svga_winsys_vgpu10_shader_create; - vswc->base.shader_destroy = vmw_svga_winsys_vgpu10_shader_destroy; + vswc->base.shader_create = vmw_svga_winsys_vgpu10_shader_create; + vswc->base.shader_destroy = vmw_svga_winsys_vgpu10_shader_destroy; - vswc->base.resource_rebind = vmw_svga_winsys_resource_rebind; + vswc->base.resource_rebind = vmw_svga_winsys_resource_rebind; if (sws->have_vgpu10) vswc->base.cid = vmw_ioctl_extended_context_create(vws, sws->have_vgpu10); @@ -831,8 +794,6 @@ vmw_svga_winsys_context_create(struct svga_winsys_screen *sws) if (vswc->base.cid == -1) goto out_no_context; - vswc->base.imported_fence_fd = -1; - vswc->base.have_gb_objects = sws->have_gb_objects; vswc->vws = vws; diff --git a/lib/mesa/src/gallium/winsys/svga/drm/vmw_fence.c b/lib/mesa/src/gallium/winsys/svga/drm/vmw_fence.c index 061f588c8..bcf473a93 100644 --- a/lib/mesa/src/gallium/winsys/svga/drm/vmw_fence.c +++ b/lib/mesa/src/gallium/winsys/svga/drm/vmw_fence.c @@ -22,8 +22,6 @@ * SOFTWARE. * **********************************************************/ -#include <libsync.h> - #include "util/u_memory.h" #include "util/u_atomic.h" #include "util/list.h" @@ -34,7 +32,7 @@ #include "vmw_screen.h" #include "vmw_fence.h" -struct vmw_fence_ops +struct vmw_fence_ops { /* * Immutable members. @@ -42,7 +40,7 @@ struct vmw_fence_ops struct pb_fence_ops base; struct vmw_winsys_screen *vws; - mtx_t mutex; + pipe_mutex mutex; /* * Protected by mutex; @@ -60,8 +58,6 @@ struct vmw_fence uint32_t mask; int32_t signalled; uint32_t seqno; - int32_t fence_fd; - boolean imported; /* TRUE if imported from another process */ }; /** @@ -105,10 +101,10 @@ vmw_fences_release(struct vmw_fence_ops *ops) { struct vmw_fence *fence, *n; - mtx_lock(&ops->mutex); + pipe_mutex_lock(ops->mutex); LIST_FOR_EACH_ENTRY_SAFE(fence, n, &ops->not_signaled, ops_list) LIST_DELINIT(&fence->ops_list); - mtx_unlock(&ops->mutex); + pipe_mutex_unlock(ops->mutex); } /** @@ -134,7 +130,7 @@ vmw_fences_signal(struct pb_fence_ops *fence_ops, return; ops = vmw_fence_ops(fence_ops); - mtx_lock(&ops->mutex); + pipe_mutex_lock(ops->mutex); if (!has_emitted) { emitted = ops->last_emitted; @@ -156,7 +152,7 @@ vmw_fences_signal(struct pb_fence_ops *fence_ops, ops->last_emitted = emitted; out_unlock: - mtx_unlock(&ops->mutex); + pipe_mutex_unlock(ops->mutex); } @@ -179,16 +175,15 @@ vmw_fence(struct pipe_fence_handle *fence) * @fence_ops: The fence_ops manager to register with. * @handle: Handle identifying the kernel fence object. * @mask: Mask of flags that this fence object may signal. - * @fd: File descriptor to associate with the fence * * Returns NULL on failure. */ struct pipe_fence_handle * vmw_fence_create(struct pb_fence_ops *fence_ops, uint32_t handle, - uint32_t seqno, uint32_t mask, int32_t fd) + uint32_t seqno, uint32_t mask) { struct vmw_fence *fence = CALLOC_STRUCT(vmw_fence); - struct vmw_fence_ops *ops = NULL; + struct vmw_fence_ops *ops = vmw_fence_ops(fence_ops); if (!fence) return NULL; @@ -197,21 +192,8 @@ vmw_fence_create(struct pb_fence_ops *fence_ops, uint32_t handle, fence->handle = handle; fence->mask = mask; fence->seqno = seqno; - fence->fence_fd = fd; p_atomic_set(&fence->signalled, 0); - - /* - * If the fence was not created by our device, then we won't - * manage it with our ops - */ - if (!fence_ops) { - fence->imported = true; - return (struct pipe_fence_handle *) fence; - } - - ops = vmw_fence_ops(fence_ops); - - mtx_lock(&ops->mutex); + pipe_mutex_lock(ops->mutex); if (vmw_fence_seq_is_signaled(seqno, ops->last_signaled, seqno)) { p_atomic_set(&fence->signalled, 1); @@ -221,28 +203,13 @@ vmw_fence_create(struct pb_fence_ops *fence_ops, uint32_t handle, LIST_ADDTAIL(&fence->ops_list, &ops->not_signaled); } - mtx_unlock(&ops->mutex); + pipe_mutex_unlock(ops->mutex); return (struct pipe_fence_handle *) fence; } /** - * vmw_fence_destroy - Frees a vmw fence object. - * - * Also closes the file handle associated with the object, if any - */ -static -void vmw_fence_destroy(struct vmw_fence *vfence) -{ - if (vfence->fence_fd != -1) - close(vfence->fence_fd); - - FREE(vfence); -} - - -/** * vmw_fence_reference - Reference / unreference a vmw fence object. * * @vws: Pointer to the winsys screen. @@ -260,15 +227,13 @@ vmw_fence_reference(struct vmw_winsys_screen *vws, if (p_atomic_dec_zero(&vfence->refcount)) { struct vmw_fence_ops *ops = vmw_fence_ops(vws->fence_ops); - if (!vfence->imported) { - vmw_ioctl_fence_unref(vws, vfence->handle); + vmw_ioctl_fence_unref(vws, vfence->handle); - mtx_lock(&ops->mutex); - LIST_DELINIT(&vfence->ops_list); - mtx_unlock(&ops->mutex); - } + pipe_mutex_lock(ops->mutex); + LIST_DELINIT(&vfence->ops_list); + pipe_mutex_unlock(ops->mutex); - vmw_fence_destroy(vfence); + FREE(vfence); } } @@ -335,7 +300,6 @@ vmw_fence_signalled(struct vmw_winsys_screen *vws, * * @vws: Pointer to the winsys screen. * @fence: Handle to the fence object. - * @timeout: How long to wait before timing out. * @flag: Fence flags to wait for. If the fence object can't signal * a flag, it is assumed to be already signaled. * @@ -344,7 +308,6 @@ vmw_fence_signalled(struct vmw_winsys_screen *vws, int vmw_fence_finish(struct vmw_winsys_screen *vws, struct pipe_fence_handle *fence, - uint64_t timeout, unsigned flag) { struct vmw_fence *vfence; @@ -356,16 +319,6 @@ vmw_fence_finish(struct vmw_winsys_screen *vws, return 0; vfence = vmw_fence(fence); - - if (vfence->imported) { - ret = sync_wait(vfence->fence_fd, timeout / 1000000); - - if (!ret) - p_atomic_set(&vfence->signalled, 1); - - return !!ret; - } - old = p_atomic_read(&vfence->signalled); vflags &= ~vfence->mask; @@ -386,23 +339,6 @@ vmw_fence_finish(struct vmw_winsys_screen *vws, return ret; } -/** - * vmw_fence_get_fd - * - * Returns the file descriptor associated with the fence - */ -int -vmw_fence_get_fd(struct pipe_fence_handle *fence) -{ - struct vmw_fence *vfence; - - if (!fence) - return -1; - - vfence = vmw_fence(fence); - return vfence->fence_fd; -} - /** * vmw_fence_ops_fence_reference - wrapper for the pb_fence_ops api. @@ -447,7 +383,7 @@ vmw_fence_ops_fence_finish(struct pb_fence_ops *ops, { struct vmw_winsys_screen *vws = vmw_fence_ops(ops)->vws; - return vmw_fence_finish(vws, fence, PIPE_TIMEOUT_INFINITE, flag); + return vmw_fence_finish(vws, fence, flag); } @@ -485,7 +421,7 @@ vmw_fence_ops_create(struct vmw_winsys_screen *vws) if(!ops) return NULL; - (void) mtx_init(&ops->mutex, mtx_plain); + pipe_mutex_init(ops->mutex); LIST_INITHEAD(&ops->not_signaled); ops->base.destroy = &vmw_fence_ops_destroy; ops->base.fence_reference = &vmw_fence_ops_fence_reference; diff --git a/lib/mesa/src/gallium/winsys/svga/drm/vmw_fence.h b/lib/mesa/src/gallium/winsys/svga/drm/vmw_fence.h index 56f1a0ab0..f6381feaa 100644 --- a/lib/mesa/src/gallium/winsys/svga/drm/vmw_fence.h +++ b/lib/mesa/src/gallium/winsys/svga/drm/vmw_fence.h @@ -1,5 +1,5 @@ /********************************************************** - * Copyright 2009 VMware, Inc. All rights reserved. + * Copyright 2009-2015 VMware, Inc. All rights reserved. * * Permission is hereby granted, free of charge, to any person * obtaining a copy of this software and associated documentation diff --git a/lib/mesa/src/gallium/winsys/svga/drm/vmw_screen.c b/lib/mesa/src/gallium/winsys/svga/drm/vmw_screen.c index e122e0c99..d0bfcd728 100644 --- a/lib/mesa/src/gallium/winsys/svga/drm/vmw_screen.c +++ b/lib/mesa/src/gallium/winsys/svga/drm/vmw_screen.c @@ -109,9 +109,6 @@ vmw_winsys_create( int fd ) if (util_hash_table_set(dev_hash, &vws->device, vws) != PIPE_OK) goto out_no_hash_insert; - cnd_init(&vws->cs_cond); - mtx_init(&vws->cs_mutex, mtx_plain); - return vws; out_no_hash_insert: out_no_svga: @@ -136,8 +133,6 @@ vmw_winsys_destroy(struct vmw_winsys_screen *vws) vws->fence_ops->destroy(vws->fence_ops); vmw_ioctl_cleanup(vws); close(vws->ioctl.drm_fd); - mtx_destroy(&vws->cs_mutex); - cnd_destroy(&vws->cs_cond); FREE(vws); } } diff --git a/lib/mesa/src/gallium/winsys/svga/drm/vmw_screen.h b/lib/mesa/src/gallium/winsys/svga/drm/vmw_screen.h index f21cabb51..79d0949e9 100644 --- a/lib/mesa/src/gallium/winsys/svga/drm/vmw_screen.h +++ b/lib/mesa/src/gallium/winsys/svga/drm/vmw_screen.h @@ -40,7 +40,7 @@ #include "svga_winsys.h" #include "pipebuffer/pb_buffer_fenced.h" -#include <os/os_thread.h> + #define VMW_GMR_POOL_SIZE (16*1024*1024) #define VMW_QUERY_POOL_SIZE (8192) @@ -99,9 +99,6 @@ struct vmw_winsys_screen */ dev_t device; int open_count; - - cnd_t cs_cond; - mtx_t cs_mutex; }; @@ -162,13 +159,11 @@ vmw_ioctl_surface_destroy(struct vmw_winsys_screen *vws, void vmw_ioctl_command(struct vmw_winsys_screen *vws, - int32_t cid, - uint32_t throttle_us, - void *commands, - uint32_t size, - struct pipe_fence_handle **fence, - int32_t imported_fence_fd, - uint32_t flags); + int32_t cid, + uint32_t throttle_us, + void *commands, + uint32_t size, + struct pipe_fence_handle **fence); struct vmw_region * vmw_ioctl_region_create(struct vmw_winsys_screen *vws, uint32_t size); diff --git a/lib/mesa/src/gallium/winsys/svga/drm/vmw_screen_dri.c b/lib/mesa/src/gallium/winsys/svga/drm/vmw_screen_dri.c index 2a0ac7b33..eae678a63 100644 --- a/lib/mesa/src/gallium/winsys/svga/drm/vmw_screen_dri.c +++ b/lib/mesa/src/gallium/winsys/svga/drm/vmw_screen_dri.c @@ -126,6 +126,38 @@ out_no_vws: return NULL; } +static inline boolean +vmw_dri1_intersect_src_bbox(struct drm_clip_rect *dst, + int dst_x, + int dst_y, + const struct drm_clip_rect *src, + const struct drm_clip_rect *bbox) +{ + int xy1; + int xy2; + + xy1 = ((int)src->x1 > (int)bbox->x1 + dst_x) ? src->x1 : + (int)bbox->x1 + dst_x; + xy2 = ((int)src->x2 < (int)bbox->x2 + dst_x) ? src->x2 : + (int)bbox->x2 + dst_x; + if (xy1 >= xy2 || xy1 < 0) + return FALSE; + + dst->x1 = xy1; + dst->x2 = xy2; + + xy1 = ((int)src->y1 > (int)bbox->y1 + dst_y) ? src->y1 : + (int)bbox->y1 + dst_y; + xy2 = ((int)src->y2 < (int)bbox->y2 + dst_y) ? src->y2 : + (int)bbox->y2 + dst_y; + if (xy1 >= xy2 || xy1 < 0) + return FALSE; + + dst->y1 = xy1; + dst->y2 = xy2; + return TRUE; +} + /** * vmw_drm_gb_surface_from_handle - Create a shared surface * diff --git a/lib/mesa/src/gallium/winsys/svga/drm/vmw_screen_ioctl.c b/lib/mesa/src/gallium/winsys/svga/drm/vmw_screen_ioctl.c index e2f0da58b..1740d1ab0 100644 --- a/lib/mesa/src/gallium/winsys/svga/drm/vmw_screen_ioctl.c +++ b/lib/mesa/src/gallium/winsys/svga/drm/vmw_screen_ioctl.c @@ -1,5 +1,5 @@ /********************************************************** - * Copyright 2009 VMware, Inc. All rights reserved. + * Copyright 2009-2015 VMware, Inc. All rights reserved. * * Permission is hereby granted, free of charge, to any person * obtaining a copy of this software and associated documentation @@ -52,6 +52,7 @@ #include <unistd.h> #define VMW_MAX_DEFAULT_TEXTURE_SIZE (128 * 1024 * 1024) +#define VMW_FENCE_TIMEOUT_SECONDS 60 struct vmw_region { @@ -63,13 +64,6 @@ struct vmw_region uint32_t size; }; -/* XXX: This isn't a real hardware flag, but just a hack for kernel to - * know about primary surfaces. In newer versions of the kernel - * interface the driver uses a special field. - */ -#define SVGA3D_SURFACE_HINT_SCANOUT (1 << 9) - - uint32_t vmw_region_size(struct vmw_region *region) { @@ -91,10 +85,30 @@ vmw_ioctl_context_create(struct vmw_winsys_screen *vws) return -1; vmw_printf("Context id is %d\n", c_arg.cid); - return c_arg.cid; } +uint32 +vmw_ioctl_extended_context_create(struct vmw_winsys_screen *vws, + boolean vgpu10) +{ + union drm_vmw_extended_context_arg c_arg; + int ret; + + VMW_FUNC; + memset(&c_arg, 0, sizeof(c_arg)); + c_arg.req = (vgpu10 ? drm_vmw_context_vgpu10 : drm_vmw_context_legacy); + ret = drmCommandWriteRead(vws->ioctl.drm_fd, + DRM_VMW_CREATE_EXTENDED_CONTEXT, + &c_arg, sizeof(c_arg)); + + if (ret) + return -1; + + vmw_printf("Context id is %d\n", c_arg.cid); + return c_arg.rep.cid; +} + void vmw_ioctl_context_destroy(struct vmw_winsys_screen *vws, uint32 cid) { @@ -116,7 +130,8 @@ vmw_ioctl_surface_create(struct vmw_winsys_screen *vws, SVGA3dSurfaceFormat format, unsigned usage, SVGA3dSize size, - uint32_t numFaces, uint32_t numMipLevels) + uint32_t numFaces, uint32_t numMipLevels, + unsigned sampleCount) { union drm_vmw_surface_create_arg s_arg; struct drm_vmw_surface_create_req *req = &s_arg.req; @@ -131,17 +146,8 @@ vmw_ioctl_surface_create(struct vmw_winsys_screen *vws, vmw_printf("%s flags %d format %d\n", __FUNCTION__, flags, format); memset(&s_arg, 0, sizeof(s_arg)); - if (vws->use_old_scanout_flag && - (flags & SVGA3D_SURFACE_HINT_SCANOUT)) { - req->flags = (uint32_t) flags; - req->scanout = false; - } else if (flags & SVGA3D_SURFACE_HINT_SCANOUT) { - req->flags = (uint32_t) (flags & ~SVGA3D_SURFACE_HINT_SCANOUT); - req->scanout = true; - } else { - req->flags = (uint32_t) flags; - req->scanout = false; - } + req->flags = (uint32_t) flags; + req->scanout = !!(usage & SVGA_SURFACE_USAGE_SCANOUT); req->format = (uint32_t) format; req->shareable = !!(usage & SVGA_SURFACE_USAGE_SHARED); @@ -188,6 +194,7 @@ vmw_ioctl_gb_surface_create(struct vmw_winsys_screen *vws, SVGA3dSize size, uint32_t numFaces, uint32_t numMipLevels, + unsigned sampleCount, uint32_t buffer_handle, struct vmw_region **p_region) { @@ -206,25 +213,29 @@ vmw_ioctl_gb_surface_create(struct vmw_winsys_screen *vws, } memset(&s_arg, 0, sizeof(s_arg)); - if (flags & SVGA3D_SURFACE_HINT_SCANOUT) { - req->svga3d_flags = (uint32_t) (flags & ~SVGA3D_SURFACE_HINT_SCANOUT); - req->drm_surface_flags = drm_vmw_surface_flag_scanout; - } else { - req->svga3d_flags = (uint32_t) flags; - } + req->svga3d_flags = (uint32_t) flags; + if (usage & SVGA_SURFACE_USAGE_SCANOUT) + req->drm_surface_flags |= drm_vmw_surface_flag_scanout; req->format = (uint32_t) format; if (usage & SVGA_SURFACE_USAGE_SHARED) req->drm_surface_flags |= drm_vmw_surface_flag_shareable; req->drm_surface_flags |= drm_vmw_surface_flag_create_buffer; - - assert(numFaces * numMipLevels < DRM_VMW_MAX_SURFACE_FACES* - DRM_VMW_MAX_MIP_LEVELS); req->base_size.width = size.width; req->base_size.height = size.height; req->base_size.depth = size.depth; req->mip_levels = numMipLevels; req->multisample_count = 0; req->autogen_filter = SVGA3D_TEX_FILTER_NONE; + + if (vws->base.have_vgpu10) { + req->array_size = numFaces; + req->multisample_count = sampleCount; + } else { + assert(numFaces * numMipLevels < DRM_VMW_MAX_SURFACE_FACES* + DRM_VMW_MAX_MIP_LEVELS); + req->array_size = 0; + } + if (buffer_handle) req->buffer_handle = buffer_handle; else @@ -403,6 +414,7 @@ vmw_ioctl_command(struct vmw_winsys_screen *vws, int32_t cid, struct drm_vmw_execbuf_arg arg; struct drm_vmw_fence_rep rep; int ret; + int argsize; #ifdef DEBUG { @@ -433,13 +445,21 @@ vmw_ioctl_command(struct vmw_winsys_screen *vws, int32_t cid, arg.commands = (unsigned long)commands; arg.command_size = size; arg.throttle_us = throttle_us; - arg.version = DRM_VMW_EXECBUF_VERSION; - + arg.version = vws->ioctl.drm_execbuf_version; + arg.context_handle = (vws->base.have_vgpu10 ? cid : SVGA3D_INVALID_ID); + + /* In DRM_VMW_EXECBUF_VERSION 1, the drm_vmw_execbuf_arg structure ends with + * the flags field. The structure size sent to drmCommandWrite must match + * the drm_execbuf_version. Otherwise, an invalid value will be returned. + */ + argsize = vws->ioctl.drm_execbuf_version > 1 ? sizeof(arg) : + offsetof(struct drm_vmw_execbuf_arg, context_handle); do { - ret = drmCommandWrite(vws->ioctl.drm_fd, DRM_VMW_EXECBUF, &arg, sizeof(arg)); + ret = drmCommandWrite(vws->ioctl.drm_fd, DRM_VMW_EXECBUF, &arg, argsize); } while(ret == -ERESTART); if (ret) { vmw_error("%s error %s.\n", __FUNCTION__, strerror(-ret)); + abort(); } if (rep.error) { @@ -702,7 +722,7 @@ vmw_ioctl_fence_finish(struct vmw_winsys_screen *vws, memset(&arg, 0, sizeof(arg)); arg.handle = handle; - arg.timeout_us = 10*1000000; + arg.timeout_us = VMW_FENCE_TIMEOUT_SECONDS*1000000; arg.lazy = 0; arg.flags = vflags; @@ -832,6 +852,7 @@ vmw_ioctl_init(struct vmw_winsys_screen *vws) int ret; uint32_t *cap_buffer; drmVersionPtr version; + boolean drm_gb_capable; boolean have_drm_2_5; VMW_FUNC; @@ -844,6 +865,12 @@ vmw_ioctl_init(struct vmw_winsys_screen *vws) (version->version_major == 2 && version->version_minor > 4); vws->ioctl.have_drm_2_6 = version->version_major > 2 || (version->version_major == 2 && version->version_minor > 5); + vws->ioctl.have_drm_2_9 = version->version_major > 2 || + (version->version_major == 2 && version->version_minor > 8); + + vws->ioctl.drm_execbuf_version = vws->ioctl.have_drm_2_9 ? 2 : 1; + + drm_gb_capable = have_drm_2_5; memset(&gp_arg, 0, sizeof(gp_arg)); gp_arg.param = DRM_VMW_PARAM_3D; @@ -875,9 +902,10 @@ vmw_ioctl_init(struct vmw_winsys_screen *vws) vws->base.have_gb_objects = !!(gp_arg.value & (uint64_t) SVGA_CAP_GBOBJECTS); - if (vws->base.have_gb_objects && !have_drm_2_5) + if (vws->base.have_gb_objects && !drm_gb_capable) goto out_no_3d; + vws->base.have_vgpu10 = FALSE; if (vws->base.have_gb_objects) { memset(&gp_arg, 0, sizeof(gp_arg)); gp_arg.param = DRM_VMW_PARAM_3D_CAPS_SIZE; @@ -918,6 +946,27 @@ vmw_ioctl_init(struct vmw_winsys_screen *vws) /* Never early flush surfaces, mobs do accounting. */ vws->ioctl.max_surface_memory = -1; + + if (vws->ioctl.have_drm_2_9) { + + memset(&gp_arg, 0, sizeof(gp_arg)); + gp_arg.param = DRM_VMW_PARAM_VGPU10; + ret = drmCommandWriteRead(vws->ioctl.drm_fd, DRM_VMW_GET_PARAM, + &gp_arg, sizeof(gp_arg)); + if (ret == 0 && gp_arg.value != 0) { + const char *vgpu10_val; + + debug_printf("Have VGPU10 interface and hardware.\n"); + vws->base.have_vgpu10 = TRUE; + vgpu10_val = getenv("SVGA_VGPU10"); + if (vgpu10_val && strcmp(vgpu10_val, "0") == 0) { + debug_printf("Disabling VGPU10 interface.\n"); + vws->base.have_vgpu10 = FALSE; + } else { + debug_printf("Enabling VGPU10 interface.\n"); + } + } + } } else { vws->ioctl.num_cap_3d = SVGA3D_DEVCAP_MAX; @@ -938,6 +987,9 @@ vmw_ioctl_init(struct vmw_winsys_screen *vws) size = SVGA_FIFO_3D_CAPS_SIZE * sizeof(uint32_t); } + debug_printf("VGPU10 interface is %s.\n", + vws->base.have_vgpu10 ? "on" : "off"); + cap_buffer = calloc(1, size); if (!cap_buffer) { debug_printf("Failed alloc fifo 3D caps buffer.\n"); @@ -970,6 +1022,17 @@ vmw_ioctl_init(struct vmw_winsys_screen *vws) " (%i, %s).\n", ret, strerror(-ret)); goto out_no_caps; } + + if (((version->version_major == 2 && version->version_minor >= 10) + || version->version_major > 2) && vws->base.have_vgpu10) { + + /* support for these commands didn't make it into vmwgfx kernel + * modules before 2.10. + */ + vws->base.have_generate_mipmap_cmd = TRUE; + vws->base.have_set_predication_cmd = TRUE; + } + free(cap_buffer); drmFreeVersion(version); vmw_printf("%s OK\n", __FUNCTION__); diff --git a/lib/mesa/src/gallium/winsys/svga/drm/vmw_screen_svga.c b/lib/mesa/src/gallium/winsys/svga/drm/vmw_screen_svga.c index 7c80642b3..3a936e7e6 100644 --- a/lib/mesa/src/gallium/winsys/svga/drm/vmw_screen_svga.c +++ b/lib/mesa/src/gallium/winsys/svga/drm/vmw_screen_svga.c @@ -32,7 +32,6 @@ * @author Jose Fonseca */ -#include <libsync.h> #include "svga_cmd.h" #include "svga3d_caps.h" @@ -124,44 +123,14 @@ vmw_svga_winsys_fence_signalled(struct svga_winsys_screen *sws, static int vmw_svga_winsys_fence_finish(struct svga_winsys_screen *sws, struct pipe_fence_handle *fence, - uint64_t timeout, unsigned flag) { struct vmw_winsys_screen *vws = vmw_winsys_screen(sws); - return vmw_fence_finish(vws, fence, timeout, flag); + return vmw_fence_finish(vws, fence, flag); } -static int -vmw_svga_winsys_fence_get_fd(struct svga_winsys_screen *sws, - struct pipe_fence_handle *fence, - boolean duplicate) -{ - if (duplicate) - return dup(vmw_fence_get_fd(fence)); - else - return vmw_fence_get_fd(fence); -} - - -static void -vmw_svga_winsys_fence_create_fd(struct svga_winsys_screen *sws, - struct pipe_fence_handle **fence, - int32_t fd) -{ - *fence = vmw_fence_create(NULL, 0, 0, 0, dup(fd)); -} - -static int -vmw_svga_winsys_fence_server_sync(struct svga_winsys_screen *sws, - int32_t *context_fd, - struct pipe_fence_handle *fence) -{ - return sync_accumulate("vmwgfx", context_fd, - sws->fence_get_fd(sws, fence, FALSE)); -} - static struct svga_winsys_surface * vmw_svga_winsys_surface_create(struct svga_winsys_screen *sws, @@ -187,7 +156,7 @@ vmw_svga_winsys_surface_create(struct svga_winsys_screen *sws, pipe_reference_init(&surface->refcnt, 1); p_atomic_set(&surface->validated, 0); surface->screen = vws; - (void) mtx_init(&surface->mutex, mtx_plain); + pipe_mutex_init(surface->mutex); surface->shared = !!(usage & SVGA_SURFACE_USAGE_SHARED); provider = (surface->shared) ? vws->pools.gmr : vws->pools.mob_fenced; @@ -231,25 +200,22 @@ vmw_svga_winsys_surface_create(struct svga_winsys_screen *sws, surface->buf ? NULL : &desc.region); - if (surface->sid == SVGA3D_INVALID_ID) { - if (surface->buf == NULL) { + if (surface->sid == SVGA3D_INVALID_ID && surface->buf) { + + /* + * Kernel refused to allocate a surface for us. + * Perhaps something was wrong with our buffer? + * This is really a guard against future new size requirements + * on the backing buffers. + */ + vmw_svga_winsys_buffer_destroy(sws, surface->buf); + surface->buf = NULL; + surface->sid = vmw_ioctl_gb_surface_create(vws, flags, format, usage, + size, numLayers, + numMipLevels, sampleCount, + 0, &desc.region); + if (surface->sid == SVGA3D_INVALID_ID) goto no_sid; - } else { - /* - * Kernel refused to allocate a surface for us. - * Perhaps something was wrong with our buffer? - * This is really a guard against future new size requirements - * on the backing buffers. - */ - vmw_svga_winsys_buffer_destroy(sws, surface->buf); - surface->buf = NULL; - surface->sid = vmw_ioctl_gb_surface_create(vws, flags, format, usage, - size, numLayers, - numMipLevels, sampleCount, - 0, &desc.region); - if (surface->sid == SVGA3D_INVALID_ID) - goto no_sid; - } } /* @@ -314,6 +280,18 @@ vmw_svga_winsys_surface_can_create(struct svga_winsys_screen *sws, } +static void +vmw_svga_winsys_surface_invalidate(struct svga_winsys_screen *sws, + struct svga_winsys_surface *surf) +{ + /* this is a noop since surface invalidation is not needed for DMA path. + * DMA is enabled when guest-backed surface is not enabled or + * guest-backed dma is enabled. Since guest-backed dma is enabled + * when guest-backed surface is enabled, that implies DMA is always enabled; + * hence, surface invalidation is not needed. + */ +} + static boolean vmw_svga_winsys_surface_is_flushed(struct svga_winsys_screen *sws, struct svga_winsys_surface *surface) @@ -456,6 +434,7 @@ vmw_winsys_screen_init_svga(struct vmw_winsys_screen *vws) vws->base.surface_is_flushed = vmw_svga_winsys_surface_is_flushed; vws->base.surface_reference = vmw_svga_winsys_surface_ref; vws->base.surface_can_create = vmw_svga_winsys_surface_can_create; + vws->base.surface_invalidate = vmw_svga_winsys_surface_invalidate; vws->base.buffer_create = vmw_svga_winsys_buffer_create; vws->base.buffer_map = vmw_svga_winsys_buffer_map; vws->base.buffer_unmap = vmw_svga_winsys_buffer_unmap; @@ -465,9 +444,6 @@ vmw_winsys_screen_init_svga(struct vmw_winsys_screen *vws) vws->base.shader_create = vmw_svga_winsys_shader_create; vws->base.shader_destroy = vmw_svga_winsys_shader_destroy; vws->base.fence_finish = vmw_svga_winsys_fence_finish; - vws->base.fence_get_fd = vmw_svga_winsys_fence_get_fd; - vws->base.fence_create_fd = vmw_svga_winsys_fence_create_fd; - vws->base.fence_server_sync = vmw_svga_winsys_fence_server_sync; vws->base.query_create = vmw_svga_winsys_query_create; vws->base.query_init = vmw_svga_winsys_query_init; diff --git a/lib/mesa/src/gallium/winsys/svga/drm/vmw_surface.c b/lib/mesa/src/gallium/winsys/svga/drm/vmw_surface.c index 04aa93278..a438b1a7c 100644 --- a/lib/mesa/src/gallium/winsys/svga/drm/vmw_surface.c +++ b/lib/mesa/src/gallium/winsys/svga/drm/vmw_surface.c @@ -48,7 +48,7 @@ vmw_svga_winsys_surface_map(struct svga_winsys_context *swc, *retry = FALSE; assert((flags & (PIPE_TRANSFER_READ | PIPE_TRANSFER_WRITE)) != 0); - mtx_lock(&vsrf->mutex); + pipe_mutex_lock(vsrf->mutex); if (vsrf->mapcount) { /* @@ -154,7 +154,7 @@ out_mapped: vsrf->data = data; vsrf->map_mode = flags & (PIPE_TRANSFER_READ | PIPE_TRANSFER_WRITE); out_unlock: - mtx_unlock(&vsrf->mutex); + pipe_mutex_unlock(vsrf->mutex); return data; } @@ -165,7 +165,7 @@ vmw_svga_winsys_surface_unmap(struct svga_winsys_context *swc, boolean *rebind) { struct vmw_svga_winsys_surface *vsrf = vmw_svga_winsys_surface(srf); - mtx_lock(&vsrf->mutex); + pipe_mutex_lock(vsrf->mutex); if (--vsrf->mapcount == 0) { *rebind = vsrf->rebind; vsrf->rebind = FALSE; @@ -173,20 +173,7 @@ vmw_svga_winsys_surface_unmap(struct svga_winsys_context *swc, } else { *rebind = FALSE; } - mtx_unlock(&vsrf->mutex); -} - -enum pipe_error -vmw_svga_winsys_surface_invalidate(struct svga_winsys_context *swc, - struct svga_winsys_surface *surf) -{ - /* this is a noop since surface invalidation is not needed for DMA path. - * DMA is enabled when guest-backed surface is not enabled or - * guest-backed dma is enabled. Since guest-backed dma is enabled - * when guest-backed surface is enabled, that implies DMA is always enabled; - * hence, surface invalidation is not needed. - */ - return PIPE_OK; + pipe_mutex_unlock(vsrf->mutex); } void @@ -214,7 +201,7 @@ vmw_svga_winsys_surface_reference(struct vmw_svga_winsys_surface **pdst, assert(p_atomic_read(&dst->validated) == 0); dst->sid = SVGA3D_INVALID_ID; #endif - mtx_destroy(&dst->mutex); + pipe_mutex_destroy(dst->mutex); FREE(dst); } diff --git a/lib/mesa/src/gallium/winsys/svga/drm/vmw_surface.h b/lib/mesa/src/gallium/winsys/svga/drm/vmw_surface.h index 0fdc8de1d..f8b582d2c 100644 --- a/lib/mesa/src/gallium/winsys/svga/drm/vmw_surface.h +++ b/lib/mesa/src/gallium/winsys/svga/drm/vmw_surface.h @@ -57,7 +57,7 @@ struct vmw_svga_winsys_surface unsigned next_present_no; uint32_t present_fences[VMW_MAX_PRESENTS]; - mtx_t mutex; + pipe_mutex mutex; struct svga_winsys_buffer *buf; /* Current backing guest buffer */ uint32_t mapcount; /* Number of mappers */ uint32_t map_mode; /* PIPE_TRANSFER_[READ|WRITE] */ @@ -94,8 +94,5 @@ void vmw_svga_winsys_surface_unmap(struct svga_winsys_context *swc, struct svga_winsys_surface *srf, boolean *rebind); -enum pipe_error -vmw_svga_winsys_surface_invalidate(struct svga_winsys_context *swc, - struct svga_winsys_surface *srf); #endif /* VMW_SURFACE_H_ */ diff --git a/lib/mesa/src/gallium/winsys/svga/drm/vmwgfx_drm.h b/lib/mesa/src/gallium/winsys/svga/drm/vmwgfx_drm.h index 73ad20537..807ec901a 100644 --- a/lib/mesa/src/gallium/winsys/svga/drm/vmwgfx_drm.h +++ b/lib/mesa/src/gallium/winsys/svga/drm/vmwgfx_drm.h @@ -1,6 +1,6 @@ /************************************************************************** * - * Copyright © 2009 VMware, Inc., Palo Alto, CA., USA + * Copyright © 2009-2015 VMware, Inc., Palo Alto, CA., USA * All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a @@ -64,6 +64,7 @@ #define DRM_VMW_GB_SURFACE_CREATE 23 #define DRM_VMW_GB_SURFACE_REF 24 #define DRM_VMW_SYNCCPU 25 +#define DRM_VMW_CREATE_EXTENDED_CONTEXT 26 /*************************************************************************/ /** @@ -88,6 +89,8 @@ #define DRM_VMW_PARAM_3D_CAPS_SIZE 8 #define DRM_VMW_PARAM_MAX_MOB_MEMORY 9 #define DRM_VMW_PARAM_MAX_MOB_SIZE 10 +#define DRM_VMW_PARAM_SCREEN_TARGET 11 +#define DRM_VMW_PARAM_VGPU10 12 /** * enum drm_vmw_handle_type - handle type for ref ioctls @@ -296,7 +299,7 @@ union drm_vmw_surface_reference_arg { * Argument to the DRM_VMW_EXECBUF Ioctl. */ -#define DRM_VMW_EXECBUF_VERSION 1 +#define DRM_VMW_EXECBUF_VERSION 2 struct drm_vmw_execbuf_arg { uint64_t commands; @@ -305,6 +308,8 @@ struct drm_vmw_execbuf_arg { uint64_t fence_rep; uint32_t version; uint32_t flags; + uint32_t context_handle; + uint32_t pad64; }; /** @@ -826,7 +831,6 @@ struct drm_vmw_update_layout_arg { enum drm_vmw_shader_type { drm_vmw_shader_type_vs = 0, drm_vmw_shader_type_ps, - drm_vmw_shader_type_gs }; @@ -908,6 +912,8 @@ enum drm_vmw_surface_flags { * @buffer_handle Buffer handle of backup buffer. SVGA3D_INVALID_ID * if none. * @base_size Size of the base mip level for all faces. + * @array_size Must be zero for non-vgpu10 hardware, and if non-zero + * svga3d_flags must have proper bind flags setup. * * Input argument to the DRM_VMW_GB_SURFACE_CREATE Ioctl. * Part of output argument for the DRM_VMW_GB_SURFACE_REF Ioctl. @@ -920,7 +926,7 @@ struct drm_vmw_gb_surface_create_req { uint32_t multisample_count; uint32_t autogen_filter; uint32_t buffer_handle; - uint32_t pad64; + uint32_t array_size; struct drm_vmw_size base_size; }; @@ -1060,4 +1066,28 @@ struct drm_vmw_synccpu_arg { uint32_t pad64; }; +/*************************************************************************/ +/** + * DRM_VMW_CREATE_EXTENDED_CONTEXT - Create a host context. + * + * Allocates a device unique context id, and queues a create context command + * for the host. Does not wait for host completion. + */ +enum drm_vmw_extended_context { + drm_vmw_context_legacy, + drm_vmw_context_vgpu10 +}; + +/** + * union drm_vmw_extended_context_arg + * + * @req: Context type. + * @rep: Context identifier. + * + * Argument to the DRM_VMW_CREATE_EXTENDED_CONTEXT Ioctl. + */ +union drm_vmw_extended_context_arg { + enum drm_vmw_extended_context req; + struct drm_vmw_context_arg rep; +}; #endif |