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path: root/src/amdgpu_dri2.c
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2022-04-20Do not consider disabled crtc anymore when looking for xf86crtc covering ↵Lukasz Spintzyk
drawable. This is commit is removing obsolete switch done in xf86-video-ati at sha 61d0aec40e2521488c2fe43e7a6823e5c87d94d7: video: add option to include disabled CRTCs in best CRTC search This is not required anymore as with commit done in xorg-server at sha 5c5c1b77982a9af7279a90bc3c2be48adaa9c778: present: Add Present extension That in case of lack of crtc is using fake_crtc with render 1Hz frequency When consider_disabled is removed then amdgpu_pick_best_crtc is doing the same what rr_crtc_covering_box is doing so it can be reimplemented to reuse that function. Signed-off-by: Łukasz Spintzyk <lukasz.spintzyk@synaptics.com> Signed-off-by: Shashank Sharma <contactshashanksharma@gmail.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
2019-06-14Remove dri2_drawable_crtc parameter consider_disabledMichel Dänzer
All callers were passing TRUE. Reviewed-and-tested-by: Flora Cui <flora.cui@amd.com>
2019-06-14dri2: Re-use previous CRTC when possible if pick_best_crtc returns NULLMichel Dänzer
This way, the MSC will continue ticking at the rate of (the last mode which was enabled for) that CRTC, instead of the client running unthrottled. Reviewed-and-tested-by: Flora Cui <flora.cui@amd.com>
2019-06-10dri2: reply to client for WaitMSC request in any caseFlora Cui
otherwise client would wait for reply forever and desktop appears hang. Signed-off-by: Flora Cui <flora.cui@amd.com> Acked-by: Feifei Xu <Feifei.Xu@amd.com> Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
2019-03-01dri2: Call drm_queue_handle_deferred in dri2_deferred_eventMichel Dänzer
drm_queue_handler just puts the event on the signalled list; without calling drm_queue_handle_deferred, actual processing of the event may be delayed indefinitely, e.g. until another event arrives from the kernel. This could result in DRI2 clients hanging during DPMS off. Fixes: 739181c8d3334 "Add amdgpu_drm_handle_event wrapper for drmHandleEvent" Reviewed-by: Aaron Liu <aaron.liu@amd.com> Tested-by: Aaron Liu <aaron.liu@amd.com>
2019-01-16dri2: Flush in dri2_create_buffer2 after calling glamor_set_pixmap_boMichel Dänzer
To make sure the client can't use the shared pixmap storage for direct rendering first, which could produce garbage. Bugzilla: https://bugs.freedesktop.org/109235 Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
2018-11-16Explicitly keep track of whether a DRM event is for a flip or notMichel Dänzer
When an async flip is performed, and TearFree is enabled on the CRTC used for timing, we schedule a vblank event for completing the page flip. The DRM event queuing code treated this event like a vblank event, but it needs to be treated like a page flip event. Acked-by: Alex Deucher <alexander.deucher@amd.com>
2018-08-16Move DRM event queue related initialization to amdgpu_drm_queue_initMichel Dänzer
And make amdgpu_drm_queue_handler not directly accessible outside of amdgpu_drm_queue.c. Acked-by: Alex Deucher <alexander.deucher@amd.com>
2018-07-10Bail from dri2_create_buffer2 if we can't get a pixmapMichel Dänzer
We would store the NULL pointer and continue, which would lead to a crash down the road. Bugzilla: https://bugs.freedesktop.org/106293 (Ported from radeon commit 3dcfce8d0f495d09d7836caf98ef30d625b78a13) Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
2018-05-16Replace 'foo == NULL' with '!foo'Michel Dänzer
Shorter and sweeter. :) Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
2018-02-14Add 30bit RGB color format supportHawking Zhang
Signed-off-by: Hawking Zhang <Hawking.Zhang@amd.com> [ Michel Dänzer: * Require Xorg >= 1.19.99.1 for depth 30, otherwise it can't work with glamor * Update manpage, per radeon commit 574bfab4bf1fcd95163a8f33cea2889189429d30 ] Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
2017-12-27Keep track of how many SW cursors are visible on each screenMichel Dänzer
And use this to determine when we cannot use page flipping for DRI clients. We previously did this based on whether the HW cursor cannot be used on at least one CRTC, which had at least two issues: * Even while the HW cursor cannot be used, no SW cursor may actually be visible (e.g. because all cursors are disabled), in which case we can use page flipping for DRI clients anyway * Even while the HW cursor can be used, there may be SW cursors visible from non-core pointer devices, in which case we cannot use page flipping for DRI clients anyway Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
2017-08-31Require xserver >= 1.13Michel Dänzer
xserver 1.13.0 was released on September 6th, 2012, almost 5 years ago. This allows cleaning up a bunch of backwards compatibility code. (Ported from radeon commit 5cdd334b3402c2431deb3a87a8d04ef590da53ee) Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
2017-08-22Always allow DRI2 page flipping with TearFreeMichel Dänzer
Even if TearFree is enabled for the CRTC we're synchronizing to. (Ported from radeon commit d314cbfb228bb4b8762714f98d0c114a8ee3f061) Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
2017-08-22Create drmmode_wait_vblank helperMichel Dänzer
Allows cleaning up the code considerably. (Ported from radeon commit 99f1d7a474af3683fe1a66f50c0bb8935478ff0a) Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
2017-08-22Pass reference CRTC to amdgpu_do_pageflip directlyMichel Dänzer
Simplifies the code slightly. (Ported from radeon commit 49cc61ab970ee28d4509b4e2dd0a57165136889f) Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
2017-08-03Allow DRI page flipping when some CRTCs use separate scanout buffersMichel Dänzer
As long as the CRTC we're synchronizing to doesn't. (Ported from radeon commit 5309bde0c4e28adf2b167191c6d7011a19e31eed) Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
2017-08-03Add drmmode_crtc_can_flip helperMichel Dänzer
To reduce code duplication between DRI2 and Present. No functional change intended yet. (Ported from radeon commit 9bc3eef74452d924f9101c024f66ad9b14c404c8) Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
2017-07-13Use drmmode_crtc->scanout_id instead of 0 to check for scanout bufferMichel Dänzer
Preparation for following change, no functional change intended. (Ported from radeon commit aff267ee36cc6a703a532f91f82adc1ba1425ff3) Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
2017-03-03Allow toggling TearFree at runtime via output propertyMichel Dänzer
Option "TearFree" now sets the default value of the output property. See the manpage update for details. TearFree is now enabled by default for outputs using rotation or other RandR transforms, and for RandR 1.4 slave outputs. (Ported from radeon commit 58cd1600057e41aade0106d4acf78e23eac6e44f) Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
2017-03-03Fix flip event data leak if calloc or drmModeAddFB failsMichel Dänzer
(Ported from radeon commit 481394e3c9f9f7d88bb66fe9ae8834c87952a8ab) Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
2016-11-28Make libdrm >= 2.4.72 requirement explicitMichel Dänzer
And drop compatibility code for older versions. Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
2016-11-22Use DRM_MODE_PAGE_FLIP_TARGET_ABSOLUTE/RELATIVE flags when availableMichel Dänzer
(Ported from radeon commits 1106b2f773ad0611c729b27f4c192a26b43ef1e7 and 5fea5ef2f07eee4a0f94baab427010b936f1d4b4) v2: * Squash in radeon fix for TearFree regression * Remove preprocessor guards for compatibility with libdrm < 2.4.72 (Emil Velikov) Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
2016-09-07Add explicit AMDGPU_DRM_QUEUE_ERROR defineMichel Dänzer
Should make the amdgpu_drm_queue_alloc error handling clearer, and gets rid of a compile warning about it returning NULL. (Ported from radeon commit a37af701768b12d86868a831a79f1e02ee4968cf) Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
2016-08-23DRI2: Fix amdgpu_dri2_exchange_buffers width/height copy'n'paste errorQiang Yu
Signed-off-by: Qiang Yu <Qiang.Yu@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
2016-07-22DRI2: Add interpolated_vblanks in amdgpu_dri2_get_crtc_mscMichel Dänzer
We need that in amdgpu_dri2_drawable_crtc as well for priv->vblank_delta to work as intended. amdgpu_dri2_get_msc was already doing this. Fixes hangs in some cases when using VDPAU via DRI2 and moving the window between CRTCs. Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
2016-06-23dri2: Don't allow flipping when using a dedicated scanout bufferMichel Dänzer
Fixes issues when mixing rotation and page flipping with current xserver Git master. Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
2016-06-14Move DRI2's local fixup_glamor helper to amdgpu_glamor_set_pixmap_bo v2Michel Dänzer
So it can be used outside of the DRI2 code. v2: Keep pixmap refcnt increment in amdgpu_dri2_create_buffer2 (Qiang Yu) Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Tested-by: Qiang Yu <qiang.yu@amd.com> (v1)
2016-06-14Consolidate get_drawable_pixmap helperMichel Dänzer
There were two static helpers for the same purpose. Consolidate them into a single inline helper which can be used anywhere. Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Tested-by: Qiang Yu <qiang.yu@amd.com>
2016-05-12Add support for async flips to radeon_do_pageflipMichel Dänzer
Will be used by the next change. No functional change here. (Ported from radeon commit 90a915c62d012e99193833aecc93974e68880c60) Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
2016-04-01Identify DRM event queue entries by sequence number instead of by pointerMichel Dänzer
If the memory for an entry was allocated at the same address as that for a previously cancelled entry, the handler could theoretically be called prematurely, triggered by the DRM event which was submitted for the cancelled entry. (Ported from radeon commit 4693b1bd5b5c381e8b7b68a6f7f0c6696d6a68df) Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
2016-03-25Require xserver 1.9 or newerMichel Dänzer
1.9.0 was released in August 2010. We were already unintentionally relying on things not available in 1.8 for at least a year, and nobody has complained. (Ported from radeon commit e592f32f8b5f5873fcc18b10a69dd5e4ccf11073) Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
2016-03-25Don't try DRI2/Present flipping while the HW cursor can't be usedMichel Dänzer
Flipping doesn't interact correctly with SW cursor: A flip makes the SW cursor disappear. It will only appear again when the cursor is moved, but it will be surrounded by corruption, because the SW cursor code will restore stale screen contents at the old cursor location before drawing the cursor at the new location. (Ported from radeon commit 7f3d0780ca65a90117c2a61362dbc0899bd9c0b0) Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
2016-03-23Make DRM event queue xf86CrtcPtr based instead of ScrnInfoPtr basedMichel Dänzer
This allows for a minor simplification of the code. (Ported from radeon commit f5d968cbba3c9b7ec202161f2157d8d64778c817) Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
2016-03-23DRI2: Also clear dri2_flipping when client disconnects before eventMichel Dänzer
Fixes the following problem: With DRI3 enabled, run glxgears with LIBGL_DRI3_DISABLE=1, make it fullscreen and press Escape while it's still fullscreen. This could result in dri2_flipping not getting cleared, spuriously preventing apps using DRI3 from flipping. (Ported from radeon commit e87365117acbd80b7d80fbb5eb30890ef7153291) Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
2016-02-27DRI2: Use amdgpu_pixmap_get_handleMichel Dänzer
Now we can share pixmaps with no struct amdgpu_buffer via DRI2. Fixes VDPAU video playback freezing when using an OpenGL compositor with DRI3 enabled and mpv VAAPI hardware decoding with OpenGL output. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=89755 Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=93804 (ported from radeon commit f8b0f23e9f4af9f9097ee5e72d53b45173163c41) Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
2016-02-27glamor: Avoid generating GEM flink names for BOs shared via DRI3 (v2)Michel Dänzer
We can't create our own struct amdgpu_buffer representation in this case because destroying that would make the GEM handle inaccessible to glamor as well. So just get the handle directly via dma-buf. (ported from radeon commit 391900a670addec39515f924265bfa9f8bfa9ec0, extended to cache BO handles in the private for non-DRI3 pixmaps as well) v2: Swap whole pixmap privates instead of just BOs in amdgpu_dri2_exchange_buffers to avoid invalidating cached BO handles Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
2016-02-27Make amdgpu_do_pageflip take a pixmap instead of a BOMichel Dänzer
(inspired by radeon commit 7b4fc4a677d252d01c2bf80d162bc35814059eaa) Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
2015-11-11dri2: Handle PRIME for source buffer as well in amdgpu_dri2_copy_region2Michel Dänzer
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=77810 (ported from radeon commit c84230d686c078aac1dc98d82153f8b02521b2e1) Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
2015-10-30Remove info->dri2.drm_fd and info->drmmode->fdMichel Dänzer
Use pAMDGPUEnt->fd everywhere instead. Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
2015-10-15Clean up amdgpu_dri2_create_buffer2()Tom St Denis
Remove the depth_pixmap variable from the function and clear out any dead/odd behaviour that results. Signed-off-by: Tom St Denis <tom.stdenis@amd.com>
2015-10-06Don't attempt a DRI2/Present page flip while the other one is flippingTom St Denis
Based on radeon commit 49f5b0bc301414df049e00d226034e3d6e56421b Fixes corrupted display and hangs when switching between DRI2 and DRI3 fullscreen apps, e.g. a compositor using DRI3 and a fullscreen app using DRI2 or vice versa. Signed-off-by: Tom St Denis <tom.stdenis@amd.com> Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
2015-10-05stop caching mode resourcesTom St Denis
Based on radeon commit 32b003cb7657e07d5af6338ad44d768eda87fd33 > This is step one towards MST connector hotplug support, > it stop caching the mode resources structure, and > just passes a pointer to it around. With a few tweaks to match the state of the AMDGPU tree. Signed-off-by: Tom St Denis <tom.stdenis@amd.com> Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
2015-09-10dri2: Avoid calculation with undefined msc valueTom St Denis
If the get_msc() call fails for any reason we should avoid updating the vblank counter delta with undefined data. Signed-off-by: Tom St Denis <tom.stdenis@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Acked-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Michel Dänzer <michel.daenzer@amd.com> (minor fixups)
2015-08-14DRI2: Keep MSC monotonic when moving window between CRTCsMichel Dänzer
This mirrors the DRI3 implementation in xserver. Fixes VDPAU video playback hanging when moving the window between CRTCs. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=66384 Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
2015-07-09DRI2: Don't ignore rotated CRTCs in amdgpu_dri2_drawable_crtcMichel Dänzer
Waiting for vblank interrupts works fine with rotated CRTCs. The only case we can't handle with rotation is page flipping, which is handled in can_exchange(). This fixes gnome-shell hanging on rotation, probably because amdgpu_dri2_get_msc returned MSC/UST 0 for rotated CRTCs. Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
2015-06-15glamor: Remove the stride member of struct radeon_pixmapMichel Dänzer
Its value was always the same as that of the PixmapRec devKind member. (Cherry picked from radeon commit ed401f5b4f07375db17ff05e294907ec95fc946d) Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
2015-06-15glamor: Add Option "ShadowPrimary"Michel Dänzer
When this option is enabled, most pixmaps (including the screen pixmap) are allocated in system RAM and mostly accessed by the CPU. Changed areas of the screen pixmap are copied to dedicated per-CRTC scanout pixmaps regularly, triggered by the vblank interrupt. (Cherry picked from radeon commits ae92d1765fa370a8d94c2856ad6c45d273ec3c69 and 1af044d7eee211fd4b248c236280274a68334da5) [ Michel Dänzer: Additional adjustements for the amdgpu driver ] Signed-off-by: Darren Powell <darren.powell@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
2015-06-08DRI2: Split out helper for getting UST and MSC of a specific CRTCMichel Dänzer
(Cherry picked from radeon commits 76c2923ac5c7230a8b2f9f8329c308d28b44d9c0 and d7c82731a8bf3d381bc571b94d80d9bb2dd6e40d) Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
2015-06-08DRI2: Use helper functions for DRM event queue managementMichel Dänzer
This is mostly in preparation for Present support, but it also simplifies the DRI2 specific code a little. (Cherry picked from radeon commit 6c3a721cde9317233072b573f9502348dcd21b16) Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
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