diff options
author | Ville Syrjälä <ville.syrjala@linux.intel.com> | 2017-06-09 03:26:44 +0300 |
---|---|---|
committer | Chris Wilson <chris@chris-wilson.co.uk> | 2017-09-27 19:00:55 +0100 |
commit | 4322c978f8ab469966b0efc6d3db2eb10b357e1e (patch) | |
tree | 30eb5458db35c998d89561899897154ade9c7981 /src | |
parent | 0a3d4a1a20186d2eaa0d5cc1b7db47eb1e44be71 (diff) |
sna/video: Add NV12 shaders
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Diffstat (limited to 'src')
-rw-r--r-- | src/render_program/Makefile.am | 12 | ||||
-rw-r--r-- | src/render_program/exa_wm_sample_nv12.g4i | 66 | ||||
-rw-r--r-- | src/render_program/exa_wm_src_sample_nv12.g4a | 32 | ||||
l--------- | src/render_program/exa_wm_src_sample_nv12.g5a | 1 | ||||
l--------- | src/render_program/exa_wm_src_sample_nv12.g6a | 1 | ||||
-rw-r--r-- | src/render_program/exa_wm_src_sample_nv12.g7a | 38 | ||||
l--------- | src/render_program/exa_wm_src_sample_nv12.g8a | 1 |
7 files changed, 151 insertions, 0 deletions
diff --git a/src/render_program/Makefile.am b/src/render_program/Makefile.am index 67a74ad8..7b835e1a 100644 --- a/src/render_program/Makefile.am +++ b/src/render_program/Makefile.am @@ -5,6 +5,7 @@ INTEL_G4A = \ exa_wm_src_projective.g4a \ exa_wm_src_sample_argb.g4a \ exa_wm_src_sample_a.g4a \ + exa_wm_src_sample_nv12.g4a \ exa_wm_src_sample_planar.g4a \ exa_wm_mask_affine.g4a \ exa_wm_mask_projective.g4a \ @@ -22,6 +23,7 @@ INTEL_G4I = \ exa_wm.g4i \ exa_wm_affine.g4i \ exa_wm_projective.g4i \ + exa_wm_sample_nv12.g4i \ exa_wm_sample_planar.g4i \ exa_wm_src_sample_argb.g4i \ $(NULL) @@ -33,6 +35,7 @@ INTEL_G4B = \ exa_wm_src_projective.g4b \ exa_wm_src_sample_argb.g4b \ exa_wm_src_sample_a.g4b \ + exa_wm_src_sample_nv12.g4b \ exa_wm_src_sample_planar.g4b \ exa_wm_mask_affine.g4b \ exa_wm_mask_projective.g4b \ @@ -54,6 +57,7 @@ INTEL_G4B_GEN5 = \ exa_wm_src_projective.g4b.gen5 \ exa_wm_src_sample_argb.g4b.gen5 \ exa_wm_src_sample_a.g4b.gen5 \ + exa_wm_src_sample_nv12.g4b.gen5 \ exa_wm_src_sample_planar.g4b.gen5 \ exa_wm_mask_affine.g4b.gen5 \ exa_wm_mask_projective.g4b.gen5 \ @@ -74,6 +78,7 @@ INTEL_G5A = \ exa_wm_src_projective.g5a \ exa_wm_src_sample_argb.g5a \ exa_wm_src_sample_a.g5a \ + exa_wm_src_sample_nv12.g5a \ exa_wm_src_sample_planar.g5a \ exa_wm_mask_affine.g5a \ exa_wm_mask_projective.g5a \ @@ -94,6 +99,7 @@ INTEL_G5B = \ exa_wm_src_projective.g5b \ exa_wm_src_sample_argb.g5b \ exa_wm_src_sample_a.g5b \ + exa_wm_src_sample_nv12.g5b \ exa_wm_src_sample_planar.g5b \ exa_wm_mask_affine.g5b \ exa_wm_mask_projective.g5b \ @@ -116,6 +122,7 @@ INTEL_G6A = \ exa_wm_src_affine.g6a \ exa_wm_src_projective.g6a \ exa_wm_src_sample_argb.g6a \ + exa_wm_src_sample_nv12.g6a \ exa_wm_src_sample_planar.g6a \ exa_wm_src_sample_a.g6a \ exa_wm_mask_affine.g6a \ @@ -133,6 +140,7 @@ INTEL_G6B = \ exa_wm_src_affine.g6b \ exa_wm_src_projective.g6b \ exa_wm_src_sample_argb.g6b \ + exa_wm_src_sample_nv12.g6b \ exa_wm_src_sample_planar.g6b \ exa_wm_src_sample_a.g6b \ exa_wm_mask_affine.g6b \ @@ -155,6 +163,7 @@ INTEL_G7A = \ exa_wm_src_projective.g7a \ exa_wm_src_sample_a.g7a \ exa_wm_src_sample_argb.g7a \ + exa_wm_src_sample_nv12.g7a \ exa_wm_src_sample_planar.g7a \ exa_wm_write.g7a \ exa_wm_yuv_rgb.g7a \ @@ -169,6 +178,7 @@ INTEL_G7B = \ exa_wm_src_projective.g7b \ exa_wm_src_sample_a.g7b \ exa_wm_src_sample_argb.g7b \ + exa_wm_src_sample_nv12.g7b \ exa_wm_src_sample_planar.g7b \ exa_wm_write.g7b \ exa_wm_yuv_rgb.g7b \ @@ -177,6 +187,7 @@ INTEL_G7B = \ INTEL_G8A = \ exa_wm_src_affine.g8a \ exa_wm_src_sample_argb.g8a \ + exa_wm_src_sample_nv12.g8a \ exa_wm_src_sample_planar.g8a \ exa_wm_write.g8a \ exa_wm_yuv_rgb.g8a \ @@ -185,6 +196,7 @@ INTEL_G8A = \ INTEL_G8B = \ exa_wm_src_affine.g8b \ exa_wm_src_sample_argb.g8b \ + exa_wm_src_sample_nv12.g8b \ exa_wm_src_sample_planar.g8b \ exa_wm_write.g8b \ exa_wm_yuv_rgb.g8b \ diff --git a/src/render_program/exa_wm_sample_nv12.g4i b/src/render_program/exa_wm_sample_nv12.g4i new file mode 100644 index 00000000..28ebb8df --- /dev/null +++ b/src/render_program/exa_wm_sample_nv12.g4i @@ -0,0 +1,66 @@ +/* + * Copyright © 2006 Intel Corporation + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice (including the next + * paragraph) shall be included in all copies or substantial portions of the + * Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS + * IN THE SOFTWARE. + * + * Authors: + * Wang Zhenyu <zhenyu.z.wang@intel.com> + * Keith Packard <keithp@keithp.com> + */ + +/* Sample the src surface in planar format */ + +/* prepare sampler read back gX register, which would be written back to output */ + +/* use simd16 sampler, param 0 is u, param 1 is v. */ +/* 'payload' loading, assuming tex coord start from g4 */ + +/* load rg */ +mov (1) g0.8<1>UD 0x0000c000UD { align1 mask_disable }; + +/* src_msg will be copied with g0, as it contains send desc */ +/* emit sampler 'send' cmd */ + +/* Sample CbCr */ +mov (8) src_msg<1>UD g0<8,8,1>UD { align1 }; /* copy to msg start reg*/ +send (16) src_msg_ind /* msg reg index */ + src_sample_b<1>UW /* readback */ + null + sampler (3,0,F) /* sampler message description, (binding_table,sampler_index,datatype) + /* here(src->dst) we should use src_sampler and src_surface */ + mlen 5 rlen 4 { align1 }; /* required message len 5, readback len 4 */ + +/* Move Cr to its proper place */ +mov (16) src_sample_r<1>UD src_sample_a<8,8,1>UD { align1 }; + +/* load r */ +mov (1) g0.8<1>UD 0x0000e000UD { align1 mask_disable }; + +/* src_msg will be copied with g0, as it contains send desc */ +/* emit sampler 'send' cmd */ + +/* Sample Y */ +mov (8) src_msg<1>UD g0<8,8,1>UD { align1 }; /* copy to msg start reg*/ +send (16) src_msg_ind /* msg reg index */ + src_sample_g<1>UW /* readback */ + null + sampler (1,0,F) /* sampler message description, (binding_table,sampler_index,datatype) + /* here(src->dst) we should use src_sampler and src_surface */ + mlen 5 rlen 2 { align1 }; /* required message len 5, readback len 2 */ diff --git a/src/render_program/exa_wm_src_sample_nv12.g4a b/src/render_program/exa_wm_src_sample_nv12.g4a new file mode 100644 index 00000000..84677588 --- /dev/null +++ b/src/render_program/exa_wm_src_sample_nv12.g4a @@ -0,0 +1,32 @@ +/* + * Copyright © 2006 Intel Corporation + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice (including the next + * paragraph) shall be included in all copies or substantial portions of the + * Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS + * IN THE SOFTWARE. + * + * Authors: + * Wang Zhenyu <zhenyu.z.wang@intel.com> + * Keith Packard <keithp@keithp.com> + */ + +/* Sample the src surface in planar format */ + +include(`exa_wm.g4i') + +include(`exa_wm_sample_nv12.g4i') diff --git a/src/render_program/exa_wm_src_sample_nv12.g5a b/src/render_program/exa_wm_src_sample_nv12.g5a new file mode 120000 index 00000000..4f276b09 --- /dev/null +++ b/src/render_program/exa_wm_src_sample_nv12.g5a @@ -0,0 +1 @@ +exa_wm_src_sample_nv12.g4a
\ No newline at end of file diff --git a/src/render_program/exa_wm_src_sample_nv12.g6a b/src/render_program/exa_wm_src_sample_nv12.g6a new file mode 120000 index 00000000..4f276b09 --- /dev/null +++ b/src/render_program/exa_wm_src_sample_nv12.g6a @@ -0,0 +1 @@ +exa_wm_src_sample_nv12.g4a
\ No newline at end of file diff --git a/src/render_program/exa_wm_src_sample_nv12.g7a b/src/render_program/exa_wm_src_sample_nv12.g7a new file mode 100644 index 00000000..873f880e --- /dev/null +++ b/src/render_program/exa_wm_src_sample_nv12.g7a @@ -0,0 +1,38 @@ +/* + * Copyright © 2006 Intel Corporation + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice (including the next + * paragraph) shall be included in all copies or substantial portions of the + * Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS + * IN THE SOFTWARE. + * + * Authors: + * Wang Zhenyu <zhenyu.z.wang@intel.com> + * Keith Packard <keithp@keithp.com> + */ + +/* Sample the src surface in planar format */ + +include(`exa_wm.g4i') + +undefine(`src_msg') +undefine(`src_msg_ind') + +define(`src_msg', `g65') +define(`src_msg_ind', `65') + +include(`exa_wm_sample_nv12.g4i') diff --git a/src/render_program/exa_wm_src_sample_nv12.g8a b/src/render_program/exa_wm_src_sample_nv12.g8a new file mode 120000 index 00000000..8d964a99 --- /dev/null +++ b/src/render_program/exa_wm_src_sample_nv12.g8a @@ -0,0 +1 @@ +exa_wm_src_sample_nv12.g7a
\ No newline at end of file |