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authorNiklas Hallqvist <niklas@cvs.openbsd.org>1997-01-24 19:58:34 +0000
committerNiklas Hallqvist <niklas@cvs.openbsd.org>1997-01-24 19:58:34 +0000
commit0ef244d8476654749f2eaf9441dc06b2fd4d4f7b (patch)
tree270851bce850e6dddd96484e78fa648cb8bec296 /sys/arch/alpha/pci/cia_bus_mem.c
parenta77b8c21d70779c5365903c1f86d3c3126549212 (diff)
Sync with NetBSD 961207
Diffstat (limited to 'sys/arch/alpha/pci/cia_bus_mem.c')
-rw-r--r--sys/arch/alpha/pci/cia_bus_mem.c52
1 files changed, 28 insertions, 24 deletions
diff --git a/sys/arch/alpha/pci/cia_bus_mem.c b/sys/arch/alpha/pci/cia_bus_mem.c
index e69819e946f..38b5956e659 100644
--- a/sys/arch/alpha/pci/cia_bus_mem.c
+++ b/sys/arch/alpha/pci/cia_bus_mem.c
@@ -1,5 +1,5 @@
-/* $OpenBSD: cia_bus_mem.c,v 1.5 1996/12/08 00:20:36 niklas Exp $ */
-/* $NetBSD: cia_bus_mem.c,v 1.5 1996/08/27 16:29:26 cgd Exp $ */
+/* $OpenBSD: cia_bus_mem.c,v 1.6 1997/01/24 19:57:38 niklas Exp $ */
+/* $NetBSD: cia_bus_mem.c,v 1.7 1996/11/25 03:46:09 cgd Exp $ */
/*
* Copyright (c) 1996 Carnegie-Mellon University.
@@ -42,40 +42,44 @@
#define CHIP cia
+#define CHIP_EX_MALLOC_SAFE(v) (((struct cia_config *)(v))->cc_mallocsafe)
+#define CHIP_D_MEM_EXTENT(v) (((struct cia_config *)(v))->cc_d_mem_ex)
+#define CHIP_S_MEM_EXTENT(v) (((struct cia_config *)(v))->cc_s_mem_ex)
+
/* Dense region 1 */
-#define CHIP_D_MEM_W1_START(v) 0x00000000
-#define CHIP_D_MEM_W1_END(v) 0xffffffff
-#define CHIP_D_MEM_W1_BASE(v) CIA_PCI_DENSE
-#define CHIP_D_MEM_W1_MASK(v) 0xffffffff
+#define CHIP_D_MEM_W1_BUS_START(v) 0x00000000UL
+#define CHIP_D_MEM_W1_BUS_END(v) 0xffffffffUL
+#define CHIP_D_MEM_W1_SYS_START(v) CIA_PCI_DENSE
+#define CHIP_D_MEM_W1_SYS_END(v) (CIA_PCI_DENSE + 0xffffffffUL)
/* Sparse region 1 */
-#define CHIP_S_MEM_W1_START(v) \
+#define CHIP_S_MEM_W1_BUS_START(v) \
HAE_MEM_REG1_START(((struct cia_config *)(v))->cc_hae_mem)
-#define CHIP_S_MEM_W1_END(v) \
- (CHIP_S_MEM_W1_START(v) + HAE_MEM_REG1_MASK)
-#define CHIP_S_MEM_W1_BASE(v) \
+#define CHIP_S_MEM_W1_BUS_END(v) \
+ (CHIP_S_MEM_W1_BUS_START(v) + HAE_MEM_REG1_MASK)
+#define CHIP_S_MEM_W1_SYS_START(v) \
CIA_PCI_SMEM1
-#define CHIP_S_MEM_W1_MASK(v) \
- HAE_MEM_REG1_MASK
+#define CHIP_S_MEM_W1_SYS_END(v) \
+ (CIA_PCI_SMEM1 + ((HAE_MEM_REG1_MASK + 1) << 5) - 1)
/* Sparse region 2 */
-#define CHIP_S_MEM_W2_START(v) \
+#define CHIP_S_MEM_W2_BUS_START(v) \
HAE_MEM_REG2_START(((struct cia_config *)(v))->cc_hae_mem)
-#define CHIP_S_MEM_W2_END(v) \
- (CHIP_S_MEM_W2_START(v) + HAE_MEM_REG2_MASK)
-#define CHIP_S_MEM_W2_BASE(v) \
+#define CHIP_S_MEM_W2_BUS_END(v) \
+ (CHIP_S_MEM_W2_BUS_START(v) + HAE_MEM_REG2_MASK)
+#define CHIP_S_MEM_W2_SYS_START(v) \
CIA_PCI_SMEM2
-#define CHIP_S_MEM_W2_MASK(v) \
- HAE_MEM_REG2_MASK
+#define CHIP_S_MEM_W2_SYS_END(v) \
+ (CIA_PCI_SMEM2 + ((HAE_MEM_REG2_MASK + 1) << 5) - 1)
/* Sparse region 3 */
-#define CHIP_S_MEM_W3_START(v) \
+#define CHIP_S_MEM_W3_BUS_START(v) \
HAE_MEM_REG3_START(((struct cia_config *)(v))->cc_hae_mem)
-#define CHIP_S_MEM_W3_END(v) \
- (CHIP_S_MEM_W3_START(v) + HAE_MEM_REG3_MASK)
-#define CHIP_S_MEM_W3_BASE(v) \
+#define CHIP_S_MEM_W3_BUS_END(v) \
+ (CHIP_S_MEM_W3_BUS_START(v) + HAE_MEM_REG3_MASK)
+#define CHIP_S_MEM_W3_SYS_START(v) \
CIA_PCI_SMEM3
-#define CHIP_S_MEM_W3_MASK(v) \
- HAE_MEM_REG3_MASK
+#define CHIP_S_MEM_W3_SYS_END(v) \
+ (CIA_PCI_SMEM3 + ((HAE_MEM_REG3_MASK + 1) << 5) - 1)
#include "pcs_bus_mem_common.c"