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authorJonathan Gray <jsg@cvs.openbsd.org>2016-01-31 00:14:51 +0000
committerJonathan Gray <jsg@cvs.openbsd.org>2016-01-31 00:14:51 +0000
commitaae810b19e487a3f73ce2fc1d6e12f92ac70dc90 (patch)
treeadb359947319ac3e39736814d2031f40b8a3655b /sys/arch/arm/xscale/i80321_intr.c
parenta03f045f48a39ba65b737268a8092c97eb0d9f87 (diff)
Switch from PSR_X_bit and X32_bit PSR macro names to just PSR_X.
This matches FreeBSD and makes things a bit more consistent. Discussed with Patrick.
Diffstat (limited to 'sys/arch/arm/xscale/i80321_intr.c')
-rw-r--r--sys/arch/arm/xscale/i80321_intr.c20
1 files changed, 10 insertions, 10 deletions
diff --git a/sys/arch/arm/xscale/i80321_intr.c b/sys/arch/arm/xscale/i80321_intr.c
index 0f829563f6d..d77944d6891 100644
--- a/sys/arch/arm/xscale/i80321_intr.c
+++ b/sys/arch/arm/xscale/i80321_intr.c
@@ -1,4 +1,4 @@
-/* $OpenBSD: i80321_intr.c,v 1.16 2014/04/03 10:17:34 mpi Exp $ */
+/* $OpenBSD: i80321_intr.c,v 1.17 2016/01/31 00:14:50 jsg Exp $ */
/*
* Copyright (c) 2006 Dale Rahn <drahn@openbsd.org>
@@ -104,7 +104,7 @@ i80321intc_setipl(int new)
{
int psw;
- psw = disable_interrupts(I32_bit);
+ psw = disable_interrupts(PSR_I);
current_ipl_level = new;
i80321intc_write_intctl(i80321intc_imask[new]);
restore_interrupts(psw);
@@ -177,7 +177,7 @@ i80321intc_do_pending(void)
static int processing = 0;
int oldirqstate, spl_save;
- oldirqstate = disable_interrupts(I32_bit);
+ oldirqstate = disable_interrupts(PSR_I);
spl_save = current_ipl_level;
@@ -194,7 +194,7 @@ i80321intc_do_pending(void)
i80321intc_setipl(ipl); \
restore_interrupts(oldirqstate); \
softintr_dispatch(si); \
- oldirqstate = disable_interrupts(I32_bit); \
+ oldirqstate = disable_interrupts(PSR_I); \
i80321intc_setipl(spl_save); \
}
@@ -253,7 +253,7 @@ _setsoftintr(int si)
{
int oldirqstate;
- oldirqstate = disable_interrupts(I32_bit);
+ oldirqstate = disable_interrupts(PSR_I);
softint_pending |= SI_TO_IRQBIT(si);
restore_interrupts(oldirqstate);
@@ -296,7 +296,7 @@ i80321intc_init(void)
i80321intc_calc_mask();
/* Enable IRQs (don't yet use FIQs). */
- enable_interrupts(I32_bit);
+ enable_interrupts(PSR_I);
}
void *
@@ -328,7 +328,7 @@ i80321_intr_establish(int irq, int ipl, int (*func)(void *), void *arg,
/* All IOP321 interrupts are level-triggered. */
iq->iq_ist = IST_LEVEL;
- oldirqstate = disable_interrupts(I32_bit);
+ oldirqstate = disable_interrupts(PSR_I);
TAILQ_INSERT_TAIL(&iq->iq_list, ih, ih_list);
@@ -347,7 +347,7 @@ i80321_intr_disestablish(void *cookie)
struct intrq *iq = &i80321_handler[ih->ih_irq];
int oldirqstate;
- oldirqstate = disable_interrupts(I32_bit);
+ oldirqstate = disable_interrupts(PSR_I);
TAILQ_REMOVE(&iq->iq_list, ih, ih_list);
if (ih->ih_name != NULL)
@@ -380,14 +380,14 @@ i80321_irq_handler(void *arg)
i80321intc_setipl(i80321_handler[irq].iq_irq);
/* Enable interrupt */
- enable_interrupts(I32_bit);
+ enable_interrupts(PSR_I);
TAILQ_FOREACH(ih, &i80321_handler[irq].iq_list, ih_list) {
if ((ih->ih_func)( ih->ih_arg == 0
? frame : ih->ih_arg))
ih->ih_count.ec_count++;
}
/* Disable interrupt */
- disable_interrupts(I32_bit);
+ disable_interrupts(PSR_I);
hwpend &= ~(1<<irq);
}
uvmexp.intrs++;