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authorClaudio Jeker <claudio@cvs.openbsd.org>2009-06-03 17:39:45 +0000
committerClaudio Jeker <claudio@cvs.openbsd.org>2009-06-03 17:39:45 +0000
commitaf667a04b5b4a1b58339d002876674c313ca3833 (patch)
tree03f035d26db9126dd48920e7c8bcd94d9564f609 /sys/dev/pci/if_em_hw.h
parentef16014177c441207970b076d98ee204b43e5af2 (diff)
Add support for the newer 82575 and maybe 82576 chips. The cards work more
or less out of the box if one explicitly enables the TX DMA engine. Only tested with 82575, people with 82576 cards may contact me for a diff. OK kettenis@
Diffstat (limited to 'sys/dev/pci/if_em_hw.h')
-rw-r--r--sys/dev/pci/if_em_hw.h9
1 files changed, 7 insertions, 2 deletions
diff --git a/sys/dev/pci/if_em_hw.h b/sys/dev/pci/if_em_hw.h
index ed75d9ca9e6..c0ac5ab857e 100644
--- a/sys/dev/pci/if_em_hw.h
+++ b/sys/dev/pci/if_em_hw.h
@@ -31,7 +31,7 @@
*******************************************************************************/
-/* $OpenBSD: if_em_hw.h,v 1.27 2008/08/28 01:17:29 brad Exp $ */
+/* $OpenBSD: if_em_hw.h,v 1.28 2009/06/03 17:39:44 claudio Exp $ */
/* $FreeBSD: if_em_hw.h,v 1.15 2005/05/26 23:32:02 tackerman Exp $ */
/* if_em_hw.h
@@ -67,6 +67,7 @@ typedef enum {
em_82571,
em_82572,
em_82573,
+ em_82575,
em_80003es2lan,
em_ich8lan,
em_ich9lan,
@@ -509,6 +510,8 @@ int32_t em_check_phy_reset_block(struct em_hw *hw);
#define E1000_DEV_ID_ICH10_R_BM_V 0x10CE
#define E1000_DEV_ID_ICH10_D_BM_LM 0x10DE
#define E1000_DEV_ID_ICH10_D_BM_LF 0x10DF
+#define E1000_DEV_ID_82575EB_PT 0x10A7
+#define E1000_DEV_ID_82575EB_PF 0x10A9
#define NODE_ADDRESS_SIZE 6
#define ETH_LENGTH_OF_ADDRESS 6
@@ -971,7 +974,7 @@ struct em_ffvt_entry {
#define E1000_TDBAH 0x03804 /* TX Descriptor Base Address High - RW */
#define E1000_TDLEN 0x03808 /* TX Descriptor Length - RW */
#define E1000_TDH 0x03810 /* TX Descriptor Head - RW */
-#define E1000_TDT 0x03818 /* TX Descripotr Tail - RW */
+#define E1000_TDT 0x03818 /* TX Descriptor Tail - RW */
#define E1000_TIDV 0x03820 /* TX Interrupt Delay Value - RW */
#define E1000_TXDCTL 0x03828 /* TX Descriptor Control - RW */
#define E1000_TADV 0x0382C /* TX Interrupt Absolute Delay Val - RW */
@@ -1989,6 +1992,8 @@ struct em_hw {
#define E1000_TXDCTL_FULL_TX_DESC_WB 0x01010000 /* GRAN=1, WTHRESH=1 */
#define E1000_TXDCTL_COUNT_DESC 0x00400000 /* Enable the counting of desc.
still to be processed. */
+#define E1000_TXDCTL_QUEUE_ENABLE 0x02000000
+
/* Transmit Configuration Word */
#define E1000_TXCW_FD 0x00000020 /* TXCW full duplex */
#define E1000_TXCW_HD 0x00000040 /* TXCW half duplex */