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-rw-r--r--sys/arch/sparc/conf/GENERIC9
-rw-r--r--sys/arch/sparc/conf/RAMDISK9
-rw-r--r--sys/arch/sparc/conf/SUN4M9
-rw-r--r--sys/arch/sparc/conf/files.sparc13
-rw-r--r--sys/arch/sparc/dev/bt445.c98
-rw-r--r--sys/arch/sparc/dev/bt445reg.h53
-rw-r--r--sys/arch/sparc/dev/bt445var.h31
-rw-r--r--sys/arch/sparc/dev/p9000.c746
-rw-r--r--sys/arch/sparc/dev/p9100.c433
9 files changed, 1106 insertions, 295 deletions
diff --git a/sys/arch/sparc/conf/GENERIC b/sys/arch/sparc/conf/GENERIC
index c2fcda80f64..9f5b3244212 100644
--- a/sys/arch/sparc/conf/GENERIC
+++ b/sys/arch/sparc/conf/GENERIC
@@ -1,4 +1,4 @@
-# $OpenBSD: GENERIC,v 1.67 2003/05/14 06:39:49 miod Exp $
+# $OpenBSD: GENERIC,v 1.68 2003/06/17 21:21:31 miod Exp $
# $NetBSD: GENERIC,v 1.48 1997/08/23 19:19:01 mjacob Exp $
# Machine architecture; required by config(8)
@@ -277,7 +277,12 @@ wsdisplay* at zx?
vigra* at sbus?
wsdisplay* at vigra?
-# Weitek p9100 found on Tadpole 3GS/3GX
+# Weitex P9000 found on Tadpole SPARCbook 3, with external ``Chameleon'' RAMDAC
+p9k0 at sbus?
+btcham0 at obio?
+wsdisplay* at p9k?
+
+# Weitek P9100 found on Tadpole SPARCbook 3GS/3GX/3TX/3XP
pnozz0 at sbus?
wsdisplay* at pnozz?
diff --git a/sys/arch/sparc/conf/RAMDISK b/sys/arch/sparc/conf/RAMDISK
index c50f82ce805..3fd9bae9b95 100644
--- a/sys/arch/sparc/conf/RAMDISK
+++ b/sys/arch/sparc/conf/RAMDISK
@@ -1,4 +1,4 @@
-# $OpenBSD: RAMDISK,v 1.44 2003/05/25 21:55:44 miod Exp $
+# $OpenBSD: RAMDISK,v 1.45 2003/06/17 21:21:31 miod Exp $
# $NetBSD: GENERIC,v 1.28.2.1 1996/07/02 23:55:22 jtc Exp $
# Machine architecture; required by config(8)
@@ -271,7 +271,12 @@ wsdisplay* at zx?
vigra* at sbus?
wsdisplay* at vigra?
-# Weitek p9100 found on Tadpole 3GS/3GX
+# Weitex P9000 found on Tadpole SPARCbook 3, with external ``Chameleon'' RAMDAC
+p9k0 at sbus?
+btcham0 at obio?
+wsdisplay* at p9k?
+
+# Weitek P9100 found on Tadpole SPARCbook 3GS/3GX/3TX/3XP
pnozz0 at sbus?
wsdisplay* at pnozz?
diff --git a/sys/arch/sparc/conf/SUN4M b/sys/arch/sparc/conf/SUN4M
index d61de374eb5..3af3843f175 100644
--- a/sys/arch/sparc/conf/SUN4M
+++ b/sys/arch/sparc/conf/SUN4M
@@ -1,4 +1,4 @@
-# $OpenBSD: SUN4M,v 1.52 2003/05/14 06:39:49 miod Exp $
+# $OpenBSD: SUN4M,v 1.53 2003/06/17 21:21:31 miod Exp $
# $NetBSD: GENERIC,v 1.28.2.1 1996/07/02 23:55:22 jtc Exp $
# Machine architecture; required by config(8)
@@ -160,7 +160,12 @@ wsdisplay* at zx?
vigra* at sbus?
wsdisplay* at vigra?
-# Weitek p9100 found on Tadpole 3GS/3GX
+# Weitex P9000 found on Tadpole SPARCbook 3, with external ``Chameleon'' RAMDAC
+p9k0 at sbus?
+btcham0 at obio?
+wsdisplay* at p9k?
+
+# Weitek P9100 found on Tadpole SPARCbook 3GS/3GX/3TX/3XP
pnozz0 at sbus?
wsdisplay* at pnozz?
diff --git a/sys/arch/sparc/conf/files.sparc b/sys/arch/sparc/conf/files.sparc
index 1aebeea10b4..cbe58eb27d9 100644
--- a/sys/arch/sparc/conf/files.sparc
+++ b/sys/arch/sparc/conf/files.sparc
@@ -1,4 +1,4 @@
-# $OpenBSD: files.sparc,v 1.54 2003/05/15 04:13:14 miod Exp $
+# $OpenBSD: files.sparc,v 1.55 2003/06/17 21:21:31 miod Exp $
# $NetBSD: files.sparc,v 1.44 1997/08/31 21:29:16 pk Exp $
# @(#)files.sparc 8.1 (Berkeley) 7/19/93
@@ -190,7 +190,16 @@ device cgtwelve: wsemuldisplaydev, rasops1, rasops32, wsemul_sun
attach cgtwelve at sbus
file arch/sparc/dev/cgtwelve.c cgtwelve
-# Onboard Weitek p9100 found on Tadpole 3GS/3GX
+# Onboard Weitek P9000 found on Tadpole SPARCbook 3, and BT ``Chameleon'' RAMDAC
+device p9k: wsemuldisplaydev, rasops8, wsemul_sun, bt_dac
+attach p9k at sbus
+file arch/sparc/dev/p9000.c p9k
+
+device btcham
+attach btcham at obio
+file arch/sparc/dev/bt445.c btcham
+
+# Onboard Weitek p9100 found on Tadpole SPARCbook 3GS/3GX/3TX/3XP
device pnozz: wsemuldisplaydev, rasops8, rasops16, rasops24, rasops32, wsemul_sun, bt_dac
attach pnozz at sbus
file arch/sparc/dev/p9100.c pnozz
diff --git a/sys/arch/sparc/dev/bt445.c b/sys/arch/sparc/dev/bt445.c
new file mode 100644
index 00000000000..33859e2c9d6
--- /dev/null
+++ b/sys/arch/sparc/dev/bt445.c
@@ -0,0 +1,98 @@
+/* $OpenBSD: bt445.c,v 1.1 2003/06/17 21:21:31 miod Exp $ */
+/*
+ * Copyright (c) 2003, Miodrag Vallat.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+ * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/*
+ * A skeleton driver for the Brooktree BT445 ``Chameleon'' RAMDAC found
+ * on the early Tadpole SPARCbook 3 machines.
+ *
+ * It will not perform anything by itself, but frame buffer drivers can use
+ * its softc structure to be able to access the RAMDAC themselves - creating
+ * a ramdac API for just this specific case of separate attachments is not
+ * worth doing.
+ */
+
+#include <sys/param.h>
+#include <sys/systm.h>
+#include <sys/device.h>
+#include <sys/conf.h>
+
+#include <machine/autoconf.h>
+
+#include <sparc/dev/bt445reg.h>
+#include <sparc/dev/bt445var.h>
+
+void btcham_attach(struct device *, struct device *, void *);
+int btcham_match(struct device *, void *, void *);
+
+struct cfattach btcham_ca = {
+ sizeof(struct bt445_softc), btcham_match, btcham_attach
+};
+
+struct cfdriver btcham_cd = {
+ NULL, "btcham", DV_DULL
+};
+
+/*
+ * Match a chameleon
+ */
+int
+btcham_match(struct device *parent, void *vcf, void *aux)
+{
+ struct confargs *ca = aux;
+ struct romaux *ra = &ca->ca_ra;
+
+ if (strcmp("bt445", ra->ra_name) != 0)
+ return (0);
+
+ return (1);
+}
+
+/*
+ * Attach a chameleon
+ */
+void
+btcham_attach(struct device *parent, struct device *self, void *args)
+{
+ struct confargs *ca = args;
+ struct bt445_softc *sc = (struct bt445_softc *)self;
+ int id, rev;
+
+ /*
+ * Map the registers
+ */
+ sc->sc_regs = mapiodev(ca->ca_ra.ra_reg, 0, ca->ca_ra.ra_len);
+
+ /*
+ * Report a few values to please the user.
+ */
+ sc->sc_regs[BT445_ADDRESS] = BT445_REGISTER_OFFSET(BT445_ID);
+ id = sc->sc_regs[BT445_REGISTER_INDEX(BT445_ID)];
+
+ sc->sc_regs[BT445_ADDRESS] = BT445_REGISTER_OFFSET(BT445_ID);
+ rev = sc->sc_regs[BT445_REGISTER_INDEX(BT445_ID)];
+
+ printf(": id 0x%x, revision 0x%x\n", id, rev);
+}
diff --git a/sys/arch/sparc/dev/bt445reg.h b/sys/arch/sparc/dev/bt445reg.h
new file mode 100644
index 00000000000..ed6b4079c8f
--- /dev/null
+++ b/sys/arch/sparc/dev/bt445reg.h
@@ -0,0 +1,53 @@
+/* $OpenBSD: bt445reg.h,v 1.1 2003/06/17 21:21:31 miod Exp $ */
+/*
+ * Copyright (c) 2003, Miodrag Vallat.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+ * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/*
+ * Actual BT445 register layout
+ */
+
+/* Read/write address */
+#define BT445_ADDRESS 0
+
+/*
+ * Access to a register is done by programming the address register with
+ * the low 8 bits, and then reading or writing at the register pointed out
+ * by the high 8 bits.
+ */
+#define BT445_REGISTER_OFFSET(x) ((x) & 0xff)
+#define BT445_REGISTER_INDEX(x) (((x) >> 8) & 0xff)
+
+/* Palette data - 3 r/w cycles par address, and autoincrement */
+#define BT445_PALDATA 1
+
+/* Overlay palette data - 3 r/w cycles par address, and autoincrement */
+#define BT445_OVPALDATA 3
+
+/*
+ * Various registers (very incomplete...)
+ */
+#define BT445_ID 0x0200
+#define BT445_REVISION 0x0201
+
diff --git a/sys/arch/sparc/dev/bt445var.h b/sys/arch/sparc/dev/bt445var.h
new file mode 100644
index 00000000000..956587c9956
--- /dev/null
+++ b/sys/arch/sparc/dev/bt445var.h
@@ -0,0 +1,31 @@
+/* $OpenBSD: bt445var.h,v 1.1 2003/06/17 21:21:31 miod Exp $ */
+/*
+ * Copyright (c) 2003, Miodrag Vallat.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+ * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ */
+
+struct bt445_softc {
+ struct device sc_dev;
+
+ volatile u_int8_t *sc_regs; /* RAMDAC registers */
+};
diff --git a/sys/arch/sparc/dev/p9000.c b/sys/arch/sparc/dev/p9000.c
new file mode 100644
index 00000000000..50cd26d3227
--- /dev/null
+++ b/sys/arch/sparc/dev/p9000.c
@@ -0,0 +1,746 @@
+/* $OpenBSD: p9000.c,v 1.1 2003/06/17 21:21:32 miod Exp $ */
+/*
+ * Copyright (c) 2003, Miodrag Vallat.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+ * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/*
+ * Driver for the Tadpole SPARCbook 3 on-board display.
+ * Heavily based on the p9100 driver.
+ */
+
+#include <sys/param.h>
+#include <sys/systm.h>
+#include <sys/buf.h>
+#include <sys/device.h>
+#include <sys/ioctl.h>
+#include <sys/malloc.h>
+#include <sys/mman.h>
+#include <sys/tty.h>
+#include <sys/conf.h>
+
+#include <uvm/uvm_extern.h>
+
+#include <machine/autoconf.h>
+#include <machine/pmap.h>
+#include <machine/cpu.h>
+#include <machine/conf.h>
+
+#include <dev/wscons/wsconsio.h>
+#include <dev/wscons/wsdisplayvar.h>
+#include <dev/wscons/wscons_raster.h>
+#include <dev/rasops/rasops.h>
+#include <machine/fbvar.h>
+
+#include <sparc/dev/btreg.h>
+#include <sparc/dev/btvar.h>
+#include <sparc/dev/bt445reg.h>
+#include <sparc/dev/bt445var.h>
+#include <sparc/dev/sbusvar.h>
+
+#include <dev/ic/p9000.h>
+
+#include "tctrl.h"
+#if NTCTRL > 0
+#include <sparc/dev/tctrlvar.h>
+#endif
+
+/* per-display variables */
+struct p9000_softc {
+ struct sunfb sc_sunfb; /* common base part */
+ struct sbusdev sc_sd; /* sbus device */
+ struct rom_reg sc_phys; /* phys address description */
+ volatile u_int8_t *sc_cmd; /* command registers (dac, etc) */
+ volatile u_int8_t *sc_ctl; /* control registers (draw engine) */
+ union bt_cmap sc_cmap; /* Brooktree color map */
+ volatile u_int8_t *sc_ramdac; /* BT445 registers */
+ struct intrhand sc_ih;
+ int sc_nscreens;
+ u_int32_t sc_junk; /* throwaway value */
+};
+
+struct wsscreen_descr p9000_stdscreen = {
+ "std",
+};
+
+const struct wsscreen_descr *p9000_scrlist[] = {
+ &p9000_stdscreen,
+};
+
+struct wsscreen_list p9000_screenlist = {
+ sizeof(p9000_scrlist) / sizeof(struct wsscreen_descr *),
+ p9000_scrlist
+};
+
+int p9000_ioctl(void *, u_long, caddr_t, int, struct proc *);
+int p9000_alloc_screen(void *, const struct wsscreen_descr *, void **,
+ int *, int *, long *);
+void p9000_free_screen(void *, void *);
+int p9000_show_screen(void *, void *, int, void (*cb)(void *, int, int),
+ void *);
+paddr_t p9000_mmap(void *, off_t, int);
+static __inline__ void p9000_loadcmap_deferred(struct p9000_softc *,
+ u_int, u_int);
+void p9000_loadcmap_immediate(struct p9000_softc *, u_int, u_int);
+void p9000_setcolor(void *, u_int, u_int8_t, u_int8_t, u_int8_t);
+void p9000_burner(void *, u_int, u_int);
+int p9000_intr(void *);
+
+struct wsdisplay_accessops p9000_accessops = {
+ p9000_ioctl,
+ p9000_mmap,
+ p9000_alloc_screen,
+ p9000_free_screen,
+ p9000_show_screen,
+ NULL, /* load_font */
+ NULL, /* scrollback */
+ NULL, /* getchar */
+ p9000_burner,
+};
+
+void p9000_ras_init(struct p9000_softc *);
+void p9000_ras_copycols(void *, int, int, int, int);
+void p9000_ras_copyrows(void *, int, int, int);
+void p9000_ras_do_cursor(struct rasops_info *);
+void p9000_ras_erasecols(void *, int, int, int, long int);
+void p9000_ras_eraserows(void *, int, int, long int);
+
+int p9000match(struct device *, void *, void *);
+void p9000attach(struct device *, struct device *, void *);
+
+struct cfattach p9k_ca = {
+ sizeof (struct p9000_softc), p9000match, p9000attach
+};
+
+struct cfdriver p9k_cd = {
+ NULL, "p9k", DV_DULL
+};
+
+/*
+ * SBus registers mappings
+ */
+#define P9000_NREG 5 /* actually, 7 total */
+#define P9000_REG_CTL 0
+#define P9000_REG_CMD 1
+#define P9000_REG_VRAM 4
+
+/*
+ * P9000 read/write macros
+ */
+
+#define P9000_READ_CTL(sc,reg) \
+ *(volatile u_int32_t *)((sc)->sc_ctl + (reg))
+#define P9000_READ_CMD(sc,reg) \
+ *(volatile u_int32_t *)((sc)->sc_cmd + (reg))
+
+#define P9000_WRITE_CTL(sc,reg,value) \
+ *(volatile u_int32_t *)((sc)->sc_ctl + (reg)) = (value)
+#define P9000_WRITE_CMD(sc,reg,value) \
+ *(volatile u_int32_t *)((sc)->sc_cmd + (reg)) = (value)
+
+/*
+ * On the Tadpole, the first write to a register group is ignored until
+ * the proper group address is latched, which can be done by reading from the
+ * register group first.
+ *
+ * Register groups are 0x80 bytes long (i.e. it is necessary to force a read
+ * when writing to an adress which upper 25 bit differ from the previous
+ * read or write operation).
+ *
+ * This is specific to the Tadpole design, and not a limitation of the
+ * Power 9000 hardware.
+ */
+#define P9000_SELECT_SCR(sc) \
+ (sc)->sc_junk = P9000_READ_CTL(sc, P9000_SYSTEM_CONFIG)
+#define P9000_SELECT_VCR(sc) \
+ (sc)->sc_junk = P9000_READ_CTL(sc, P9000_HCR)
+#define P9000_SELECT_VRAM(sc) \
+ (sc)->sc_junk = P9000_READ_CTL(sc, P9000_MCR)
+#define P9000_SELECT_PE(sc) \
+ (sc)->sc_junk = P9000_READ_CMD(sc, P9000_PE_STATUS)
+#define P9000_SELECT_DE_LOW(sc) \
+ (sc)->sc_junk = P9000_READ_CMD(sc, P9000_DE_FG_COLOR)
+#define P9000_SELECT_DE_HIGH(sc) \
+ (sc)->sc_junk = P9000_READ_CMD(sc, P9000_DE_PATTERN(0))
+#define P9000_SELECT_COORD(sc,field) \
+ (sc)->sc_junk = P9000_READ_CMD(sc, field)
+
+
+int
+p9000match(struct device *parent, void *vcf, void *aux)
+{
+ struct confargs *ca = aux;
+ struct romaux *ra = &ca->ca_ra;
+
+ if (strcmp("p9000", ra->ra_name))
+ return (0);
+
+ return (1);
+}
+
+void
+p9000attach(struct device *parent, struct device *self, void *args)
+{
+ struct p9000_softc *sc = (struct p9000_softc *)self;
+ struct confargs *ca = args;
+ struct wsemuldisplaydev_attach_args waa;
+ int node, row, isconsole, scr;
+ struct device *btdev;
+ extern struct cfdriver btcham_cd;
+
+#ifdef DIAGNOSTIC
+ if (ca->ca_ra.ra_nreg < P9000_NREG) {
+ printf(": expected %d registers, got only %d\n",
+ P9000_NREG, ca->ca_ra.ra_nreg);
+ return;
+ }
+#endif
+
+ /*
+ * Find the RAMDAC device. It should have attached before, since it
+ * attaches at obio. If, for some reason, it did not, it's not worth
+ * going any further.
+ *
+ * We rely upon the PROM to properly initialize the RAMDAC in a safe
+ * mode.
+ */
+ btdev = btcham_cd.cd_ndevs != 0 ? btcham_cd.cd_devs[0] : NULL;
+ if (btdev != NULL)
+ sc->sc_ramdac = ((struct bt445_softc *)btdev)->sc_regs;
+
+ if (sc->sc_ramdac == NULL) {
+ printf(": bt445 did not attach previously\n");
+ return;
+ }
+
+ sc->sc_phys = ca->ca_ra.ra_reg[P9000_REG_VRAM];
+
+ sc->sc_ctl = mapiodev(&(ca->ca_ra.ra_reg[P9000_REG_CTL]), 0,
+ ca->ca_ra.ra_reg[0].rr_len);
+ sc->sc_cmd = mapiodev(&(ca->ca_ra.ra_reg[P9000_REG_CMD]), 0,
+ ca->ca_ra.ra_reg[1].rr_len);
+
+ node = ca->ca_ra.ra_node;
+ isconsole = node == fbnode;
+
+ fb_setsize(&sc->sc_sunfb, 8, 640, 480, node, ca->ca_bustype);
+ sc->sc_sunfb.sf_ro.ri_bits = mapiodev(&sc->sc_phys, 0,
+ round_page(sc->sc_sunfb.sf_fbsize));
+ sc->sc_sunfb.sf_ro.ri_hw = sc;
+
+ P9000_SELECT_SCR(sc);
+ scr = P9000_READ_CTL(sc, P9000_SYSTEM_CONFIG);
+
+ printf(": rev %x, %dx%d\n", scr & SCR_ID_MASK,
+ sc->sc_sunfb.sf_width, sc->sc_sunfb.sf_height);
+
+ sc->sc_ih.ih_fun = p9000_intr;
+ sc->sc_ih.ih_arg = sc;
+ intr_establish(ca->ca_ra.ra_intr[0].int_pri, &sc->sc_ih, IPL_FB);
+
+ /* Disable frame buffer interrupts */
+ P9000_SELECT_SCR(sc);
+ P9000_WRITE_CTL(sc, P9000_INTERRUPT_ENABLE, IER_MASTER_ENABLE | 0);
+
+ /*
+ * If the framebuffer width is under 1024x768, we will switch from the
+ * PROM font to the more adequate 8x16 font here.
+ * However, we need to adjust two things in this case:
+ * - the display row should be overrided from the current PROM metrics,
+ * to prevent us from overwriting the last few lines of text.
+ * - if the 80x34 screen would make a large margin appear around it,
+ * choose to clear the screen rather than keeping old prom output in
+ * the margins.
+ * XXX there should be a rasops "clear margins" feature
+ */
+ fbwscons_init(&sc->sc_sunfb,
+ isconsole && (sc->sc_sunfb.sf_width >= 1024));
+ fbwscons_setcolormap(&sc->sc_sunfb, p9000_setcolor);
+
+ /*
+ * Plug-in accelerated console operations.
+ */
+ sc->sc_sunfb.sf_ro.ri_ops.copycols = p9000_ras_copycols;
+ sc->sc_sunfb.sf_ro.ri_ops.copyrows = p9000_ras_copyrows;
+ sc->sc_sunfb.sf_ro.ri_ops.erasecols = p9000_ras_erasecols;
+ sc->sc_sunfb.sf_ro.ri_ops.eraserows = p9000_ras_eraserows;
+ sc->sc_sunfb.sf_ro.ri_do_cursor = p9000_ras_do_cursor;
+ p9000_ras_init(sc);
+
+ p9000_stdscreen.capabilities = sc->sc_sunfb.sf_ro.ri_caps;
+ p9000_stdscreen.nrows = sc->sc_sunfb.sf_ro.ri_rows;
+ p9000_stdscreen.ncols = sc->sc_sunfb.sf_ro.ri_cols;
+ p9000_stdscreen.textops = &sc->sc_sunfb.sf_ro.ri_ops;
+
+ sbus_establish(&sc->sc_sd, &sc->sc_sunfb.sf_dev);
+
+ /* enable video */
+ p9000_burner(sc, 1, 0);
+
+ if (isconsole) {
+ if (sc->sc_sunfb.sf_width < 1024)
+ row = 0; /* screen has been cleared above */
+ else
+ row = -1;
+
+ fbwscons_console_init(&sc->sc_sunfb, &p9000_stdscreen, row,
+ p9000_burner);
+ }
+
+ waa.console = isconsole;
+ waa.scrdata = &p9000_screenlist;
+ waa.accessops = &p9000_accessops;
+ waa.accesscookie = sc;
+ config_found(self, &waa, wsemuldisplaydevprint);
+}
+
+int
+p9000_ioctl(void *v, u_long cmd, caddr_t data, int flags, struct proc *p)
+{
+ struct p9000_softc *sc = v;
+ struct wsdisplay_fbinfo *wdf;
+ struct wsdisplay_cmap *cm;
+#if NTCTRL > 0
+ struct wsdisplay_param *dp;
+#endif
+ int error;
+
+ switch (cmd) {
+
+ case WSDISPLAYIO_GTYPE:
+ *(u_int *)data = WSDISPLAY_TYPE_SB_P9000;
+ break;
+
+ case WSDISPLAYIO_SMODE:
+ /* Restore proper acceleration state upon leaving X11 */
+ if (*(u_int *)data == WSDISPLAYIO_MODE_EMUL) {
+ p9000_ras_init(sc);
+ }
+ break;
+
+ case WSDISPLAYIO_GINFO:
+ wdf = (struct wsdisplay_fbinfo *)data;
+ wdf->height = sc->sc_sunfb.sf_height;
+ wdf->width = sc->sc_sunfb.sf_width;
+ wdf->depth = sc->sc_sunfb.sf_depth;
+ wdf->cmsize = 256;
+ break;
+
+ case WSDISPLAYIO_LINEBYTES:
+ *(u_int *)data = sc->sc_sunfb.sf_linebytes;
+ break;
+
+ case WSDISPLAYIO_GETCMAP:
+ cm = (struct wsdisplay_cmap *)data;
+ error = bt_getcmap(&sc->sc_cmap, cm);
+ if (error)
+ return (error);
+ break;
+
+ case WSDISPLAYIO_PUTCMAP:
+ cm = (struct wsdisplay_cmap *)data;
+ error = bt_putcmap(&sc->sc_cmap, cm);
+ if (error)
+ return (error);
+ p9000_loadcmap_deferred(sc, cm->index, cm->count);
+ break;
+
+#if NTCTRL > 0
+ case WSDISPLAYIO_GETPARAM:
+ dp = (struct wsdisplay_param *)data;
+
+ switch (dp->param) {
+ case WSDISPLAYIO_PARAM_BRIGHTNESS:
+ dp->min = 0;
+ dp->max = 255;
+ dp->curval = tadpole_get_brightness();
+ break;
+ case WSDISPLAYIO_PARAM_BACKLIGHT:
+ dp->min = 0;
+ dp->max = 1;
+ dp->curval = tadpole_get_video();
+ break;
+ default:
+ return (-1);
+ }
+ break;
+
+ case WSDISPLAYIO_SETPARAM:
+ dp = (struct wsdisplay_param *)data;
+
+ switch (dp->param) {
+ case WSDISPLAYIO_PARAM_BRIGHTNESS:
+ tadpole_set_brightness(dp->curval);
+ break;
+ case WSDISPLAYIO_PARAM_BACKLIGHT:
+ tadpole_set_video(dp->curval);
+ break;
+ default:
+ return (-1);
+ }
+ break;
+#endif /* NTCTRL > 0 */
+
+ case WSDISPLAYIO_SVIDEO:
+ case WSDISPLAYIO_GVIDEO:
+ case WSDISPLAYIO_GCURPOS:
+ case WSDISPLAYIO_SCURPOS:
+ case WSDISPLAYIO_GCURMAX:
+ case WSDISPLAYIO_GCURSOR:
+ case WSDISPLAYIO_SCURSOR:
+ default:
+ return (-1); /* not supported yet */
+ }
+
+ return (0);
+}
+
+int
+p9000_alloc_screen(void *v, const struct wsscreen_descr *type, void **cookiep,
+ int *curxp, int *curyp, long *attrp)
+{
+ struct p9000_softc *sc = v;
+
+ if (sc->sc_nscreens > 0)
+ return (ENOMEM);
+
+ *cookiep = &sc->sc_sunfb.sf_ro;
+ *curyp = 0;
+ *curxp = 0;
+ sc->sc_sunfb.sf_ro.ri_ops.alloc_attr(&sc->sc_sunfb.sf_ro,
+ WSCOL_BLACK, WSCOL_WHITE, WSATTR_WSCOLORS, attrp);
+ sc->sc_nscreens++;
+ return (0);
+}
+
+void
+p9000_free_screen(void *v, void *cookie)
+{
+ struct p9000_softc *sc = v;
+
+ sc->sc_nscreens--;
+}
+
+int
+p9000_show_screen(void *v, void *cookie, int waitok,
+ void (*cb)(void *, int, int), void *cbarg)
+{
+ return (0);
+}
+
+/*
+ * Return the address that would map the given device at the given
+ * offset, allowing for the given protection, or return -1 for error.
+ */
+paddr_t
+p9000_mmap(void *v, off_t offset, int prot)
+{
+ struct p9000_softc *sc = v;
+
+ if (offset & PGOFSET)
+ return (-1);
+
+ if (offset >= 0 && offset < sc->sc_sunfb.sf_fbsize) {
+ return (REG2PHYS(&sc->sc_phys, offset) | PMAP_NC);
+ }
+
+ return (-1);
+}
+
+void
+p9000_setcolor(void *v, u_int index, u_int8_t r, u_int8_t g, u_int8_t b)
+{
+ struct p9000_softc *sc = v;
+ union bt_cmap *bcm = &sc->sc_cmap;
+
+ bcm->cm_map[index][0] = r;
+ bcm->cm_map[index][1] = g;
+ bcm->cm_map[index][2] = b;
+ p9000_loadcmap_immediate(sc, index, 1);
+}
+
+void
+p9000_loadcmap_immediate(struct p9000_softc *sc, u_int start, u_int ncolors)
+{
+ sc->sc_ramdac[BT445_ADDRESS] = start;
+ for (ncolors += start; start < ncolors; start++) {
+ sc->sc_ramdac[BT445_PALDATA] = sc->sc_cmap.cm_map[start][0];
+ sc->sc_ramdac[BT445_PALDATA] = sc->sc_cmap.cm_map[start][1];
+ sc->sc_ramdac[BT445_PALDATA] = sc->sc_cmap.cm_map[start][2];
+ }
+}
+
+static __inline__ void
+p9000_loadcmap_deferred(struct p9000_softc *sc, u_int start, u_int ncolors)
+{
+ /* Schedule an interrupt for next retrace */
+ P9000_SELECT_SCR(sc);
+ P9000_WRITE_CTL(sc, P9000_INTERRUPT_ENABLE,
+ IER_MASTER_ENABLE | IER_MASTER_INTERRUPT |
+ IER_VBLANK_ENABLE | IER_VBLANK_INTERRUPT);
+}
+
+void
+p9000_burner(void *v, u_int on, u_int flags)
+{
+ struct p9000_softc *sc = v;
+ u_int32_t vcr;
+ int s;
+
+ s = splhigh();
+ P9000_SELECT_VCR(sc);
+ vcr = P9000_READ_CTL(sc, P9000_SRTC1);
+ if (on)
+ vcr |= SRTC1_VIDEN;
+ else
+ vcr &= ~SRTC1_VIDEN;
+ P9000_WRITE_CTL(sc, P9000_SRTC1, vcr);
+#if NTCTRL > 0
+ tadpole_set_video(on);
+#endif
+ splx(s);
+}
+
+int
+p9000_intr(void *v)
+{
+ struct p9000_softc *sc = v;
+
+ if (P9000_READ_CTL(sc, P9000_INTERRUPT) & IER_VBLANK_INTERRUPT) {
+ p9000_loadcmap_immediate(sc, 0, 256);
+
+ /* Disable further interrupts now */
+ /* P9000_SELECT_SCR(sc); */
+ P9000_WRITE_CTL(sc, P9000_INTERRUPT_ENABLE,
+ IER_MASTER_ENABLE | 0);
+
+ return (1);
+ }
+
+ return (0);
+}
+
+/*
+ * Accelerated text console code
+ */
+
+static __inline__ void p9000_drain(struct p9000_softc *);
+
+static __inline__ void
+p9000_drain(struct p9000_softc *sc)
+{
+ while (P9000_READ_CMD(sc, P9000_PE_STATUS) &
+ (STATUS_QUAD_BUSY | STATUS_BLIT_BUSY));
+}
+
+void
+p9000_ras_init(struct p9000_softc *sc)
+{
+ /*
+ * Setup safe defaults for the parameter and drawing engine, in
+ * order to minimize the operations to do for ri_ops.
+ */
+
+ P9000_SELECT_DE_LOW(sc);
+ P9000_WRITE_CMD(sc, P9000_DE_DRAWMODE,
+ DM_PICK_CONTROL | 0 | DM_BUFFER_CONTROL | DM_BUFFER_ENABLE0);
+
+ P9000_WRITE_CMD(sc, P9000_DE_PATTERN_ORIGIN_X, 0);
+ P9000_WRITE_CMD(sc, P9000_DE_PATTERN_ORIGIN_Y, 0);
+ /* enable all planes */
+ P9000_WRITE_CMD(sc, P9000_DE_PLANEMASK, 0xff);
+
+ /* Unclip */
+ P9000_WRITE_CMD(sc, P9000_DE_WINMIN, 0);
+ P9000_WRITE_CMD(sc, P9000_DE_WINMAX,
+ P9000_COORDS(sc->sc_sunfb.sf_width - 1, sc->sc_sunfb.sf_height - 1));
+
+ P9000_SELECT_PE(sc);
+ P9000_WRITE_CMD(sc, P9000_PE_WINOFFSET, 0);
+}
+
+void
+p9000_ras_copycols(void *v, int row, int src, int dst, int n)
+{
+ struct rasops_info *ri = v;
+ struct p9000_softc *sc = ri->ri_hw;
+
+ n *= ri->ri_font->fontwidth;
+ n--;
+ src *= ri->ri_font->fontwidth;
+ src += ri->ri_xorigin;
+ dst *= ri->ri_font->fontwidth;
+ dst += ri->ri_xorigin;
+ row *= ri->ri_font->fontheight;
+ row += ri->ri_yorigin;
+
+ p9000_drain(sc);
+ P9000_SELECT_DE_LOW(sc);
+ P9000_WRITE_CMD(sc, P9000_DE_RASTER,
+ P9000_RASTER_SRC & P9000_RASTER_MASK);
+
+ P9000_SELECT_COORD(sc, P9000_DC_COORD(0));
+ P9000_WRITE_CMD(sc, P9000_DC_COORD(0) + P9000_COORD_XY,
+ P9000_COORDS(src, row));
+ P9000_WRITE_CMD(sc, P9000_DC_COORD(1) + P9000_COORD_XY,
+ P9000_COORDS(src + n, row + ri->ri_font->fontheight - 1));
+ P9000_SELECT_COORD(sc, P9000_DC_COORD(2));
+ P9000_WRITE_CMD(sc, P9000_DC_COORD(2) + P9000_COORD_XY,
+ P9000_COORDS(dst, row));
+ P9000_WRITE_CMD(sc, P9000_DC_COORD(3) + P9000_COORD_XY,
+ P9000_COORDS(dst + n, row + ri->ri_font->fontheight - 1));
+
+ sc->sc_junk = P9000_READ_CMD(sc, P9000_PE_BLIT);
+
+ p9000_drain(sc);
+}
+
+void
+p9000_ras_copyrows(void *v, int src, int dst, int n)
+{
+ struct rasops_info *ri = v;
+ struct p9000_softc *sc = ri->ri_hw;
+
+ n *= ri->ri_font->fontheight;
+ n--;
+ src *= ri->ri_font->fontheight;
+ src += ri->ri_yorigin;
+ dst *= ri->ri_font->fontheight;
+ dst += ri->ri_yorigin;
+
+ p9000_drain(sc);
+ P9000_SELECT_DE_LOW(sc);
+ P9000_WRITE_CMD(sc, P9000_DE_RASTER,
+ P9000_RASTER_SRC & P9000_RASTER_MASK);
+
+ P9000_SELECT_COORD(sc, P9000_DC_COORD(0));
+ P9000_WRITE_CMD(sc, P9000_DC_COORD(0) + P9000_COORD_XY,
+ P9000_COORDS(ri->ri_xorigin, src));
+ P9000_WRITE_CMD(sc, P9000_DC_COORD(1) + P9000_COORD_XY,
+ P9000_COORDS(ri->ri_xorigin + ri->ri_emuwidth - 1, src + n));
+ P9000_SELECT_COORD(sc, P9000_DC_COORD(2));
+ P9000_WRITE_CMD(sc, P9000_DC_COORD(2) + P9000_COORD_XY,
+ P9000_COORDS(ri->ri_xorigin, dst));
+ P9000_WRITE_CMD(sc, P9000_DC_COORD(3) + P9000_COORD_XY,
+ P9000_COORDS(ri->ri_xorigin + ri->ri_emuwidth - 1, dst + n));
+
+ sc->sc_junk = P9000_READ_CMD(sc, P9000_PE_BLIT);
+
+ p9000_drain(sc);
+}
+
+void
+p9000_ras_erasecols(void *v, int row, int col, int n, long int attr)
+{
+ struct rasops_info *ri = v;
+ struct p9000_softc *sc = ri->ri_hw;
+ int fg, bg;
+
+ rasops_unpack_attr(attr, &fg, &bg, NULL);
+
+ n *= ri->ri_font->fontwidth;
+ col *= ri->ri_font->fontwidth;
+ col += ri->ri_xorigin;
+ row *= ri->ri_font->fontheight;
+ row += ri->ri_yorigin;
+
+ p9000_drain(sc);
+ P9000_SELECT_DE_LOW(sc);
+ P9000_WRITE_CMD(sc, P9000_DE_RASTER,
+ P9000_RASTER_PATTERN & P9000_RASTER_MASK);
+ P9000_WRITE_CMD(sc, P9000_DE_FG_COLOR, bg);
+
+ P9000_SELECT_COORD(sc, P9000_LC_RECT);
+ P9000_WRITE_CMD(sc, P9000_LC_RECT + P9000_COORD_XY,
+ P9000_COORDS(col, row));
+ P9000_WRITE_CMD(sc, P9000_LC_RECT + P9000_COORD_XY,
+ P9000_COORDS(col + n, row + ri->ri_font->fontheight));
+
+ sc->sc_junk = P9000_READ_CMD(sc, P9000_PE_QUAD);
+
+ p9000_drain(sc);
+}
+
+void
+p9000_ras_eraserows(void *v, int row, int n, long int attr)
+{
+ struct rasops_info *ri = v;
+ struct p9000_softc *sc = ri->ri_hw;
+ int fg, bg;
+
+ rasops_unpack_attr(attr, &fg, &bg, NULL);
+
+ p9000_drain(sc);
+ P9000_SELECT_DE_LOW(sc);
+ P9000_WRITE_CMD(sc, P9000_DE_RASTER,
+ P9000_RASTER_PATTERN & P9000_RASTER_MASK);
+ P9000_WRITE_CMD(sc, P9000_DE_FG_COLOR, bg);
+
+ P9000_SELECT_COORD(sc, P9000_LC_RECT);
+ if (n == ri->ri_rows && ISSET(ri->ri_flg, RI_FULLCLEAR)) {
+ P9000_WRITE_CMD(sc, P9000_LC_RECT + P9000_COORD_XY,
+ P9000_COORDS(0, 0));
+ P9000_WRITE_CMD(sc, P9000_LC_RECT + P9000_COORD_XY,
+ P9000_COORDS(ri->ri_width, ri->ri_height));
+ } else {
+ n *= ri->ri_font->fontheight;
+ row *= ri->ri_font->fontheight;
+ row += ri->ri_yorigin;
+
+ P9000_WRITE_CMD(sc, P9000_LC_RECT + P9000_COORD_XY,
+ P9000_COORDS(ri->ri_xorigin, row));
+ P9000_WRITE_CMD(sc, P9000_LC_RECT + P9000_COORD_XY,
+ P9000_COORDS(ri->ri_xorigin + ri->ri_emuwidth, row + n));
+ }
+
+ sc->sc_junk = P9000_READ_CMD(sc, P9000_PE_QUAD);
+
+ p9000_drain(sc);
+}
+
+void
+p9000_ras_do_cursor(struct rasops_info *ri)
+{
+ struct p9000_softc *sc = ri->ri_hw;
+ int row, col;
+
+ row = ri->ri_crow * ri->ri_font->fontheight + ri->ri_yorigin;
+ col = ri->ri_ccol * ri->ri_font->fontwidth + ri->ri_xorigin;
+
+ p9000_drain(sc);
+
+ P9000_SELECT_DE_LOW(sc);
+ P9000_WRITE_CMD(sc, P9000_DE_RASTER,
+ (~P9000_RASTER_DST) & P9000_RASTER_MASK);
+
+ P9000_SELECT_COORD(sc, P9000_LC_RECT);
+ P9000_WRITE_CMD(sc, P9000_LC_RECT + P9000_COORD_XY,
+ P9000_COORDS(col, row));
+ P9000_WRITE_CMD(sc, P9000_LC_RECT + P9000_COORD_XY,
+ P9000_COORDS(col + ri->ri_font->fontwidth,
+ row + ri->ri_font->fontheight));
+
+ sc->sc_junk = P9000_READ_CMD(sc, P9000_PE_QUAD);
+
+ p9000_drain(sc);
+}
diff --git a/sys/arch/sparc/dev/p9100.c b/sys/arch/sparc/dev/p9100.c
index 543aa346f67..eeaf1ed590e 100644
--- a/sys/arch/sparc/dev/p9100.c
+++ b/sys/arch/sparc/dev/p9100.c
@@ -1,4 +1,4 @@
-/* $OpenBSD: p9100.c,v 1.22 2003/06/13 23:40:12 miod Exp $ */
+/* $OpenBSD: p9100.c,v 1.23 2003/06/17 21:21:32 miod Exp $ */
/*
* Copyright (c) 2003, Miodrag Vallat.
@@ -28,8 +28,9 @@
*/
/*
- * color display (p9100) driver. Based on cgthree.c and the NetBSD
- * p9100 driver.
+ * color display (p9100) driver.
+ * Initially based on cgthree.c and the NetBSD p9100 driver, then hacked
+ * beyond recognition.
*/
#include <sys/param.h>
@@ -59,6 +60,8 @@
#include <sparc/dev/btvar.h>
#include <sparc/dev/sbusvar.h>
+#include <dev/ic/p9000.h>
+
#include "tctrl.h"
#if NTCTRL > 0
#include <sparc/dev/tctrlvar.h>
@@ -69,8 +72,8 @@ struct p9100_softc {
struct sunfb sc_sunfb; /* common base part */
struct sbusdev sc_sd; /* sbus device */
struct rom_reg sc_phys; /* phys address description */
- struct p9100_cmd *sc_cmd; /* command registers (dac, etc) */
- struct p9100_ctl *sc_ctl; /* control registers (draw engine) */
+ volatile u_int8_t *sc_cmd; /* command registers (dac, etc) */
+ volatile u_int8_t *sc_ctl; /* control registers (draw engine) */
union bt_cmap sc_cmap; /* Brooktree color map */
struct intrhand sc_ih;
int sc_nscreens;
@@ -143,206 +146,44 @@ struct cfdriver pnozz_cd = {
#define P9100_REG_VRAM 2
/*
- * System control and command registers
- * (IBM RGB528 RamDac, p9100, video coprocessor)
+ * IBM RGB525 RAMDAC registers
*/
-struct p9100_ctl {
- /* System control registers: 0x0000 - 0x00ff */
- struct p9100_scr {
- volatile u_int32_t :32;
- volatile u_int32_t scr; /* system config reg */
-#define SCR_ID_MASK 0x00000007
-#define SCR_PIXEL_MASK 0x1c000000
-#define SCR_PIXEL_8BPP 0x08000000
-#define SCR_PIXEL_16BPP 0x0c000000
-#define SCR_PIXEL_24BPP 0x1c000000
-#define SCR_PIXEL_32BPP 0x14000000
- volatile u_int32_t ir; /* interrupt reg */
- volatile u_int32_t ier; /* interrupt enable */
-#define IER_MASTER_ENABLE 0x00000080
-#define IER_MASTER_INTERRUPT 0x00000040
-#define IER_VBLANK_ENABLE 0x00000020
-#define IER_VBLANK_INTERRUPT 0x00000010
-#define IER_PICK_ENABLE 0x00000008
-#define IER_PICK_INTERRUPT 0x00000004
-#define IER_IDLE_ENABLE 0x00000002
-#define IER_IDLE_INTERRUPT 0x00000001
- volatile u_int32_t arbr; /* alt read bank reg */
- volatile u_int32_t awbr; /* alt write bank reg */
- volatile u_int32_t unused1[58];
- } ctl_scr;
-
- /* Video control registers: 0x0100 - 0x017f */
- struct p9100_vcr {
- volatile u_int32_t :32;
- volatile u_int32_t hcr; /* horizontal cntr */
- volatile u_int32_t htr; /* horizontal total */
- volatile u_int32_t hsre; /* horiz sync rising */
- volatile u_int32_t hbre; /* horiz blank rising */
- volatile u_int32_t hbfe; /* horiz blank fallng */
- volatile u_int32_t hcp; /* horiz cntr preload */
- volatile u_int32_t vcr; /* vertical cntr */
- volatile u_int32_t vl; /* vertical length */
- volatile u_int32_t vsre; /* vert sync rising */
- volatile u_int32_t vbre; /* vert blank rising */
- volatile u_int32_t vbfe; /* vert blank fallng */
- volatile u_int32_t vcp; /* vert cntr preload */
- volatile u_int32_t sra; /* scrn repaint addr */
- volatile u_int32_t srtc1; /* scrn rpnt time 1 */
-#define SRTC1_VIDEN 0x00000020
- volatile u_int32_t qsf; /* qsf counter */
- volatile u_int32_t srtc2; /* scrn rpnt time 2 */
- volatile u_int32_t unused1[15];
- } ctl_vcr;
-
- /* VRAM control registers: 0x0180 - 0x1ff */
- struct p9100_vram {
- volatile u_int32_t :32;
- volatile u_int32_t mc; /* memory config */
- volatile u_int32_t rp; /* refresh period */
- volatile u_int32_t rc; /* refresh count */
- volatile u_int32_t rasmax; /* ras low maximum */
- volatile u_int32_t rascur; /* ras low current */
- volatile u_int32_t dacfifo; /* free fifo */
- volatile u_int32_t unused1[25];
- } ctl_vram;
-
- /* IBM RGB528 RAMDAC registers: 0x0200 - 0x3ff */
- struct p9100_dac {
- volatile u_int32_t pwraddr; /* wr palette address */
- volatile u_int32_t paldata; /* palette data */
- volatile u_int32_t pixmask; /* pixel mask */
- volatile u_int32_t prdaddr; /* rd palette address */
- volatile u_int32_t idxlow; /* reg index low */
- volatile u_int32_t idxhigh; /* reg index high */
- volatile u_int32_t regdata; /* register data */
- volatile u_int32_t idxctrl; /* index control */
- volatile u_int32_t unused1[120];
- } ctl_dac;
-
- /* Video coprocessor interface: 0x0400 - 0x1fff */
- volatile u_int32_t ctl_vci[768];
-};
+
+/* Palette write address */
+#define IBM525_WRADDR 0
+/* Palette data */
+#define IBM525_DATA 1
+/* Pixel mask */
+#define IBM525_PIXMASK 2
+/* Read palette address */
+#define IBM525_RDADDR 3
+/* Register index low */
+#define IBM525_IDXLOW 4
+/* Register index high */
+#define IBM525_IDXHIGH 5
+/* Register data */
+#define IBM525_REGDATA 6
+/* Index control */
+#define IBM525_IDXCONTROL 7
/*
- * Power 9100 Drawing engine
+ * P9100 read/write macros
*/
-struct p9100_coord {
- volatile u_int32_t :32;
- volatile u_int32_t :32;
- volatile u_int32_t abs_x32;
- volatile u_int32_t :32;
- volatile u_int32_t abs_y32;
- volatile u_int32_t :32;
- volatile u_int32_t abs_x16y16;
- volatile u_int32_t :32;
- volatile u_int32_t :32;
- volatile u_int32_t :32;
- volatile u_int32_t rel_x32;
- volatile u_int32_t :32;
- volatile u_int32_t rel_y32;
- volatile u_int32_t :32;
- volatile u_int32_t rel_x16y16;
- volatile u_int32_t :32;
-};
-
-/* How to encode a x16y16 value */
-#define P9100_COORDS(col,row) ((((col) & 0x0fff) << 16) | ((row) & 0x0fff))
-
-struct p9100_cmd {
- /* Parameter engine 0x2000-0x217f */
- struct cmd_pe {
- volatile u_int32_t status; /* status register */
-#define STATUS_QUAD_BUSY 0x80000000
-#define STATUS_BLIT_BUSY 0x40000000
-#define STATUS_PICK_DETECTED 0x00000080
-#define STATUS_PIXEL_ERROR 0x00000040
-#define STATUS_BLIT_ERROR 0x00000020
-#define STATUS_QUAD_ERROR 0x00000010
-#define STATUS_QUAD_CONCAVE 0x00000008
-#define STATUS_QUAD_OUTSIDE 0x00000004
-#define STATUS_QUAD_INSIDE 0x00000002
-#define STATUS_QUAD_STRADDLE 0x00000001
- volatile u_int32_t blit; /* blit command */
- volatile u_int32_t quad; /* quad command */
- volatile u_int32_t pixel8; /* P9000 pixel8 command */
- volatile u_int32_t :32;
- volatile u_int32_t nextpixels; /* next_pixels command */
- volatile u_int32_t unused1[(0x80 - 0x18) / 4];
- volatile u_int32_t pixel1[32]; /* pixel1 command */
- volatile u_int32_t unused2[(0x180 - 0x100) / 4];
-
- /* Parameter engine registers 0x2180-0x21ff */
- volatile u_int32_t :32;
- volatile u_int32_t oor; /* out of range register */
- volatile u_int32_t :32;
- volatile u_int32_t cindex; /* index register */
- volatile u_int32_t winoffset; /* window offset (16+16) */
- volatile u_int32_t winmin; /* window minimum */
- volatile u_int32_t winmax; /* window maximum */
- volatile u_int32_t :32;
- volatile u_int32_t yclip;
- volatile u_int32_t xclip;
- volatile u_int32_t xedgeless;
- volatile u_int32_t xedgegreater;
- volatile u_int32_t yedgeless;
- volatile u_int32_t yedgegreater;
- volatile u_int32_t unused3[(0x200 - 0x1b8) / 4];
- } pe;
-
- /* Drawing engine 0x2200-0x2fff */
- struct cmd_de {
- volatile u_int32_t color0; /* fg color */
- volatile u_int32_t color1; /* bg color */
- volatile u_int32_t planemask; /* 8-bit plane mask */
- volatile u_int32_t drawmode;
-#define DM_PICK_CONTROL 0x00000008
-#define DM_PICK_ENABLE 0x00000004
-#define DM_BUFFER_CONTROL 0x00000002
-#define DM_BUFFER_ENABLE0 0x00000000
-#define DM_BUFFER_ENABLE1 0x00000001
- volatile u_int32_t patternx; /* Quad 16x16 pattern origin */
- volatile u_int32_t patterny; /* (4-bit) */
- volatile u_int32_t raster;
- volatile u_int32_t pixel8; /* Pixel8 extra storage */
- volatile u_int32_t winmin; /* window min, same as above */
- volatile u_int32_t winmax; /* window max, same as above */
- volatile u_int32_t unused1[(0x38 - 0x28) / 4];
- volatile u_int32_t color2;
- volatile u_int32_t color3;
- volatile u_int32_t unused2[(0x80 - 0x40) / 4];
- volatile u_int32_t pattern[4]; /* pattern for quad fill */
- volatile u_int32_t user[4]; /* user defined registers */
- volatile u_int32_t bwinmin; /* byte window minimum */
- volatile u_int32_t bwinmax; /* byte window maximum */
- volatile u_int32_t unused3[(0x3000 - 0x22a8) / 4];
- } de;
-
- /* Device coordinates 0x3000-0x31ff */
- struct cmd_dc {
- struct p9100_coord coord[4];
- volatile u_int32_t unused[(0x200 - 0x100) / 4];
- } dc;
-
- /* Load coordinates 0x3200-0x33ff */
- struct cmd_lc {
- struct p9100_coord point;
- struct p9100_coord line;
- struct p9100_coord tri;
- struct p9100_coord quad;
- struct p9100_coord rect;
- } lc;
-};
-
-/* How to encode a color in 8 bit mode, for the drawing engine */
-#define P9100_COLOR8(col) ((col) | ((col) << 8) | ((col) << 16))
-
-/* P9100 minterms for the raster register */
-#define P9100_RASTER_SRC 0x00cc
-#define P9100_RASTER_DST 0x00aa
-#define P9100_RASTER_PATTERN 0x00f0
-#define P9100_RASTER_MASK 0x00ff
+#define P9100_READ_CTL(sc,reg) \
+ *(volatile u_int32_t *)((sc)->sc_ctl + (reg))
+#define P9100_READ_CMD(sc,reg) \
+ *(volatile u_int32_t *)((sc)->sc_cmd + (reg))
+#define P9100_READ_RAMDAC(sc,reg) \
+ *(volatile u_int32_t *)((sc)->sc_ctl + P9100_RAMDAC_REGISTER(reg))
+
+#define P9100_WRITE_CTL(sc,reg,value) \
+ *(volatile u_int32_t *)((sc)->sc_ctl + (reg)) = (value)
+#define P9100_WRITE_CMD(sc,reg,value) \
+ *(volatile u_int32_t *)((sc)->sc_cmd + (reg)) = (value)
+#define P9100_WRITE_RAMDAC(sc,reg,value) \
+ *(volatile u_int32_t *)((sc)->sc_ctl + P9100_RAMDAC_REGISTER(reg)) = \
+ (value)
/*
* On the Tadpole, the first write to a register group is ignored until
@@ -356,17 +197,22 @@ struct p9100_cmd {
* This is specific to the Tadpole design, and not a limitation of the
* Power 9100 hardware.
*/
-#define P9100_SELECT_SCR(sc) ((sc)->sc_junk = (sc)->sc_ctl->ctl_scr.scr)
-#define P9100_SELECT_VCR(sc) ((sc)->sc_junk = (sc)->sc_ctl->ctl_vcr.hcr)
-#define P9100_SELECT_VRAM(sc) ((sc)->sc_junk = (sc)->sc_ctl->ctl_vram.mc)
-#define P9100_SELECT_DAC(sc) ((sc)->sc_junk = (sc)->sc_ctl->ctl_dac.pwraddr)
-#define P9100_SELECT_VCI(sc) ((sc)->sc_junk = (sc)->sc_ctl->ctl_vci[0])
-#define P9100_SELECT_DE_LOW(sc) ((sc)->sc_junk = (sc)->sc_cmd->de.color0)
+#define P9100_SELECT_SCR(sc) \
+ (sc)->sc_junk = P9100_READ_CTL(sc, P9000_SYSTEM_CONFIG)
+#define P9100_SELECT_VCR(sc) \
+ (sc)->sc_junk = P9100_READ_CTL(sc, P9000_HCR)
+#define P9100_SELECT_VRAM(sc) \
+ (sc)->sc_junk = P9100_READ_CTL(sc, P9000_MCR)
+#define P9100_SELECT_DAC(sc) \
+ (sc)->sc_junk = P9100_READ_CTL(sc, P9100_RAMDAC_REGISTER(0))
+#define P9100_SELECT_PE(sc) \
+ (sc)->sc_junk = P9100_READ_CMD(sc, P9000_PE_STATUS)
+#define P9100_SELECT_DE_LOW(sc) \
+ (sc)->sc_junk = P9100_READ_CMD(sc, P9000_DE_FG_COLOR)
#define P9100_SELECT_DE_HIGH(sc) \
- ((sc)->sc_junk = (sc)->sc_cmd->de.bwinmax)
-#define P9100_SELECT_PE(sc) ((sc)->sc_junk = (sc)->sc_cmd->pe.cindex)
+ (sc)->sc_junk = P9100_READ_CMD(sc, P9000_DE_PATTERN(0))
#define P9100_SELECT_COORD(sc,field) \
- ((sc)->sc_junk = (sc)->sc_cmd->##field##.abs_x32)
+ (sc)->sc_junk = P9100_READ_CMD(sc, field)
/*
* For some reason, every write to a DAC register needs to be followed by a
@@ -376,7 +222,7 @@ struct p9100_cmd {
#define P9100_FLUSH_DAC(sc) \
do { \
P9100_SELECT_VRAM(sc); \
- (sc)->sc_junk = (sc)->sc_ctl->ctl_vram.dacfifo; \
+ (sc)->sc_junk = P9100_READ_CTL(sc, P9100_FREE_FIFO); \
} while (0)
int
@@ -422,7 +268,7 @@ p9100attach(struct device *parent, struct device *self, void *args)
isconsole = node == fbnode;
P9100_SELECT_SCR(sc);
- scr = sc->sc_ctl->ctl_scr.scr;
+ scr = P9100_READ_CTL(sc, P9000_SYSTEM_CONFIG);
switch (scr & SCR_PIXEL_MASK) {
case SCR_PIXEL_32BPP:
fb_depth = 32;
@@ -457,7 +303,7 @@ p9100attach(struct device *parent, struct device *self, void *args)
/* Disable frame buffer interrupts */
P9100_SELECT_SCR(sc);
- sc->sc_ctl->ctl_scr.ier = IER_MASTER_ENABLE | 0;
+ P9100_WRITE_CTL(sc, P9000_INTERRUPT_ENABLE, IER_MASTER_ENABLE | 0);
/*
* If the framebuffer width is under 1024x768, we will switch from the
@@ -471,7 +317,7 @@ p9100attach(struct device *parent, struct device *self, void *args)
* XXX there should be a rasops "clear margins" feature
*/
fbwscons_init(&sc->sc_sunfb,
- isconsole && (sc->sc_sunfb.sf_width != 800));
+ isconsole && (sc->sc_sunfb.sf_width >= 1024));
fbwscons_setcolormap(&sc->sc_sunfb, p9100_setcolor);
/*
@@ -497,7 +343,7 @@ p9100attach(struct device *parent, struct device *self, void *args)
p9100_burner(sc, 1, 0);
if (isconsole) {
- if (sc->sc_sunfb.sf_width == 800)
+ if (sc->sc_sunfb.sf_width < 1024)
row = 0; /* screen has been cleared above */
else
row = -1;
@@ -690,12 +536,12 @@ p9100_loadcmap_immediate(struct p9100_softc *sc, u_int start, u_int ncolors)
u_char *p;
P9100_SELECT_DAC(sc);
- sc->sc_ctl->ctl_dac.pwraddr = start << 16;
+ P9100_WRITE_RAMDAC(sc, IBM525_WRADDR, start << 16);
P9100_FLUSH_DAC(sc);
for (p = sc->sc_cmap.cm_map[start], ncolors *= 3; ncolors-- > 0; p++) {
P9100_SELECT_DAC(sc);
- sc->sc_ctl->ctl_dac.paldata = (*p) << 16;
+ P9100_WRITE_RAMDAC(sc, IBM525_DATA, (*p) << 16);
P9100_FLUSH_DAC(sc);
}
}
@@ -703,11 +549,11 @@ p9100_loadcmap_immediate(struct p9100_softc *sc, u_int start, u_int ncolors)
static __inline__ void
p9100_loadcmap_deferred(struct p9100_softc *sc, u_int start, u_int ncolors)
{
-
/* Schedule an interrupt for next retrace */
P9100_SELECT_SCR(sc);
- sc->sc_ctl->ctl_scr.ier = IER_MASTER_ENABLE | IER_MASTER_INTERRUPT |
- IER_VBLANK_ENABLE | IER_VBLANK_INTERRUPT;
+ P9100_WRITE_CTL(sc, P9000_INTERRUPT_ENABLE,
+ IER_MASTER_ENABLE | IER_MASTER_INTERRUPT |
+ IER_VBLANK_ENABLE | IER_VBLANK_INTERRUPT);
}
void
@@ -719,13 +565,12 @@ p9100_burner(void *v, u_int on, u_int flags)
s = splhigh();
P9100_SELECT_VCR(sc);
- vcr = sc->sc_ctl->ctl_vcr.srtc1;
+ vcr = P9100_READ_CTL(sc, P9000_SRTC1);
if (on)
vcr |= SRTC1_VIDEN;
else
vcr &= ~SRTC1_VIDEN;
- /* XXX - what about WSDISPLAY_BURN_VBLANK? */
- sc->sc_ctl->ctl_vcr.srtc1 = vcr;
+ P9100_WRITE_CTL(sc, P9000_SRTC1, vcr);
#if NTCTRL > 0
tadpole_set_video(on);
#endif
@@ -737,12 +582,13 @@ p9100_intr(void *v)
{
struct p9100_softc *sc = v;
- if (sc->sc_ctl->ctl_scr.ir & IER_VBLANK_INTERRUPT) {
+ if (P9100_READ_CTL(sc, P9000_INTERRUPT) & IER_VBLANK_INTERRUPT) {
p9100_loadcmap_immediate(sc, 0, 256);
/* Disable further interrupts now */
/* P9100_SELECT_SCR(sc); */
- sc->sc_ctl->ctl_scr.ier = IER_MASTER_ENABLE | 0;
+ P9100_WRITE_CTL(sc, P9000_INTERRUPT_ENABLE,
+ IER_MASTER_ENABLE | 0);
return (1);
}
@@ -759,38 +605,39 @@ static __inline__ void p9100_drain(struct p9100_softc *);
static __inline__ void
p9100_drain(struct p9100_softc *sc)
{
- while (sc->sc_cmd->pe.status & (STATUS_QUAD_BUSY | STATUS_BLIT_BUSY));
+ while (P9100_READ_CMD(sc, P9000_PE_STATUS) &
+ (STATUS_QUAD_BUSY | STATUS_BLIT_BUSY));
}
void
p9100_ras_init(struct p9100_softc *sc)
{
-
/*
* Setup safe defaults for the parameter and drawing engine, in
* order to minimize the operations to do for ri_ops.
*/
P9100_SELECT_DE_LOW(sc);
- sc->sc_cmd->de.drawmode = DM_PICK_CONTROL | 0 |
- DM_BUFFER_CONTROL | DM_BUFFER_ENABLE0;
+ P9100_WRITE_CMD(sc, P9000_DE_DRAWMODE,
+ DM_PICK_CONTROL | 0 | DM_BUFFER_CONTROL | DM_BUFFER_ENABLE0);
- sc->sc_cmd->de.patternx = 0;
- sc->sc_cmd->de.patterny = 0;
- sc->sc_cmd->de.planemask = 0xffffffff; /* enable all planes */
+ P9100_WRITE_CMD(sc, P9000_DE_PATTERN_ORIGIN_X, 0);
+ P9100_WRITE_CMD(sc, P9000_DE_PATTERN_ORIGIN_Y, 0);
+ /* enable all planes */
+ P9100_WRITE_CMD(sc, P9000_DE_PLANEMASK, 0xffffffff);
/* Unclip */
- sc->sc_cmd->de.winmin = 0;
- sc->sc_cmd->de.winmax =
- P9100_COORDS(sc->sc_sunfb.sf_width - 1, sc->sc_sunfb.sf_height - 1);
+ P9100_WRITE_CMD(sc, P9000_DE_WINMIN, 0);
+ P9100_WRITE_CMD(sc, P9000_DE_WINMAX,
+ P9000_COORDS(sc->sc_sunfb.sf_width - 1, sc->sc_sunfb.sf_height - 1));
P9100_SELECT_DE_HIGH(sc);
- sc->sc_cmd->de.bwinmin = 0;
- sc->sc_cmd->de.bwinmax =
- P9100_COORDS(sc->sc_sunfb.sf_width - 1, sc->sc_sunfb.sf_height - 1);
+ P9100_WRITE_CMD(sc, P9100_DE_B_WINMIN, 0);
+ P9100_WRITE_CMD(sc, P9100_DE_B_WINMAX,
+ P9000_COORDS(sc->sc_sunfb.sf_width - 1, sc->sc_sunfb.sf_height - 1));
P9100_SELECT_PE(sc);
- sc->sc_cmd->pe.winoffset = 0;
+ P9100_WRITE_CMD(sc, P9000_PE_WINOFFSET, 0);
}
void
@@ -810,18 +657,21 @@ p9100_ras_copycols(void *v, int row, int src, int dst, int n)
p9100_drain(sc);
P9100_SELECT_DE_LOW(sc);
- sc->sc_cmd->de.raster = P9100_RASTER_SRC & P9100_RASTER_MASK;
-
- P9100_SELECT_COORD(sc,dc.coord[0]);
- sc->sc_cmd->dc.coord[0].abs_x16y16 = P9100_COORDS(src, row);
- sc->sc_cmd->dc.coord[1].abs_x16y16 =
- P9100_COORDS(src + n, row + ri->ri_font->fontheight - 1);
- P9100_SELECT_COORD(sc,dc.coord[2]);
- sc->sc_cmd->dc.coord[2].abs_x16y16 = P9100_COORDS(dst, row);
- sc->sc_cmd->dc.coord[3].abs_x16y16 =
- P9100_COORDS(dst + n, row + ri->ri_font->fontheight - 1);
-
- sc->sc_junk = sc->sc_cmd->pe.blit;
+ P9100_WRITE_CMD(sc, P9000_DE_RASTER,
+ P9100_RASTER_SRC & P9100_RASTER_MASK);
+
+ P9100_SELECT_COORD(sc, P9000_DC_COORD(0));
+ P9100_WRITE_CMD(sc, P9000_DC_COORD(0) + P9000_COORD_XY,
+ P9000_COORDS(src, row));
+ P9100_WRITE_CMD(sc, P9000_DC_COORD(1) + P9000_COORD_XY,
+ P9000_COORDS(src + n, row + ri->ri_font->fontheight - 1));
+ P9100_SELECT_COORD(sc, P9000_DC_COORD(2));
+ P9100_WRITE_CMD(sc, P9000_DC_COORD(2) + P9000_COORD_XY,
+ P9000_COORDS(dst, row));
+ P9100_WRITE_CMD(sc, P9000_DC_COORD(3) + P9000_COORD_XY,
+ P9000_COORDS(dst + n, row + ri->ri_font->fontheight - 1));
+
+ sc->sc_junk = P9100_READ_CMD(sc, P9000_PE_BLIT);
p9100_drain(sc);
}
@@ -841,18 +691,21 @@ p9100_ras_copyrows(void *v, int src, int dst, int n)
p9100_drain(sc);
P9100_SELECT_DE_LOW(sc);
- sc->sc_cmd->de.raster = P9100_RASTER_SRC & P9100_RASTER_MASK;
-
- P9100_SELECT_COORD(sc,dc.coord[0]);
- sc->sc_cmd->dc.coord[0].abs_x16y16 = P9100_COORDS(ri->ri_xorigin, src);
- sc->sc_cmd->dc.coord[1].abs_x16y16 =
- P9100_COORDS(ri->ri_xorigin + ri->ri_emuwidth - 1, src + n);
- P9100_SELECT_COORD(sc,dc.coord[2]);
- sc->sc_cmd->dc.coord[2].abs_x16y16 = P9100_COORDS(ri->ri_xorigin, dst);
- sc->sc_cmd->dc.coord[3].abs_x16y16 =
- P9100_COORDS(ri->ri_xorigin + ri->ri_emuwidth - 1, dst + n);
-
- sc->sc_junk = sc->sc_cmd->pe.blit;
+ P9100_WRITE_CMD(sc, P9000_DE_RASTER,
+ P9100_RASTER_SRC & P9100_RASTER_MASK);
+
+ P9100_SELECT_COORD(sc, P9000_DC_COORD(0));
+ P9100_WRITE_CMD(sc, P9000_DC_COORD(0) + P9000_COORD_XY,
+ P9000_COORDS(ri->ri_xorigin, src));
+ P9100_WRITE_CMD(sc, P9000_DC_COORD(1) + P9000_COORD_XY,
+ P9000_COORDS(ri->ri_xorigin + ri->ri_emuwidth - 1, src + n));
+ P9100_SELECT_COORD(sc, P9000_DC_COORD(2));
+ P9100_WRITE_CMD(sc, P9000_DC_COORD(2) + P9000_COORD_XY,
+ P9000_COORDS(ri->ri_xorigin, dst));
+ P9100_WRITE_CMD(sc, P9000_DC_COORD(3) + P9000_COORD_XY,
+ P9000_COORDS(ri->ri_xorigin + ri->ri_emuwidth - 1, dst + n));
+
+ sc->sc_junk = P9100_READ_CMD(sc, P9000_PE_BLIT);
p9100_drain(sc);
}
@@ -874,15 +727,17 @@ p9100_ras_erasecols(void *v, int row, int col, int n, long int attr)
p9100_drain(sc);
P9100_SELECT_DE_LOW(sc);
- sc->sc_cmd->de.raster = P9100_RASTER_PATTERN & P9100_RASTER_MASK;
- sc->sc_cmd->de.color0 = P9100_COLOR8(bg);
+ P9100_WRITE_CMD(sc, P9000_DE_RASTER,
+ P9100_RASTER_PATTERN & P9100_RASTER_MASK);
+ P9100_WRITE_CMD(sc, P9100_DE_COLOR0, P9100_COLOR8(bg));
- P9100_SELECT_COORD(sc,lc.rect);
- sc->sc_cmd->lc.rect.abs_x16y16 = P9100_COORDS(col, row);
- sc->sc_cmd->lc.rect.abs_x16y16 =
- P9100_COORDS(col + n, row + ri->ri_font->fontheight);
+ P9100_SELECT_COORD(sc, P9000_LC_RECT);
+ P9100_WRITE_CMD(sc, P9000_LC_RECT + P9000_COORD_XY,
+ P9000_COORDS(col, row));
+ P9100_WRITE_CMD(sc, P9000_LC_RECT + P9000_COORD_XY,
+ P9000_COORDS(col + n, row + ri->ri_font->fontheight));
- sc->sc_junk = sc->sc_cmd->pe.quad;
+ sc->sc_junk = P9100_READ_CMD(sc, P9000_PE_QUAD);
p9100_drain(sc);
}
@@ -898,26 +753,28 @@ p9100_ras_eraserows(void *v, int row, int n, long int attr)
p9100_drain(sc);
P9100_SELECT_DE_LOW(sc);
- sc->sc_cmd->de.raster = P9100_RASTER_PATTERN & P9100_RASTER_MASK;
- sc->sc_cmd->de.color0 = P9100_COLOR8(bg);
+ P9100_WRITE_CMD(sc, P9000_DE_RASTER,
+ P9100_RASTER_PATTERN & P9100_RASTER_MASK);
+ P9100_WRITE_CMD(sc, P9100_DE_COLOR0, P9100_COLOR8(bg));
- P9100_SELECT_COORD(sc,lc.rect);
+ P9100_SELECT_COORD(sc, P9000_LC_RECT);
if (n == ri->ri_rows && ISSET(ri->ri_flg, RI_FULLCLEAR)) {
- sc->sc_cmd->lc.rect.abs_x16y16 = P9100_COORDS(0, 0);
- sc->sc_cmd->lc.rect.abs_x16y16 =
- P9100_COORDS(ri->ri_width, ri->ri_height);
+ P9100_WRITE_CMD(sc, P9000_LC_RECT + P9000_COORD_XY,
+ P9000_COORDS(0, 0));
+ P9100_WRITE_CMD(sc, P9000_LC_RECT + P9000_COORD_XY,
+ P9000_COORDS(ri->ri_width, ri->ri_height));
} else {
n *= ri->ri_font->fontheight;
row *= ri->ri_font->fontheight;
row += ri->ri_yorigin;
- sc->sc_cmd->lc.rect.abs_x16y16 =
- P9100_COORDS(ri->ri_xorigin, row);
- sc->sc_cmd->lc.rect.abs_x16y16 =
- P9100_COORDS(ri->ri_xorigin + ri->ri_emuwidth, row + n);
+ P9100_WRITE_CMD(sc, P9000_LC_RECT + P9000_COORD_XY,
+ P9000_COORDS(ri->ri_xorigin, row));
+ P9100_WRITE_CMD(sc, P9000_LC_RECT + P9000_COORD_XY,
+ P9000_COORDS(ri->ri_xorigin + ri->ri_emuwidth, row + n));
}
- sc->sc_junk = sc->sc_cmd->pe.quad;
+ sc->sc_junk = P9100_READ_CMD(sc, P9000_PE_QUAD);
p9100_drain(sc);
}
@@ -934,15 +791,17 @@ p9100_ras_do_cursor(struct rasops_info *ri)
p9100_drain(sc);
P9100_SELECT_DE_LOW(sc);
- sc->sc_cmd->de.raster = (~P9100_RASTER_DST) & P9100_RASTER_MASK;
+ P9100_WRITE_CMD(sc, P9000_DE_RASTER,
+ (~P9100_RASTER_DST) & P9100_RASTER_MASK);
- P9100_SELECT_COORD(sc,lc.rect);
- sc->sc_cmd->lc.rect.abs_x16y16 = P9100_COORDS(col, row);
- sc->sc_cmd->lc.rect.abs_x16y16 =
- P9100_COORDS(col + ri->ri_font->fontwidth,
- row + ri->ri_font->fontheight);
+ P9100_SELECT_COORD(sc, P9000_LC_RECT);
+ P9100_WRITE_CMD(sc, P9000_LC_RECT + P9000_COORD_XY,
+ P9000_COORDS(col, row));
+ P9100_WRITE_CMD(sc, P9000_LC_RECT + P9000_COORD_XY,
+ P9000_COORDS(col + ri->ri_font->fontwidth,
+ row + ri->ri_font->fontheight));
- sc->sc_junk = sc->sc_cmd->pe.quad;
+ sc->sc_junk = P9100_READ_CMD(sc, P9000_PE_QUAD);
p9100_drain(sc);
}
generated by cgit v1.2.3 (git 2.25.1) at 2024-12-12 10:34:21 +0000