Merge Mesa 22.3.7

17 files changed, 97 insertions, 53 deletions

diff --git a/lib/mesa/src/gallium/drivers/etnaviv/etnaviv_resource.c b/lib/mesa/src/gallium/drivers/etnaviv/etnaviv_resource.c
index f0c4fbe23..3a193fa69 100644
--- a/lib/mesa/src/gallium/drivers/etnaviv/etnaviv_resource.c
+++ b/lib/mesa/src/gallium/drivers/etnaviv/etnaviv_resource.c
@@ -570,15 +570,9 @@ etna_resource_from_handle(struct pipe_screen *pscreen,
       goto fail;
    }
 
-   if (screen->ro) {
-      struct pipe_resource *imp_prsc = prsc;
-      do {
-         etna_resource(imp_prsc)->scanout =
-               renderonly_create_gpu_import_for_resource(imp_prsc, screen->ro,
-                                                         NULL);
-         /* failure is expected for scanout incompatible buffers */
-      } while ((imp_prsc = imp_prsc->next));
-   }
+   if (screen->ro)
+      rsc->scanout = renderonly_create_gpu_import_for_resource(prsc, screen->ro,
+                                                               NULL);
 
    return prsc;
 
diff --git a/lib/mesa/src/gallium/drivers/etnaviv/etnaviv_screen.c b/lib/mesa/src/gallium/drivers/etnaviv/etnaviv_screen.c
index 795f1258a..7c20ad2bd 100644
--- a/lib/mesa/src/gallium/drivers/etnaviv/etnaviv_screen.c
+++ b/lib/mesa/src/gallium/drivers/etnaviv/etnaviv_screen.c
@@ -94,6 +94,8 @@ etna_screen_destroy(struct pipe_screen *pscreen)
    if (screen->perfmon)
       etna_perfmon_del(screen->perfmon);
 
+   util_dynarray_fini(&screen->supported_pm_queries);
+
    etna_shader_screen_fini(pscreen);
 
    if (screen->pipe)
diff --git a/lib/mesa/src/gallium/drivers/iris/iris_screen.c b/lib/mesa/src/gallium/drivers/iris/iris_screen.c
index 90a598df7..1c3d5f29c 100644
--- a/lib/mesa/src/gallium/drivers/iris/iris_screen.c
+++ b/lib/mesa/src/gallium/drivers/iris/iris_screen.c
@@ -774,7 +774,7 @@ iris_init_identifier_bo(struct iris_screen *screen)
    screen->workaround_address = (struct iris_address) {
       .bo = screen->workaround_bo,
       .offset = ALIGN(
-         intel_debug_write_identifiers(bo_map, 4096, "Iris") + 8, 8),
+         intel_debug_write_identifiers(bo_map, 4096, "Iris"), 32),
    };
 
    iris_bo_unmap(screen->workaround_bo);
diff --git a/lib/mesa/src/gallium/drivers/llvmpipe/lp_screen.c b/lib/mesa/src/gallium/drivers/llvmpipe/lp_screen.c
index a4d7b405a..5e594bb72 100644
--- a/lib/mesa/src/gallium/drivers/llvmpipe/lp_screen.c
+++ b/lib/mesa/src/gallium/drivers/llvmpipe/lp_screen.c
@@ -565,7 +565,7 @@ llvmpipe_get_compute_param(struct pipe_screen *_screen,
    case PIPE_COMPUTE_CAP_ADDRESS_BITS:
       if (ret) {
          uint32_t *address_bits = ret;
-         *address_bits = 64;
+         *address_bits = sizeof(void*) * 8;
       }
       return sizeof(uint32_t);
    }
diff --git a/lib/mesa/src/gallium/drivers/nouveau/nouveau_screen.c b/lib/mesa/src/gallium/drivers/nouveau/nouveau_screen.c
index bdd2b903d..0daca9ea3 100644
--- a/lib/mesa/src/gallium/drivers/nouveau/nouveau_screen.c
+++ b/lib/mesa/src/gallium/drivers/nouveau/nouveau_screen.c
@@ -241,6 +241,8 @@ nouveau_pushbuf_create(struct nouveau_screen *screen, struct nouveau_context *co
 void
 nouveau_pushbuf_destroy(struct nouveau_pushbuf **push)
 {
+   if (!*push)
+      return;
    FREE((*push)->user_priv);
    nouveau_pushbuf_del(push);
 }
diff --git a/lib/mesa/src/gallium/drivers/r600/sfn/sfn_nir.cpp b/lib/mesa/src/gallium/drivers/r600/sfn/sfn_nir.cpp
index fa5a45dec..be959f350 100644
--- a/lib/mesa/src/gallium/drivers/r600/sfn/sfn_nir.cpp
+++ b/lib/mesa/src/gallium/drivers/r600/sfn/sfn_nir.cpp
@@ -443,23 +443,30 @@ r600_lower_clipvertex_to_clipdist(nir_shader *sh, pipe_stream_output_info& so_in
 static bool
 r600_nir_lower_atomics(nir_shader *shader)
 {
-   /* First re-do the offsets, in Hardware we start at zero for each new
-    * binding, and we use an offset of one per counter */
-   int current_binding = -1;
-   int current_offset = 0;
-   nir_foreach_variable_with_modes(var, shader, nir_var_uniform)
-   {
-      if (!var->type->contains_atomic())
-         continue;
+   /* In Hardware we start at a zero index for each new
+    * binding, and we use an offset of one per counter. We also
+    * need to sort the atomics according to binding and offset. */
+   std::map<unsigned, unsigned> binding_offset;
+   std::map<unsigned, nir_variable *> sorted_var;
+
+   nir_foreach_variable_with_modes_safe(var, shader, nir_var_uniform) {
+      if (var->type->contains_atomic()) {
+         sorted_var[(var->data.binding << 16) | var->data.offset] = var;
+         exec_node_remove(&var->node);
+      }
+   }
 
-      if (current_binding == (int)var->data.binding) {
-         var->data.index = current_offset;
-         current_offset += var->type->atomic_size() / ATOMIC_COUNTER_SIZE;
-      } else {
-         current_binding = var->data.binding;
+   for (auto& [dummy, var] : sorted_var) {
+      auto iindex = binding_offset.find(var->data.binding);
+      unsigned offset_update = var->type->atomic_size() / ATOMIC_COUNTER_SIZE;
+      if (iindex == binding_offset.end()) {
          var->data.index = 0;
-         current_offset = var->type->atomic_size() / ATOMIC_COUNTER_SIZE;
+         binding_offset[var->data.binding] = offset_update;
+      } else {
+         var->data.index = iindex->second;
+         iindex->second += offset_update;
       }
+      shader->variables.push_tail(&var->node);
    }
 
    return nir_shader_instructions_pass(shader,
diff --git a/lib/mesa/src/gallium/drivers/radeonsi/si_pipe.c b/lib/mesa/src/gallium/drivers/radeonsi/si_pipe.c
index 999c0a3a8..971023f9b 100644
--- a/lib/mesa/src/gallium/drivers/radeonsi/si_pipe.c
+++ b/lib/mesa/src/gallium/drivers/radeonsi/si_pipe.c
@@ -1141,6 +1141,8 @@ static struct pipe_screen *radeonsi_screen_create_impl(struct radeon_winsys *ws,
                   sscreen->options.enable_sam,
                   sscreen->options.disable_sam);
 
+   sscreen->info.smart_access_memory = false; /* VRAM has slower CPU access */
+
    if (sscreen->info.gfx_level >= GFX9) {
       sscreen->se_tile_repeat = 32 * sscreen->info.max_se;
    } else {
diff --git a/lib/mesa/src/gallium/drivers/radeonsi/si_pm4.c b/lib/mesa/src/gallium/drivers/radeonsi/si_pm4.c
index f8454cd30..857f60214 100644
--- a/lib/mesa/src/gallium/drivers/radeonsi/si_pm4.c
+++ b/lib/mesa/src/gallium/drivers/radeonsi/si_pm4.c
@@ -63,13 +63,14 @@ static void si_pm4_set_reg_custom(struct si_pm4_state *state, unsigned reg, uint
 
    assert(state->ndw + 2 <= state->max_dw);
 
-   if (opcode != state->last_opcode || reg != (state->last_reg + 1)) {
+   if (opcode != state->last_opcode || reg != (state->last_reg + 1) || idx != state->last_idx) {
       si_pm4_cmd_begin(state, opcode);
       state->pm4[state->ndw++] = reg | (idx << 28);
    }
 
    assert(reg <= UINT16_MAX);
    state->last_reg = reg;
+   state->last_idx = idx;
    state->pm4[state->ndw++] = val;
    si_pm4_cmd_end(state, false);
 }
diff --git a/lib/mesa/src/gallium/drivers/radeonsi/si_pm4.h b/lib/mesa/src/gallium/drivers/radeonsi/si_pm4.h
index 4d1770a96..a0c50e6a3 100644
--- a/lib/mesa/src/gallium/drivers/radeonsi/si_pm4.h
+++ b/lib/mesa/src/gallium/drivers/radeonsi/si_pm4.h
@@ -47,6 +47,7 @@ struct si_pm4_state {
    uint16_t last_pm4;
    uint16_t ndw;        /* number of dwords in pm4 */
    uint8_t last_opcode;
+   uint8_t last_idx;
 
    /* For shader states only */
    bool is_shader;
diff --git a/lib/mesa/src/gallium/drivers/radeonsi/si_shader.c b/lib/mesa/src/gallium/drivers/radeonsi/si_shader.c
index 4797f0f88..4908e2870 100644
--- a/lib/mesa/src/gallium/drivers/radeonsi/si_shader.c
+++ b/lib/mesa/src/gallium/drivers/radeonsi/si_shader.c
@@ -2005,7 +2005,8 @@ static struct si_shader_part *
 si_get_shader_part(struct si_screen *sscreen, struct si_shader_part **list,
                    gl_shader_stage stage, bool prolog, union si_shader_part_key *key,
                    struct ac_llvm_compiler *compiler, struct util_debug_callback *debug,
-                   void (*build)(struct si_shader_context *, union si_shader_part_key *),
+                   void (*build)(struct si_shader_context *, union si_shader_part_key *,
+                                 bool non_monolithic),
                    const char *name)
 {
    struct si_shader_part *result;
@@ -2062,7 +2063,7 @@ si_get_shader_part(struct si_screen *sscreen, struct si_shader_part **list,
    ctx.shader = &shader;
    ctx.stage = stage;
 
-   build(&ctx, key);
+   build(&ctx, key, true);
 
    /* Compile. */
    si_llvm_optimize_module(&ctx);
diff --git a/lib/mesa/src/gallium/drivers/radeonsi/si_shader_internal.h b/lib/mesa/src/gallium/drivers/radeonsi/si_shader_internal.h
index 066943810..466f3b2bf 100644
--- a/lib/mesa/src/gallium/drivers/radeonsi/si_shader_internal.h
+++ b/lib/mesa/src/gallium/drivers/radeonsi/si_shader_internal.h
@@ -247,14 +247,17 @@ LLVMValueRef si_get_tcs_in_vertex_dw_stride(struct si_shader_context *ctx);
 LLVMValueRef si_get_num_tcs_out_vertices(struct si_shader_context *ctx);
 void si_llvm_preload_tess_rings(struct si_shader_context *ctx);
 void si_llvm_ls_build_end(struct si_shader_context *ctx);
-void si_llvm_build_tcs_epilog(struct si_shader_context *ctx, union si_shader_part_key *key);
+void si_llvm_build_tcs_epilog(struct si_shader_context *ctx, union si_shader_part_key *key,
+                              bool separate_epilog);
 void si_llvm_tcs_build_end(struct si_shader_context *ctx);
 void si_llvm_init_tcs_callbacks(struct si_shader_context *ctx);
 
 /* si_shader_llvm_ps.c */
 LLVMValueRef si_get_sample_id(struct si_shader_context *ctx);
-void si_llvm_build_ps_prolog(struct si_shader_context *ctx, union si_shader_part_key *key);
-void si_llvm_build_ps_epilog(struct si_shader_context *ctx, union si_shader_part_key *key);
+void si_llvm_build_ps_prolog(struct si_shader_context *ctx, union si_shader_part_key *key,
+                             bool separate_prolog);
+void si_llvm_build_ps_epilog(struct si_shader_context *ctx, union si_shader_part_key *key,
+                             bool separate_epilog);
 void si_llvm_build_monolithic_ps(struct si_shader_context *ctx, struct si_shader *shader);
 void si_llvm_ps_build_end(struct si_shader_context *ctx);
 void si_llvm_init_ps_callbacks(struct si_shader_context *ctx);
@@ -274,7 +277,8 @@ void si_llvm_emit_streamout(struct si_shader_context *ctx, struct si_shader_outp
 void si_llvm_build_vs_exports(struct si_shader_context *ctx, LLVMValueRef num_export_threads,
                               struct si_shader_output_values *outputs, unsigned noutput);
 void si_llvm_vs_build_end(struct si_shader_context *ctx);
-void si_llvm_build_vs_prolog(struct si_shader_context *ctx, union si_shader_part_key *key);
+void si_llvm_build_vs_prolog(struct si_shader_context *ctx, union si_shader_part_key *key,
+                             bool separate_prolog);
 void si_llvm_init_vs_callbacks(struct si_shader_context *ctx, bool ngg_cull_shader);
 
 #endif
diff --git a/lib/mesa/src/gallium/drivers/radeonsi/si_shader_llvm.c b/lib/mesa/src/gallium/drivers/radeonsi/si_shader_llvm.c
index f7817aff6..75b024481 100644
--- a/lib/mesa/src/gallium/drivers/radeonsi/si_shader_llvm.c
+++ b/lib/mesa/src/gallium/drivers/radeonsi/si_shader_llvm.c
@@ -1300,7 +1300,7 @@ bool si_llvm_compile_shader(struct si_screen *sscreen, struct ac_llvm_compiler *
             si_get_vs_prolog_key(&sel->info, shader->info.num_input_sgprs, true,
                                  &shader->key.ge.part.vs.prolog, shader, &prolog_key);
             prolog_key.vs_prolog.is_monolithic = true;
-            si_llvm_build_vs_prolog(&ctx, &prolog_key);
+            si_llvm_build_vs_prolog(&ctx, &prolog_key, false);
             parts[num_parts++] = ctx.main_fn;
             first_is_prolog = true;
          }
@@ -1312,7 +1312,7 @@ bool si_llvm_compile_shader(struct si_screen *sscreen, struct ac_llvm_compiler *
          si_get_vs_prolog_key(&sel->info, shader->info.num_input_sgprs, false,
                               &shader->key.ge.part.vs.prolog, shader, &prolog_key);
          prolog_key.vs_prolog.is_monolithic = true;
-         si_llvm_build_vs_prolog(&ctx, &prolog_key);
+         si_llvm_build_vs_prolog(&ctx, &prolog_key, false);
          parts[num_parts++] = ctx.main_fn;
          if (num_parts == 1)
             first_is_prolog = true;
@@ -1337,7 +1337,7 @@ bool si_llvm_compile_shader(struct si_screen *sscreen, struct ac_llvm_compiler *
       prolog_key.vs_prolog.as_ngg = 1;
       prolog_key.vs_prolog.load_vgprs_after_culling = 1;
       prolog_key.vs_prolog.is_monolithic = true;
-      si_llvm_build_vs_prolog(&ctx, &prolog_key);
+      si_llvm_build_vs_prolog(&ctx, &prolog_key, false);
       prolog = ctx.main_fn;
 
       parts[0] = ngg_cull_main_fn;
@@ -1361,7 +1361,7 @@ bool si_llvm_compile_shader(struct si_screen *sscreen, struct ac_llvm_compiler *
          /* TCS epilog */
          union si_shader_part_key tcs_epilog_key;
          si_get_tcs_epilog_key(shader, &tcs_epilog_key);
-         si_llvm_build_tcs_epilog(&ctx, &tcs_epilog_key);
+         si_llvm_build_tcs_epilog(&ctx, &tcs_epilog_key, false);
          parts[3] = ctx.main_fn;
 
          struct si_shader shader_ls = {};
@@ -1393,7 +1393,7 @@ bool si_llvm_compile_shader(struct si_screen *sscreen, struct ac_llvm_compiler *
             si_get_vs_prolog_key(&ls->info, shader_ls.info.num_input_sgprs, false,
                                  &shader->key.ge.part.tcs.ls_prolog, shader, &vs_prolog_key);
             vs_prolog_key.vs_prolog.is_monolithic = true;
-            si_llvm_build_vs_prolog(&ctx, &vs_prolog_key);
+            si_llvm_build_vs_prolog(&ctx, &vs_prolog_key, false);
             parts[0] = ctx.main_fn;
          }
 
@@ -1417,7 +1417,7 @@ bool si_llvm_compile_shader(struct si_screen *sscreen, struct ac_llvm_compiler *
 
          memset(&epilog_key, 0, sizeof(epilog_key));
          epilog_key.tcs_epilog.states = shader->key.ge.part.tcs.epilog;
-         si_llvm_build_tcs_epilog(&ctx, &epilog_key);
+         si_llvm_build_tcs_epilog(&ctx, &epilog_key, false);
          parts[1] = ctx.main_fn;
 
          si_build_wrapper_function(&ctx, parts, 2, 0, 0, main_arg_types, false);
@@ -1466,7 +1466,7 @@ bool si_llvm_compile_shader(struct si_screen *sscreen, struct ac_llvm_compiler *
             si_get_vs_prolog_key(&es->info, shader_es.info.num_input_sgprs, false,
                                  &shader->key.ge.part.gs.vs_prolog, shader, &vs_prolog_key);
             vs_prolog_key.vs_prolog.is_monolithic = true;
-            si_llvm_build_vs_prolog(&ctx, &vs_prolog_key);
+            si_llvm_build_vs_prolog(&ctx, &vs_prolog_key, false);
             es_prolog = ctx.main_fn;
          }
 
diff --git a/lib/mesa/src/gallium/drivers/radeonsi/si_state.c b/lib/mesa/src/gallium/drivers/radeonsi/si_state.c
index 3ab4216b7..54eb62c8f 100644
--- a/lib/mesa/src/gallium/drivers/radeonsi/si_state.c
+++ b/lib/mesa/src/gallium/drivers/radeonsi/si_state.c
@@ -114,7 +114,7 @@ static void si_emit_cb_render_state(struct si_context *sctx)
       if (sctx->gfx_level >= GFX11) {
          radeon_opt_set_context_reg(sctx, R_028424_CB_FDCC_CONTROL, SI_TRACKED_CB_DCC_CONTROL,
                                     S_028424_SAMPLE_MASK_TRACKER_DISABLE(oc_disable) |
-                                    S_028424_SAMPLE_MASK_TRACKER_WATERMARK(15));
+                                    S_028424_SAMPLE_MASK_TRACKER_WATERMARK(0));
       } else {
          radeon_opt_set_context_reg(
             sctx, R_028424_CB_DCC_CONTROL, SI_TRACKED_CB_DCC_CONTROL,
@@ -193,7 +193,8 @@ static void si_emit_cb_render_state(struct si_context *sctx)
                 spi_format == V_028714_SPI_SHADER_UINT16_ABGR ||
                 spi_format == V_028714_SPI_SHADER_SINT16_ABGR) {
                sx_ps_downconvert |= V_028754_SX_RT_EXPORT_8_8_8_8 << (i * 4);
-               sx_blend_opt_epsilon |= V_028758_8BIT_FORMAT << (i * 4);
+               if (G_028C70_NUMBER_TYPE(surf->cb_color_info) != V_028C70_NUMBER_SRGB)
+                  sx_blend_opt_epsilon |= V_028758_8BIT_FORMAT << (i * 4);
             }
             break;
 
@@ -3302,6 +3303,11 @@ static void si_emit_framebuffer_state(struct si_context *sctx)
                            S_028C78_DISABLE_CONSTANT_ENCODE_REG(1) |
                            S_028C78_FDCC_ENABLE(vi_dcc_enabled(tex, cb->base.u.tex.level));
 
+         if (sctx->family >= CHIP_GFX1103_R2) {
+            cb_fdcc_control |= S_028C78_ENABLE_MAX_COMP_FRAG_OVERRIDE(1) |
+                               S_028C78_MAX_COMP_FRAGS(cb->base.texture->nr_samples >= 4);
+         }
+
          radeon_set_context_reg_seq(R_028C6C_CB_COLOR0_VIEW + i * 0x3C, 4);
          radeon_emit(cb->cb_color_view);                      /* CB_COLOR0_VIEW */
          radeon_emit(cb_color_info);                          /* CB_COLOR0_INFO */
@@ -5587,9 +5593,9 @@ void si_init_cs_preamble_state(struct si_context *sctx, bool uses_reg_shadowing)
       si_pm4_set_reg(pm4, R_028AC8_DB_PRELOAD_CONTROL, 0x0);
       si_pm4_set_reg(pm4, R_02800C_DB_RENDER_OVERRIDE, 0);
       si_pm4_set_reg(pm4, R_028A8C_VGT_PRIMITIVEID_RESET, 0x0);
-      si_pm4_set_reg(pm4, R_028B98_VGT_STRMOUT_BUFFER_CONFIG, 0x0);
 
       if (sctx->gfx_level < GFX11) {
+         si_pm4_set_reg(pm4, R_028B98_VGT_STRMOUT_BUFFER_CONFIG, 0x0);
          si_pm4_set_reg(pm4, R_028A5C_VGT_GS_PER_VS, 0x2);
          si_pm4_set_reg(pm4, R_028AB8_VGT_VTX_CNT_EN, 0x0);
       }
diff --git a/lib/mesa/src/gallium/drivers/svga/svga_format.c b/lib/mesa/src/gallium/drivers/svga/svga_format.c
index 6cfc92b6f..75e41f37e 100644
--- a/lib/mesa/src/gallium/drivers/svga/svga_format.c
+++ b/lib/mesa/src/gallium/drivers/svga/svga_format.c
@@ -1438,7 +1438,10 @@ static const struct format_cap format_cap_table[] = {
 
 static const SVGA3dSurfaceFormat compat_x8r8g8b8[] = {
    SVGA3D_X8R8G8B8, SVGA3D_A8R8G8B8, SVGA3D_B8G8R8X8_UNORM,
-   SVGA3D_B8G8R8A8_UNORM, 0
+   SVGA3D_B8G8R8A8_UNORM, SVGA3D_B8G8R8X8_TYPELESS, SVGA3D_B8G8R8A8_TYPELESS, 0
+};
+static const SVGA3dSurfaceFormat compat_r8g8b8a8[] = {
+   SVGA3D_R8G8B8A8_UNORM, SVGA3D_R8G8B8A8_TYPELESS, 0
 };
 static const SVGA3dSurfaceFormat compat_r8[] = {
    SVGA3D_R8_UNORM, SVGA3D_NV12, SVGA3D_YV12, 0
@@ -1453,6 +1456,7 @@ static const SVGA3dSurfaceFormat compat_r5g6b5[] = {
 static const struct format_compat_entry format_compats[] = {
    {PIPE_FORMAT_B8G8R8X8_UNORM, compat_x8r8g8b8},
    {PIPE_FORMAT_B8G8R8A8_UNORM, compat_x8r8g8b8},
+   {PIPE_FORMAT_R8G8B8A8_UNORM, compat_r8g8b8a8},
    {PIPE_FORMAT_R8_UNORM, compat_r8},
    {PIPE_FORMAT_R8G8_UNORM, compat_g8r8},
    {PIPE_FORMAT_B5G6R5_UNORM, compat_r5g6b5}
diff --git a/lib/mesa/src/gallium/drivers/svga/svga_resource_texture.c b/lib/mesa/src/gallium/drivers/svga/svga_resource_texture.c
index f2ab20edb..d7d15f99e 100644
--- a/lib/mesa/src/gallium/drivers/svga/svga_resource_texture.c
+++ b/lib/mesa/src/gallium/drivers/svga/svga_resource_texture.c
@@ -1,5 +1,5 @@
 /**********************************************************
- * Copyright 2008-2009 VMware, Inc.  All rights reserved.
+ * Copyright 2008-2023 VMware, Inc.  All rights reserved.
  *
  * Permission is hereby granted, free of charge, to any person
  * obtaining a copy of this software and associated documentation
@@ -209,7 +209,9 @@ svga_resource_get_handle(struct pipe_screen *screen,
    if (texture->target == PIPE_BUFFER)
       return false;
 
-   assert(svga_texture(texture)->key.cachable == 0);
+   SVGA_DBG(DEBUG_DMA, "%s: texture=%p cachable=%d\n", __FUNCTION__,
+            texture, svga_texture(texture)->key.cachable);
+
    svga_texture(texture)->key.cachable = 0;
 
    stride = util_format_get_nblocksx(texture->format, texture->width0) *
@@ -355,7 +357,7 @@ svga_texture_transfer_map_direct(struct svga_context *svga,
    else {
       assert(usage & PIPE_MAP_WRITE);
       if ((usage & PIPE_MAP_UNSYNCHRONIZED) == 0) {
-         if (svga_is_texture_dirty(tex, st->slice, level)) {
+         if (svga_is_texture_level_dirty(tex, st->slice, level)) {
             /*
              * do a surface flush if the subresource has been modified
              * in this command buffer.
@@ -565,14 +567,15 @@ svga_texture_transfer_map(struct pipe_context *pipe,
                                !(st->base.usage & PIPE_MAP_READ);
       boolean was_rendered_to =
          svga_was_texture_rendered_to(svga_texture(texture));
+      boolean is_dirty = svga_is_texture_dirty(svga_texture(texture));
 
-      /* If the texture was already rendered to and upload buffer
-       * is supported, then we will use upload buffer to
+      /* If the texture was already rendered to or has pending changes and
+       * upload buffer is supported, then we will use upload buffer to
        * avoid the need to read back the texture content; otherwise,
        * we'll first try to map directly to the GB surface, if it is blocked,
        * then we'll try the upload buffer.
        */
-      if (was_rendered_to && can_use_upload) {
+      if ((was_rendered_to || is_dirty) && can_use_upload) {
          map = svga_texture_transfer_map_upload(svga, st);
       }
       else {
diff --git a/lib/mesa/src/gallium/drivers/svga/svga_resource_texture.h b/lib/mesa/src/gallium/drivers/svga/svga_resource_texture.h
index e1872faad..32b42dd0e 100644
--- a/lib/mesa/src/gallium/drivers/svga/svga_resource_texture.h
+++ b/lib/mesa/src/gallium/drivers/svga/svga_resource_texture.h
@@ -1,5 +1,5 @@
 /**********************************************************
- * Copyright 2008-2009 VMware, Inc.  All rights reserved.
+ * Copyright 2008-2023 VMware, Inc.  All rights reserved.
  *
  * Permission is hereby granted, free of charge, to any person
  * obtaining a copy of this software and associated documentation
@@ -85,6 +85,11 @@ struct svga_texture
     */
    boolean can_use_upload;
 
+   /**
+    * Whether texture is modified.  Set if any of the dirty bits is set.
+    */
+   boolean modified;
+
    unsigned size;  /**< Approximate size in bytes */
 
    /** array indexed by cube face or 3D/array slice, one bit per mipmap level */
@@ -242,6 +247,7 @@ svga_set_texture_dirty(struct svga_texture *tex,
 {
    check_face_level(tex, face, level);
    tex->dirty[face] |= 1 << level;
+   tex->modified = TRUE;
 }
 
 static inline void
@@ -251,16 +257,23 @@ svga_clear_texture_dirty(struct svga_texture *tex)
    for (i = 0; i < tex->b.depth0 * tex->b.array_size; i++) {
       tex->dirty[i] = 0;
    }
+   tex->modified = FALSE;
 }
 
 static inline boolean
-svga_is_texture_dirty(const struct svga_texture *tex,
-                      unsigned face, unsigned level)
+svga_is_texture_level_dirty(const struct svga_texture *tex,
+                            unsigned face, unsigned level)
 {
    check_face_level(tex, face, level);
    return !!(tex->dirty[face] & (1 << level));
 }
 
+static inline boolean
+svga_is_texture_dirty(const struct svga_texture *tex)
+{
+   return tex->modified;
+}
+
 struct pipe_resource *
 svga_texture_create(struct pipe_screen *screen,
                     const struct pipe_resource *template);
diff --git a/lib/mesa/src/gallium/drivers/svga/svga_screen_cache.c b/lib/mesa/src/gallium/drivers/svga/svga_screen_cache.c
index 38ec50c48..89705fb3a 100644
--- a/lib/mesa/src/gallium/drivers/svga/svga_screen_cache.c
+++ b/lib/mesa/src/gallium/drivers/svga/svga_screen_cache.c
@@ -573,7 +573,11 @@ svga_screen_surface_create(struct svga_screen *svgascreen,
       /* Unable to recycle surface, allocate a new one */
       unsigned usage = 0;
 
-      if (!key->cachable)
+      /* mark the surface as shareable if the surface is not
+       * cachable or the RENDER_TARGET bind flag is set.
+       */
+      if (!key->cachable ||
+          ((bind_flags & PIPE_BIND_RENDER_TARGET) != 0))
          usage |= SVGA_SURFACE_USAGE_SHARED;
       if (key->scanout)
          usage |= SVGA_SURFACE_USAGE_SCANOUT;