Import libdrm 2.4.123

58 files changed, 855 insertions, 153 deletions

diff --git a/lib/libdrm/.gitlab-ci.yml b/lib/libdrm/.gitlab-ci.yml
index 6e8655faa..ca8972cbe 100644
--- a/lib/libdrm/.gitlab-ci.yml
+++ b/lib/libdrm/.gitlab-ci.yml
@@ -12,7 +12,7 @@
 # main repository, it's recommended to remove the image from the source
 # repository's container registry, so that the image from the main
 # repository's registry will be used there as well.
-.templates_sha: &template_sha 567700e483aabed992d0a4fea84994a0472deff6 # see https://docs.gitlab.com/ee/ci/yaml/#includefile
+.templates_sha: &template_sha b61a03cabbf308e81289f7aaaf0b5a80a34ffb99 # see https://docs.gitlab.com/ee/ci/yaml/#includefile
 
 include:
   - project: 'freedesktop/ci-templates'
@@ -39,12 +39,11 @@ stages:
 .os-debian:
   variables:
     BUILD_OS: debian
-    FDO_DISTRIBUTION_VERSION: buster
+    FDO_DISTRIBUTION_VERSION: bookworm
     FDO_DISTRIBUTION_PACKAGES: 'build-essential docbook-xsl libatomic-ops-dev libcairo2-dev libcunit1-dev libpciaccess-dev meson ninja-build pkg-config python3 python3-pip python3-wheel python3-setuptools python3-docutils valgrind'
-    FDO_DISTRIBUTION_EXEC: 'pip3 install meson==0.59.0'
     # bump this tag every time you change something which requires rebuilding the
     # base image
-    FDO_DISTRIBUTION_TAG: "2023-09-01.0"
+    FDO_DISTRIBUTION_TAG: "2024-06-25.0"
 
 .debian-x86_64:
   extends:
@@ -67,11 +66,11 @@ stages:
 .os-freebsd:
   variables:
     BUILD_OS: freebsd
-    FDO_DISTRIBUTION_VERSION: "13.2"
+    FDO_DISTRIBUTION_VERSION: "14.1"
     FDO_DISTRIBUTION_PACKAGES: 'meson ninja pkgconf libpciaccess py39-docutils cairo'
     # bump this tag every time you change something which requires rebuilding the
     # base image
-    FDO_DISTRIBUTION_TAG: "2023-07-20.0"
+    FDO_DISTRIBUTION_TAG: "2026-26-25.0"
 
 .freebsd-x86_64:
   extends:
@@ -190,8 +189,8 @@ x86_64-freebsd-container_prep:
   variables:
     GIT_DEPTH: 10
   script:
-    - meson build
-        --auto-features=enabled
+    - meson setup build
+        --fatal-meson-warnings --auto-features=enabled
         -D udev=true
     - ninja -C build
     - ninja -C build test
@@ -213,7 +212,7 @@ x86_64-freebsd-container_prep:
     # the workspace to see details about the failed tests.
     - |
       set +e
-      /app/vmctl exec "pkg info; cd $CI_PROJECT_NAME ; meson build --auto-features=enabled -D etnaviv=disabled -D nouveau=disabled -D valgrind=disabled && ninja -C build"
+      /app/vmctl exec "pkg info; cd $CI_PROJECT_NAME ; meson setup build --fatal-meson-warnings --auto-features=enabled -D etnaviv=disabled -D nouveau=disabled -D valgrind=disabled && ninja -C build"
       set -ex
       scp -r vm:$CI_PROJECT_NAME/build/meson-logs .
       /app/vmctl exec "ninja -C $CI_PROJECT_NAME/build install"
diff --git a/lib/libdrm/Android.bp b/lib/libdrm/Android.bp
new file mode 100644
index 000000000..5e0763c7b
--- /dev/null
+++ b/lib/libdrm/Android.bp
@@ -0,0 +1,85 @@
+//
+// Copyright © 2011-2012 Intel Corporation
+//
+// Permission is hereby granted, free of charge, to any person obtaining a
+// copy of this software and associated documentation files (the "Software"),
+// to deal in the Software without restriction, including without limitation
+// the rights to use, copy, modify, merge, publish, distribute, sublicense,
+// and/or sell copies of the Software, and to permit persons to whom the
+// Software is furnished to do so, subject to the following conditions:
+//
+// The above copyright notice and this permission notice (including the next
+// paragraph) shall be included in all copies or substantial portions of the
+// Software.
+//
+// THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+// IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+// FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
+// THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+// LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+// FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
+// IN THE SOFTWARE.
+//
+
+subdirs = ["*"]
+build = ["Android.sources.bp"]
+
+cc_defaults {
+    name: "libdrm_defaults",
+    cflags: [
+        // XXX: Consider moving these to config.h analogous to autoconf.
+        "-DMAJOR_IN_SYSMACROS=1",
+        "-DHAVE_VISIBILITY=1",
+        "-DHAVE_LIBDRM_ATOMIC_PRIMITIVES=1",
+
+        "-Wall",
+        "-Werror",
+        "-Wno-deprecated-declarations",
+        "-Wno-format",
+        "-Wno-gnu-variable-sized-type-not-at-end",
+        "-Wno-implicit-function-declaration",
+        "-Wno-int-conversion",
+        "-Wno-missing-field-initializers",
+        "-Wno-pointer-arith",
+        "-Wno-unused-parameter",
+        "-Wno-unused-variable",
+    ],
+    export_system_include_dirs: ["."],
+}
+
+cc_library_headers {
+    name: "libdrm_headers",
+    vendor_available: true,
+    host_supported: true,
+    defaults: ["libdrm_defaults"],
+    export_include_dirs: ["include/drm", "android"],
+    apex_available: [
+        "//apex_available:platform",
+        "com.android.virt",
+    ],
+}
+
+// Library for the device
+cc_library {
+    name: "libdrm",
+    recovery_available: true,
+    vendor_available: true,
+    host_supported: true,
+    defaults: [
+        "libdrm_defaults",
+        "libdrm_sources",
+    ],
+
+    export_include_dirs: ["include/drm", "android"],
+
+    cflags: [
+        "-Wno-enum-conversion",
+        "-Wno-pointer-arith",
+        "-Wno-sign-compare",
+        "-Wno-tautological-compare",
+    ],
+    apex_available: [
+        "//apex_available:platform",
+        "com.android.virt",
+    ],
+}
diff --git a/lib/libdrm/Android.sources.bp b/lib/libdrm/Android.sources.bp
new file mode 100644
index 000000000..73356dd80
--- /dev/null
+++ b/lib/libdrm/Android.sources.bp
@@ -0,0 +1,12 @@
+// Autogenerated with Android.sources.bp.mk
+
+cc_defaults {
+    name: "libdrm_sources",
+    srcs: [
+        "xf86drm.c",
+        "xf86drmHash.c",
+        "xf86drmRandom.c",
+        "xf86drmSL.c",
+        "xf86drmMode.c",
+    ],
+}
diff --git a/lib/libdrm/Android.sources.bp.mk b/lib/libdrm/Android.sources.bp.mk
new file mode 100644
index 000000000..26b61c1ec
--- /dev/null
+++ b/lib/libdrm/Android.sources.bp.mk
@@ -0,0 +1,25 @@
+# Usage: make -f path/to/Android.sources.bp.mk NAMES=<> >Android.sources.bp
+#
+# It will read the Makefile.sources in the current directory, and
+# write <NAME>_FILES to stdout as an Android.bp cc_defaults module.
+
+.PHONY: all
+all:
+	@# Do nothing
+
+include Makefile.sources
+
+empty :=
+indent := $(empty)    $(empty)
+
+$(info // Autogenerated with Android.sources.bp.mk)
+$(foreach NAME,$(NAMES), \
+  $(eval lower_name := $(shell echo $(PREFIX)$(NAME) | tr 'A-Z' 'a-z')) \
+  $(info ) \
+  $(info cc_defaults {) \
+  $(info $(indent)name: "$(lower_name)_sources",) \
+  $(info $(indent)srcs: [) \
+  $(foreach f,$(filter %.c,$($(NAME)_FILES)), \
+    $(info $(indent)$(indent)"$(f)",)) \
+  $(info $(indent)],) \
+  $(info }))
diff --git a/lib/libdrm/amdgpu/Android.bp b/lib/libdrm/amdgpu/Android.bp
new file mode 100644
index 000000000..976f03e9d
--- /dev/null
+++ b/lib/libdrm/amdgpu/Android.bp
@@ -0,0 +1,16 @@
+build = ["Android.sources.bp"]
+
+cc_library_shared {
+    name: "libdrm_amdgpu",
+
+    cflags: [
+	"-DAMDGPU_ASIC_ID_TABLE=\"/vendor/etc/hwdata/amdgpu.ids\""
+    ],
+
+    defaults: [
+        "libdrm_defaults",
+        "libdrm_amdgpu_sources",
+    ],
+    vendor: true,
+    shared_libs: ["libdrm"],
+}
diff --git a/lib/libdrm/amdgpu/Android.sources.bp b/lib/libdrm/amdgpu/Android.sources.bp
new file mode 100644
index 000000000..e2a2888be
--- /dev/null
+++ b/lib/libdrm/amdgpu/Android.sources.bp
@@ -0,0 +1,15 @@
+// Autogenerated with Android.sources.bp.mk
+
+cc_defaults {
+    name: "libdrm_amdgpu_sources",
+    srcs: [
+        "amdgpu_asic_id.c",
+        "amdgpu_bo.c",
+        "amdgpu_cs.c",
+        "amdgpu_device.c",
+        "amdgpu_gpu_info.c",
+        "amdgpu_vamgr.c",
+        "amdgpu_vm.c",
+        "handle_table.c",
+    ],
+}
diff --git a/lib/libdrm/amdgpu/amdgpu-symbols.txt b/lib/libdrm/amdgpu/amdgpu-symbols.txt
index 530b343be..594480e39 100644
--- a/lib/libdrm/amdgpu/amdgpu-symbols.txt
+++ b/lib/libdrm/amdgpu/amdgpu-symbols.txt
@@ -56,6 +56,7 @@ amdgpu_cs_wait_semaphore
 amdgpu_device_deinitialize
 amdgpu_device_get_fd
 amdgpu_device_initialize
+amdgpu_device_initialize2
 amdgpu_find_bo_by_cpu_mapping
 amdgpu_get_marketing_name
 amdgpu_query_buffer_size_alignment
@@ -71,7 +72,11 @@ amdgpu_query_info
 amdgpu_query_sensor_info
 amdgpu_query_video_caps_info
 amdgpu_read_mm_registers
+amdgpu_va_manager_alloc
+amdgpu_va_manager_init
+amdgpu_va_manager_deinit
 amdgpu_va_range_alloc
+amdgpu_va_range_alloc2
 amdgpu_va_range_free
 amdgpu_va_get_start_addr
 amdgpu_va_range_query
diff --git a/lib/libdrm/amdgpu/amdgpu.h b/lib/libdrm/amdgpu/amdgpu.h
index 9bdbf366a..c9c1f12e0 100644
--- a/lib/libdrm/amdgpu/amdgpu.h
+++ b/lib/libdrm/amdgpu/amdgpu.h
@@ -139,6 +139,12 @@ typedef struct amdgpu_bo_list *amdgpu_bo_list_handle;
 typedef struct amdgpu_va *amdgpu_va_handle;
 
 /**
+ * Define handle dealing with VA allocation. An amdgpu_device
+ * owns one of these, but they can also be used without a device.
+ */
+typedef struct amdgpu_va_manager *amdgpu_va_manager_handle;
+
+/**
  * Define handle for semaphore
  */
 typedef struct amdgpu_semaphore *amdgpu_semaphore_handle;
@@ -528,6 +534,20 @@ int amdgpu_device_initialize(int fd,
 			     amdgpu_device_handle *device_handle);
 
 /**
+ * Same as amdgpu_device_initialize() except when deduplicate_device
+ * is false *and* fd points to a device that was already initialized.
+ * In this case, amdgpu_device_initialize would return the same
+ * amdgpu_device_handle while here amdgpu_device_initialize2 would
+ * return a new handle.
+ * amdgpu_device_initialize() should be preferred in most situations;
+ * the only use-case where not-deduplicating devices make sense is
+ * when one wants to have isolated device handles in the same process.
+ */
+int amdgpu_device_initialize2(int fd, bool deduplicate_device,
+			      uint32_t *major_version,
+			      uint32_t *minor_version,
+			      amdgpu_device_handle *device_handle);
+/**
  *
  * When access to such library does not needed any more the special
  * function must be call giving opportunity to clean up any
@@ -1411,6 +1431,37 @@ int amdgpu_va_range_query(amdgpu_device_handle dev,
 			  uint64_t *end);
 
 /**
+ * Allocate a amdgpu_va_manager object.
+ * The returned object has be initialized with the amdgpu_va_manager_init
+ * before use.
+ * On release, amdgpu_va_manager_deinit needs to be called, then the memory
+ * can be released using free().
+ */
+amdgpu_va_manager_handle amdgpu_va_manager_alloc(void);
+
+void amdgpu_va_manager_init(amdgpu_va_manager_handle va_mgr,
+			    uint64_t low_va_offset, uint64_t low_va_max,
+			    uint64_t high_va_offset, uint64_t high_va_max,
+			    uint32_t virtual_address_alignment);
+
+void amdgpu_va_manager_deinit(amdgpu_va_manager_handle va_mgr);
+
+/**
+ * Similar to #amdgpu_va_range_alloc() but allocates VA
+ * directly from an amdgpu_va_manager_handle instead of using
+ * the manager from an amdgpu_device.
+ */
+
+int amdgpu_va_range_alloc2(amdgpu_va_manager_handle va_mgr,
+			   enum amdgpu_gpu_va_range va_range_type,
+			   uint64_t size,
+			   uint64_t va_base_alignment,
+			   uint64_t va_base_required,
+			   uint64_t *va_base_allocated,
+			   amdgpu_va_handle *va_range_handle,
+			   uint64_t flags);
+
+/**
  *  VA mapping/unmapping for the buffer object
  *
  * \param  bo		- \c [in] BO handle
diff --git a/lib/libdrm/amdgpu/amdgpu_cs.c b/lib/libdrm/amdgpu/amdgpu_cs.c
index 49fc16c3e..2db49675e 100644
--- a/lib/libdrm/amdgpu/amdgpu_cs.c
+++ b/lib/libdrm/amdgpu/amdgpu_cs.c
@@ -598,24 +598,31 @@ drm_public int amdgpu_cs_signal_semaphore(amdgpu_context_handle ctx,
 			       uint32_t ring,
 			       amdgpu_semaphore_handle sem)
 {
+	int ret;
+
 	if (!ctx || !sem)
 		return -EINVAL;
 	if (ip_type >= AMDGPU_HW_IP_NUM)
 		return -EINVAL;
 	if (ring >= AMDGPU_CS_MAX_RINGS)
 		return -EINVAL;
-	/* sem has been signaled */
-	if (sem->signal_fence.context)
-		return -EINVAL;
+
 	pthread_mutex_lock(&ctx->sequence_mutex);
+	/* sem has been signaled */
+	if (sem->signal_fence.context) {
+		ret = -EINVAL;
+		goto unlock;
+	}
 	sem->signal_fence.context = ctx;
 	sem->signal_fence.ip_type = ip_type;
 	sem->signal_fence.ip_instance = ip_instance;
 	sem->signal_fence.ring = ring;
 	sem->signal_fence.fence = ctx->last_seq[ip_type][ip_instance][ring];
 	update_references(NULL, &sem->refcount);
+	ret = 0;
+unlock:
 	pthread_mutex_unlock(&ctx->sequence_mutex);
-	return 0;
+	return ret;
 }
 
 drm_public int amdgpu_cs_wait_semaphore(amdgpu_context_handle ctx,
diff --git a/lib/libdrm/amdgpu/amdgpu_device.c b/lib/libdrm/amdgpu/amdgpu_device.c
index aeb5e3c54..34463b533 100644
--- a/lib/libdrm/amdgpu/amdgpu_device.c
+++ b/lib/libdrm/amdgpu/amdgpu_device.c
@@ -95,22 +95,26 @@ static int amdgpu_get_auth(int fd, int *auth)
 
 static void amdgpu_device_free_internal(amdgpu_device_handle dev)
 {
-	amdgpu_device_handle *node = &dev_list;
-
-	pthread_mutex_lock(&dev_mutex);
-	while (*node != dev && (*node)->next)
-		node = &(*node)->next;
-	*node = (*node)->next;
-	pthread_mutex_unlock(&dev_mutex);
+	/* Remove dev from dev_list, if it was added there. */
+	if (dev == dev_list) {
+		dev_list = dev->next;
+	} else {
+		for (amdgpu_device_handle node = dev_list; node; node = node->next) {
+			if (node->next == dev) {
+				node->next = dev->next;
+				break;
+			}
+		}
+	}
 
 	close(dev->fd);
 	if ((dev->flink_fd >= 0) && (dev->fd != dev->flink_fd))
 		close(dev->flink_fd);
 
-	amdgpu_vamgr_deinit(&dev->vamgr_32);
-	amdgpu_vamgr_deinit(&dev->vamgr);
-	amdgpu_vamgr_deinit(&dev->vamgr_high_32);
-	amdgpu_vamgr_deinit(&dev->vamgr_high);
+	amdgpu_vamgr_deinit(&dev->va_mgr.vamgr_32);
+	amdgpu_vamgr_deinit(&dev->va_mgr.vamgr_low);
+	amdgpu_vamgr_deinit(&dev->va_mgr.vamgr_high_32);
+	amdgpu_vamgr_deinit(&dev->va_mgr.vamgr_high);
 	handle_table_fini(&dev->bo_handles);
 	handle_table_fini(&dev->bo_flink_names);
 	pthread_mutex_destroy(&dev->bo_table_mutex);
@@ -140,22 +144,23 @@ static void amdgpu_device_reference(struct amdgpu_device **dst,
 	*dst = src;
 }
 
-drm_public int amdgpu_device_initialize(int fd,
-					uint32_t *major_version,
-					uint32_t *minor_version,
-					amdgpu_device_handle *device_handle)
+static int _amdgpu_device_initialize(int fd,
+				     uint32_t *major_version,
+				     uint32_t *minor_version,
+				     amdgpu_device_handle *device_handle,
+				     bool deduplicate_device)
 {
-	struct amdgpu_device *dev;
+	struct amdgpu_device *dev = NULL;
 	drmVersionPtr version;
 	int r;
 	int flag_auth = 0;
 	int flag_authexist=0;
 	uint32_t accel_working = 0;
-	uint64_t start, max;
 
 	*device_handle = NULL;
 
 	pthread_mutex_lock(&dev_mutex);
+
 	r = amdgpu_get_auth(fd, &flag_auth);
 	if (r) {
 		fprintf(stderr, "%s: amdgpu_get_auth (1) failed (%i)\n",
@@ -164,9 +169,10 @@ drm_public int amdgpu_device_initialize(int fd,
 		return r;
 	}
 
-	for (dev = dev_list; dev; dev = dev->next)
-		if (fd_compare(dev->fd, fd) == 0)
-			break;
+	if (deduplicate_device)
+		for (dev = dev_list; dev; dev = dev->next)
+			if (fd_compare(dev->fd, fd) == 0)
+				break;
 
 	if (dev) {
 		r = amdgpu_get_auth(dev->fd, &flag_authexist);
@@ -238,35 +244,22 @@ drm_public int amdgpu_device_initialize(int fd,
 		goto cleanup;
 	}
 
-	start = dev->dev_info.virtual_address_offset;
-	max = MIN2(dev->dev_info.virtual_address_max, 0x100000000ULL);
-	amdgpu_vamgr_init(&dev->vamgr_32, start, max,
-			  dev->dev_info.virtual_address_alignment);
-
-	start = max;
-	max = MAX2(dev->dev_info.virtual_address_max, 0x100000000ULL);
-	amdgpu_vamgr_init(&dev->vamgr, start, max,
-			  dev->dev_info.virtual_address_alignment);
-
-	start = dev->dev_info.high_va_offset;
-	max = MIN2(dev->dev_info.high_va_max, (start & ~0xffffffffULL) +
-		   0x100000000ULL);
-	amdgpu_vamgr_init(&dev->vamgr_high_32, start, max,
-			  dev->dev_info.virtual_address_alignment);
-
-	start = max;
-	max = MAX2(dev->dev_info.high_va_max, (start & ~0xffffffffULL) +
-		   0x100000000ULL);
-	amdgpu_vamgr_init(&dev->vamgr_high, start, max,
-			  dev->dev_info.virtual_address_alignment);
+	amdgpu_va_manager_init(&dev->va_mgr,
+			       dev->dev_info.virtual_address_offset,
+			       dev->dev_info.virtual_address_max,
+			       dev->dev_info.high_va_offset,
+			       dev->dev_info.high_va_max,
+			       dev->dev_info.virtual_address_alignment);
 
 	amdgpu_parse_asic_ids(dev);
 
 	*major_version = dev->major_version;
 	*minor_version = dev->minor_version;
 	*device_handle = dev;
-	dev->next = dev_list;
-	dev_list = dev;
+	if (deduplicate_device) {
+		dev->next = dev_list;
+		dev_list = dev;
+	}
 	pthread_mutex_unlock(&dev_mutex);
 
 	return 0;
@@ -279,9 +272,27 @@ cleanup:
 	return r;
 }
 
+drm_public int amdgpu_device_initialize(int fd,
+					uint32_t *major_version,
+					uint32_t *minor_version,
+					amdgpu_device_handle *device_handle)
+{
+	return _amdgpu_device_initialize(fd, major_version, minor_version, device_handle, true);
+}
+
+drm_public int amdgpu_device_initialize2(int fd, bool deduplicate_device,
+					 uint32_t *major_version,
+					 uint32_t *minor_version,
+					 amdgpu_device_handle *device_handle)
+{
+	return _amdgpu_device_initialize(fd, major_version, minor_version, device_handle, deduplicate_device);
+}
+
 drm_public int amdgpu_device_deinitialize(amdgpu_device_handle dev)
 {
+	pthread_mutex_lock(&dev_mutex);
 	amdgpu_device_reference(&dev, NULL);
+	pthread_mutex_unlock(&dev_mutex);
 	return 0;
 }
 
@@ -306,10 +317,10 @@ drm_public int amdgpu_query_sw_info(amdgpu_device_handle dev,
 
 	switch (info) {
 	case amdgpu_sw_info_address32_hi:
-		if (dev->vamgr_high_32.va_max)
-			*val32 = (dev->vamgr_high_32.va_max - 1) >> 32;
+		if (dev->va_mgr.vamgr_high_32.va_max)
+			*val32 = (dev->va_mgr.vamgr_high_32.va_max - 1) >> 32;
 		else
-			*val32 = (dev->vamgr_32.va_max - 1) >> 32;
+			*val32 = (dev->va_mgr.vamgr_32.va_max - 1) >> 32;
 		return 0;
 	}
 	return -EINVAL;
diff --git a/lib/libdrm/amdgpu/amdgpu_internal.h b/lib/libdrm/amdgpu/amdgpu_internal.h
index 2834c9c6a..af85b8491 100644
--- a/lib/libdrm/amdgpu/amdgpu_internal.h
+++ b/lib/libdrm/amdgpu/amdgpu_internal.h
@@ -63,6 +63,17 @@ struct amdgpu_va {
 	struct amdgpu_bo_va_mgr *vamgr;
 };
 
+struct amdgpu_va_manager {
+	/** The VA manager for the lower virtual address space */
+	struct amdgpu_bo_va_mgr vamgr_low;
+	/** The VA manager for the 32bit address space */
+	struct amdgpu_bo_va_mgr vamgr_32;
+	/** The VA manager for the high virtual address space */
+	struct amdgpu_bo_va_mgr vamgr_high;
+	/** The VA manager for the 32bit high address space */
+	struct amdgpu_bo_va_mgr vamgr_high_32;
+};
+
 struct amdgpu_device {
 	atomic_t refcount;
 	struct amdgpu_device *next;
@@ -80,14 +91,8 @@ struct amdgpu_device {
 	pthread_mutex_t bo_table_mutex;
 	struct drm_amdgpu_info_device dev_info;
 	struct amdgpu_gpu_info info;
-	/** The VA manager for the lower virtual address space */
-	struct amdgpu_bo_va_mgr vamgr;
-	/** The VA manager for the 32bit address space */
-	struct amdgpu_bo_va_mgr vamgr_32;
-	/** The VA manager for the high virtual address space */
-	struct amdgpu_bo_va_mgr vamgr_high;
-	/** The VA manager for the 32bit high address space */
-	struct amdgpu_bo_va_mgr vamgr_high_32;
+
+	struct amdgpu_va_manager va_mgr;
 };
 
 struct amdgpu_bo {
diff --git a/lib/libdrm/amdgpu/amdgpu_vamgr.c b/lib/libdrm/amdgpu/amdgpu_vamgr.c
index 2c4c9dbab..29944ec83 100644
--- a/lib/libdrm/amdgpu/amdgpu_vamgr.c
+++ b/lib/libdrm/amdgpu/amdgpu_vamgr.c
@@ -229,24 +229,39 @@ drm_public int amdgpu_va_range_alloc(amdgpu_device_handle dev,
 				     amdgpu_va_handle *va_range_handle,
 				     uint64_t flags)
 {
+	return amdgpu_va_range_alloc2(&dev->va_mgr, va_range_type, size,
+				      va_base_alignment, va_base_required,
+				      va_base_allocated, va_range_handle,
+				      flags);
+}
+
+drm_public int amdgpu_va_range_alloc2(amdgpu_va_manager_handle va_mgr,
+				      enum amdgpu_gpu_va_range va_range_type,
+				      uint64_t size,
+				      uint64_t va_base_alignment,
+				      uint64_t va_base_required,
+				      uint64_t *va_base_allocated,
+				      amdgpu_va_handle *va_range_handle,
+				      uint64_t flags)
+{
 	struct amdgpu_bo_va_mgr *vamgr;
 	bool search_from_top = !!(flags & AMDGPU_VA_RANGE_REPLAYABLE);
 	int ret;
 
 	/* Clear the flag when the high VA manager is not initialized */
-	if (flags & AMDGPU_VA_RANGE_HIGH && !dev->vamgr_high_32.va_max)
+	if (flags & AMDGPU_VA_RANGE_HIGH && !va_mgr->vamgr_high_32.va_max)
 		flags &= ~AMDGPU_VA_RANGE_HIGH;
 
 	if (flags & AMDGPU_VA_RANGE_HIGH) {
 		if (flags & AMDGPU_VA_RANGE_32_BIT)
-			vamgr = &dev->vamgr_high_32;
+			vamgr = &va_mgr->vamgr_high_32;
 		else
-			vamgr = &dev->vamgr_high;
+			vamgr = &va_mgr->vamgr_high;
 	} else {
 		if (flags & AMDGPU_VA_RANGE_32_BIT)
-			vamgr = &dev->vamgr_32;
+			vamgr = &va_mgr->vamgr_32;
 		else
-			vamgr = &dev->vamgr;
+			vamgr = &va_mgr->vamgr_low;
 	}
 
 	va_base_alignment = MAX2(va_base_alignment, vamgr->va_alignment);
@@ -259,9 +274,9 @@ drm_public int amdgpu_va_range_alloc(amdgpu_device_handle dev,
 	if (!(flags & AMDGPU_VA_RANGE_32_BIT) && ret) {
 		/* fallback to 32bit address */
 		if (flags & AMDGPU_VA_RANGE_HIGH)
-			vamgr = &dev->vamgr_high_32;
+			vamgr = &va_mgr->vamgr_high_32;
 		else
-			vamgr = &dev->vamgr_32;
+			vamgr = &va_mgr->vamgr_32;
 		ret = amdgpu_vamgr_find_va(vamgr, size,
 					   va_base_alignment, va_base_required,
 					   search_from_top, va_base_allocated);
@@ -300,3 +315,45 @@ drm_public uint64_t amdgpu_va_get_start_addr(amdgpu_va_handle va_handle)
 {
    return va_handle->address;
 }
+
+drm_public amdgpu_va_manager_handle amdgpu_va_manager_alloc(void)
+{
+	amdgpu_va_manager_handle r = calloc(1, sizeof(struct amdgpu_va_manager));
+	return r;
+}
+
+drm_public void amdgpu_va_manager_init(struct amdgpu_va_manager *va_mgr,
+					uint64_t low_va_offset, uint64_t low_va_max,
+					uint64_t high_va_offset, uint64_t high_va_max,
+					uint32_t virtual_address_alignment)
+{
+	uint64_t start, max;
+
+	start = low_va_offset;
+	max = MIN2(low_va_max, 0x100000000ULL);
+	amdgpu_vamgr_init(&va_mgr->vamgr_32, start, max,
+			  virtual_address_alignment);
+
+	start = max;
+	max = MAX2(low_va_max, 0x100000000ULL);
+	amdgpu_vamgr_init(&va_mgr->vamgr_low, start, max,
+			  virtual_address_alignment);
+
+	start = high_va_offset;
+	max = MIN2(high_va_max, (start & ~0xffffffffULL) + 0x100000000ULL);
+	amdgpu_vamgr_init(&va_mgr->vamgr_high_32, start, max,
+			  virtual_address_alignment);
+
+	start = max;
+	max = MAX2(high_va_max, (start & ~0xffffffffULL) + 0x100000000ULL);
+	amdgpu_vamgr_init(&va_mgr->vamgr_high, start, max,
+			  virtual_address_alignment);
+}
+
+drm_public void amdgpu_va_manager_deinit(struct amdgpu_va_manager *va_mgr)
+{
+	amdgpu_vamgr_deinit(&va_mgr->vamgr_32);
+	amdgpu_vamgr_deinit(&va_mgr->vamgr_low);
+	amdgpu_vamgr_deinit(&va_mgr->vamgr_high_32);
+	amdgpu_vamgr_deinit(&va_mgr->vamgr_high);
+}
diff --git a/lib/libdrm/amdgpu/meson.build b/lib/libdrm/amdgpu/meson.build
index 679de94d4..dd65fbb36 100644
--- a/lib/libdrm/amdgpu/meson.build
+++ b/lib/libdrm/amdgpu/meson.build
@@ -37,7 +37,7 @@ libdrm_amdgpu = library(
   include_directories : [inc_root, inc_drm],
   link_with : libdrm,
   dependencies : [dep_threads, dep_atomic_ops, dep_rt],
-  version : '1.0.0',
+  version : '1.@0@.0'.format(patch_ver),
   install : true,
 )
 
diff --git a/lib/libdrm/data/Android.bp b/lib/libdrm/data/Android.bp
new file mode 100644
index 000000000..47f64371a
--- /dev/null
+++ b/lib/libdrm/data/Android.bp
@@ -0,0 +1,6 @@
+prebuilt_etc {
+    name: "amdgpu.ids",
+    proprietary: true,
+    sub_dir: "hwdata",
+    src: "amdgpu.ids",
+}
diff --git a/lib/libdrm/data/amdgpu.ids b/lib/libdrm/data/amdgpu.ids
index 0e79a5832..914d0e562 100644
--- a/lib/libdrm/data/amdgpu.ids
+++ b/lib/libdrm/data/amdgpu.ids
@@ -29,6 +29,53 @@
 131B,	00,	AMD Radeon R4 Graphics
 131C,	00,	AMD Radeon R7 Graphics
 131D,	00,	AMD Radeon R6 Graphics
+1435,	AE,	AMD Custom GPU 0932
+1506,	C1,	AMD Radeon 610M
+1506,	C2,	AMD Radeon 610M
+1506,	C3,	AMD Radeon 610M
+1506,	C4,	AMD Radeon 610M
+15BF,	00,	AMD Radeon 780M
+15BF,	01,	AMD Radeon 760M
+15BF,	02,	AMD Radeon 780M
+15BF,	03,	AMD Radeon 760M
+15BF,	C1,	AMD Radeon 780M
+15BF,	C2,	AMD Radeon 780M
+15BF,	C3,	AMD Radeon 760M
+15BF,	C4,	AMD Radeon 780M
+15BF,	C5,	AMD Radeon 740M
+15BF,	C6,	AMD Radeon 780M
+15BF,	C7,	AMD Radeon 780M
+15BF,	C8,	AMD Radeon 760M
+15BF,	C9,	AMD Radeon 780M
+15BF,	CA,	AMD Radeon 740M
+15BF,	CB,	AMD Radeon 760M
+15BF,	CD,	AMD Radeon 760M
+15BF,	CF,	AMD Radeon 780M
+15BF,	D0,	AMD Radeon 780M
+15BF,	D1,	AMD Radeon 780M
+15BF,	D2,	AMD Radeon 760M
+15BF,	D3,	AMD Radeon 780M
+15BF,	D4,	AMD Radeon 780M
+15BF,	D5,	AMD Radeon 760M
+15BF,	D6,	AMD Radeon 760M
+15BF,	D7,	AMD Radeon 780M
+15BF,	D8,	AMD Radeon 740M
+15BF,	D9,	AMD Radeon 780M
+15BF,	DA,	AMD Radeon 780M
+15BF,	DB,	AMD Radeon 760M
+15BF,	DC,	AMD Radeon 780M
+15BF,	DD,	AMD Radeon 780M
+15BF,	DE,	AMD Radeon 740M
+15BF,	DF,	AMD Radeon 760M
+15BF,	F0,	AMD Radeon 760M
+15C8,	C1,	AMD Radeon 740M
+15C8,	C2,	AMD Radeon 740M
+15C8,	C3,	AMD Radeon 740M
+15C8,	C4,	AMD Radeon 740M
+15C8,	D1,	AMD Radeon 740M
+15C8,	D2,	AMD Radeon 740M
+15C8,	D3,	AMD Radeon 740M
+15C8,	D4,	AMD Radeon 740M
 15D8,	00,	AMD Radeon RX Vega 8 Graphics WS
 15D8,	91,	AMD Radeon Vega 3 Graphics
 15D8,	91,	AMD Ryzen Embedded R1606G with Radeon Vega Gfx
@@ -101,6 +148,19 @@
 15DD,	E1,	AMD Radeon Vega 3 Graphics
 15DD,	E2,	AMD Radeon Vega 3 Graphics
 163F,	AE,	AMD Custom GPU 0405
+163F,	E1,	AMD Custom GPU 0405
+164E,	D8,	AMD Radeon 610M
+164E,	D9,	AMD Radeon 610M
+164E,	DA,	AMD Radeon 610M
+164E,	DB,	AMD Radeon 610M
+164E,	DC,	AMD Radeon 610M
+1681,	06,	AMD Radeon 680M
+1681,	07,	AMD Radeon 660M
+1681,	0A,	AMD Radeon 680M
+1681,	0B,	AMD Radeon 660M
+1681,	C7,	AMD Radeon 680M
+1681,	C8,	AMD Radeon 680M
+1681,	C9,	AMD Radeon 660M
 6600,	00,	AMD Radeon HD 8600 / 8700M
 6600,	81,	AMD Radeon R7 M370
 6601,	00,	AMD Radeon HD 8500M / 8700M
@@ -368,7 +428,12 @@
 73DF,	C3,	AMD Radeon RX 6800M
 73DF,	C5,	AMD Radeon RX 6700 XT
 73DF,	CF,	AMD Radeon RX 6700M
+73DF,	D5,	AMD Radeon RX 6750 GRE 12GB
 73DF,	D7,	AMD TDC-235
+73DF,	DF,	AMD Radeon RX 6700
+73DF,	E5,	AMD Radeon RX 6750 GRE 12GB
+73DF,	FF,	AMD Radeon RX 6700
+73E0,	00,	AMD Radeon RX 6600M
 73E1,	00,	AMD Radeon Pro W6600M
 73E3,	00,	AMD Radeon Pro W6600
 73EF,	C0,	AMD Radeon RX 6800S
@@ -380,6 +445,8 @@
 73FF,	C3,	AMD Radeon RX 6600M
 73FF,	C7,	AMD Radeon RX 6600
 73FF,	CB,	AMD Radeon RX 6600S
+73FF,	CF,	AMD Radeon RX 6600 LE
+73FF,	DF,	AMD Radeon RX 6750 GRE 10GB
 7408,	00,	AMD Instinct MI250X
 740C,	01,	AMD Instinct MI250X / MI250
 740F,	02,	AMD Instinct MI210
@@ -394,22 +461,33 @@
 743F,	C7,	AMD Radeon RX 6400
 743F,	C8,	AMD Radeon RX 6500M
 743F,	CC,	AMD Radeon 6550S
+743F,	CE,	AMD Radeon RX 6450M
 743F,	CF,	AMD Radeon RX 6300M
+743F,	D3,	AMD Radeon RX 6550M
 743F,	D7,	AMD Radeon RX 6400
 7448,	00,	AMD Radeon Pro W7900
+744A,	00,	AMD Radeon Pro W7900 Dual Slot
 744C,	C8,	AMD Radeon RX 7900 XTX
 744C,	CC,	AMD Radeon RX 7900 XT
 744C,	CE,	AMD Radeon RX 7900 GRE
+744C,	CF,	AMD Radeon RX 7900M
 745E,	CC,	AMD Radeon Pro W7800
+7460,	00,	AMD Radeon Pro V710
+7461,	00,	AMD Radeon Pro V710
+7470,	00,	AMD Radeon Pro W7700
 747E,	C8,	AMD Radeon RX 7800 XT
 747E,	FF,	AMD Radeon RX 7700 XT
 7480,	00,	AMD Radeon Pro W7600
+7480,	C0,	AMD Radeon RX 7600 XT
 7480,	C1,	AMD Radeon RX 7700S
 7480,	C3,	AMD Radeon RX 7600S
 7480,	C7,	AMD Radeon RX 7600M XT
 7480,	CF,	AMD Radeon RX 7600
 7483,	CF,	AMD Radeon RX 7600M
 7489,	00,	AMD Radeon Pro W7500
+74A0,	00,	AMD Instinct MI300A
+74A1,	00,	AMD Instinct MI300X
+74B5,	00,	AMD Instinct MI300X VF
 9830,	00,	AMD Radeon HD 8400 / R3 Series
 9831,	00,	AMD Radeon HD 8400E
 9832,	00,	AMD Radeon HD 8330
diff --git a/lib/libdrm/etnaviv/Android.bp b/lib/libdrm/etnaviv/Android.bp
new file mode 100644
index 000000000..21deda999
--- /dev/null
+++ b/lib/libdrm/etnaviv/Android.bp
@@ -0,0 +1,11 @@
+build = ["Android.sources.bp"]
+
+cc_library_shared {
+    name: "libdrm_etnaviv",
+    defaults: [
+        "libdrm_defaults",
+        "libdrm_etnaviv_sources",
+    ],
+    vendor: true,
+    shared_libs: ["libdrm"],
+}
diff --git a/lib/libdrm/etnaviv/Android.sources.bp b/lib/libdrm/etnaviv/Android.sources.bp
new file mode 100644
index 000000000..aa8289009
--- /dev/null
+++ b/lib/libdrm/etnaviv/Android.sources.bp
@@ -0,0 +1,13 @@
+// Autogenerated with Android.sources.bp.mk
+
+cc_defaults {
+    name: "libdrm_etnaviv_sources",
+    srcs: [
+        "etnaviv_device.c",
+        "etnaviv_gpu.c",
+        "etnaviv_bo.c",
+        "etnaviv_bo_cache.c",
+        "etnaviv_pipe.c",
+        "etnaviv_cmd_stream.c",
+    ],
+}
diff --git a/lib/libdrm/etnaviv/etnaviv_device.c b/lib/libdrm/etnaviv/etnaviv_device.c
index 699df256f..052a2e206 100644
--- a/lib/libdrm/etnaviv/etnaviv_device.c
+++ b/lib/libdrm/etnaviv/etnaviv_device.c
@@ -25,8 +25,7 @@
  */
 
 #include <stdlib.h>
-#include <linux/stddef.h>
-#include <linux/types.h>
+#include <sys/types.h>
 #include <errno.h>
 #include <sys/mman.h>
 #include <fcntl.h>
diff --git a/lib/libdrm/etnaviv/meson.build b/lib/libdrm/etnaviv/meson.build
index 9ccf8696e..108613512 100644
--- a/lib/libdrm/etnaviv/meson.build
+++ b/lib/libdrm/etnaviv/meson.build
@@ -33,7 +33,7 @@ libdrm_etnaviv = library(
   c_args : libdrm_c_args,
   gnu_symbol_visibility : 'hidden',
   dependencies : [dep_threads, dep_rt, dep_atomic_ops],
-  version : '1.0.0',
+  version : '1.@0@.0'.format(patch_ver),
   install : true,
 )
 
@@ -61,6 +61,6 @@ test(
   args : [
     '--lib', libdrm_etnaviv,
     '--symbols-file', files('etnaviv-symbols.txt'),
-    '--nm', prog_nm.path(),
+    '--nm', prog_nm.full_path(),
   ],
 )
diff --git a/lib/libdrm/exynos/exynos_drm.c b/lib/libdrm/exynos/exynos_drm.c
index 3e322a17b..fb4cd8de0 100644
--- a/lib/libdrm/exynos/exynos_drm.c
+++ b/lib/libdrm/exynos/exynos_drm.c
@@ -31,7 +31,6 @@
 #include <unistd.h>
 
 #include <sys/mman.h>
-#include <linux/stddef.h>
 
 #include <xf86drm.h>
 
diff --git a/lib/libdrm/exynos/exynos_fimg2d.c b/lib/libdrm/exynos/exynos_fimg2d.c
index ac6fa6872..f0aee9629 100644
--- a/lib/libdrm/exynos/exynos_fimg2d.c
+++ b/lib/libdrm/exynos/exynos_fimg2d.c
@@ -30,7 +30,6 @@
 #include <assert.h>
 
 #include <sys/mman.h>
-#include <linux/stddef.h>
 
 #include <xf86drm.h>
 
diff --git a/lib/libdrm/exynos/meson.build b/lib/libdrm/exynos/meson.build
index 6b4fe1e92..6a790f490 100644
--- a/lib/libdrm/exynos/meson.build
+++ b/lib/libdrm/exynos/meson.build
@@ -26,7 +26,7 @@ libdrm_exynos = library(
   include_directories : [inc_root, inc_drm],
   link_with : libdrm,
   dependencies : [dep_threads],
-  version : '1.0.0',
+  version : '1.@0@.0'.format(patch_ver),
   install : true,
 )
 
@@ -56,6 +56,6 @@ test(
   args : [
     '--lib', libdrm_exynos,
     '--symbols-file', files('exynos-symbols.txt'),
-    '--nm', prog_nm.path(),
+    '--nm', prog_nm.full_path(),
   ],
 )
diff --git a/lib/libdrm/freedreno/kgsl/kgsl_bo.c b/lib/libdrm/freedreno/kgsl/kgsl_bo.c
index 7a6af2f08..55b6e5c0f 100644
--- a/lib/libdrm/freedreno/kgsl/kgsl_bo.c
+++ b/lib/libdrm/freedreno/kgsl/kgsl_bo.c
@@ -28,8 +28,6 @@
 
 #include "kgsl_priv.h"
 
-#include <linux/fb.h>
-
 static int set_memtype(struct fd_device *dev, uint32_t handle, uint32_t flags)
 {
 	struct drm_kgsl_gem_memtype req = {
diff --git a/lib/libdrm/freedreno/meson.build b/lib/libdrm/freedreno/meson.build
index 5ba1a3f11..311f57941 100644
--- a/lib/libdrm/freedreno/meson.build
+++ b/lib/libdrm/freedreno/meson.build
@@ -46,7 +46,7 @@ libdrm_freedreno = library(
   include_directories : [inc_root, inc_drm],
   dependencies : [dep_valgrind, dep_threads, dep_rt, dep_atomic_ops],
   link_with : libdrm,
-  version : '1.0.0',
+  version : '1.@0@.0'.format(patch_ver),
   install : true,
 )
 
@@ -77,6 +77,6 @@ test(
   args : [
     '--lib', libdrm_freedreno,
     '--symbols-file', files('freedreno-symbols.txt'),
-    '--nm', prog_nm.path(),
+    '--nm', prog_nm.full_path(),
   ],
 )
diff --git a/lib/libdrm/include/drm/amdgpu_drm.h b/lib/libdrm/include/drm/amdgpu_drm.h
index ad21c613f..ae3f4e275 100644
--- a/lib/libdrm/include/drm/amdgpu_drm.h
+++ b/lib/libdrm/include/drm/amdgpu_drm.h
@@ -392,7 +392,7 @@ struct drm_amdgpu_gem_userptr {
 #define AMDGPU_TILING_NUM_BANKS_SHIFT			21
 #define AMDGPU_TILING_NUM_BANKS_MASK			0x3
 
-/* GFX9 and later: */
+/* GFX9 - GFX11: */
 #define AMDGPU_TILING_SWIZZLE_MODE_SHIFT		0
 #define AMDGPU_TILING_SWIZZLE_MODE_MASK			0x1f
 #define AMDGPU_TILING_DCC_OFFSET_256B_SHIFT		5
@@ -406,6 +406,17 @@ struct drm_amdgpu_gem_userptr {
 #define AMDGPU_TILING_SCANOUT_SHIFT			63
 #define AMDGPU_TILING_SCANOUT_MASK			0x1
 
+/* GFX12 and later: */
+#define AMDGPU_TILING_GFX12_SWIZZLE_MODE_SHIFT			0
+#define AMDGPU_TILING_GFX12_SWIZZLE_MODE_MASK			0x7
+/* These are DCC recompression setting for memory management: */
+#define AMDGPU_TILING_GFX12_DCC_MAX_COMPRESSED_BLOCK_SHIFT	3
+#define AMDGPU_TILING_GFX12_DCC_MAX_COMPRESSED_BLOCK_MASK	0x3 /* 0:64B, 1:128B, 2:256B */
+#define AMDGPU_TILING_GFX12_DCC_NUMBER_TYPE_SHIFT		5
+#define AMDGPU_TILING_GFX12_DCC_NUMBER_TYPE_MASK		0x7 /* CB_COLOR0_INFO.NUMBER_TYPE */
+#define AMDGPU_TILING_GFX12_DCC_DATA_FORMAT_SHIFT		8
+#define AMDGPU_TILING_GFX12_DCC_DATA_FORMAT_MASK		0x3f /* [0:4]:CB_COLOR0_INFO.FORMAT, [5]:MM */
+
 /* Set/Get helpers for tiling flags. */
 #define AMDGPU_TILING_SET(field, value) \
 	(((__u64)(value) & AMDGPU_TILING_##field##_MASK) << AMDGPU_TILING_##field##_SHIFT)
@@ -743,6 +754,16 @@ struct drm_amdgpu_cs_chunk_cp_gfx_shadow {
 #define AMDGPU_IDS_FLAGS_TMZ            0x4
 #define AMDGPU_IDS_FLAGS_CONFORMANT_TRUNC_COORD 0x8
 
+/*
+ *  Query h/w info: Flag identifying VF/PF/PT mode
+ *
+ */
+#define AMDGPU_IDS_FLAGS_MODE_MASK      0x300
+#define AMDGPU_IDS_FLAGS_MODE_SHIFT     0x8
+#define AMDGPU_IDS_FLAGS_MODE_PF        0x0
+#define AMDGPU_IDS_FLAGS_MODE_VF        0x1
+#define AMDGPU_IDS_FLAGS_MODE_PT        0x2
+
 /* indicate if acceleration can be working */
 #define AMDGPU_INFO_ACCEL_WORKING		0x00
 /* get the crtc_id from the mode object id? */
@@ -865,6 +886,8 @@ struct drm_amdgpu_cs_chunk_cp_gfx_shadow {
 	#define AMDGPU_INFO_SENSOR_PEAK_PSTATE_GFX_SCLK			0xa
 	/* Subquery id: Query GPU peak pstate memory clock */
 	#define AMDGPU_INFO_SENSOR_PEAK_PSTATE_GFX_MCLK			0xb
+	/* Subquery id: Query input GPU power	*/
+	#define AMDGPU_INFO_SENSOR_GPU_INPUT_POWER	0xc
 /* Number of VRAM page faults on CPU access. */
 #define AMDGPU_INFO_NUM_VRAM_CPU_PAGE_FAULTS	0x1E
 #define AMDGPU_INFO_VRAM_LOST_COUNTER		0x1F
@@ -1266,6 +1289,7 @@ struct drm_amdgpu_info_gpuvm_fault {
 #define AMDGPU_FAMILY_GC_10_3_6			149 /* GC 10.3.6 */
 #define AMDGPU_FAMILY_GC_10_3_7			151 /* GC 10.3.7 */
 #define AMDGPU_FAMILY_GC_11_5_0			150 /* GC 11.5.0 */
+#define AMDGPU_FAMILY_GC_12_0_0			152 /* GC 12.0.0 */
 
 #if defined(__cplusplus)
 }
diff --git a/lib/libdrm/include/drm/drm_fourcc.h b/lib/libdrm/include/drm/drm_fourcc.h
index 9b2504802..8a9c54b56 100644
--- a/lib/libdrm/include/drm/drm_fourcc.h
+++ b/lib/libdrm/include/drm/drm_fourcc.h
@@ -54,7 +54,7 @@ extern "C" {
  * Format modifiers may change any property of the buffer, including the number
  * of planes and/or the required allocation size. Format modifiers are
  * vendor-namespaced, and as such the relationship between a fourcc code and a
- * modifier is specific to the modifer being used. For example, some modifiers
+ * modifier is specific to the modifier being used. For example, some modifiers
  * may preserve meaning - such as number of planes - from the fourcc code,
  * whereas others may not.
  *
@@ -79,7 +79,7 @@ extern "C" {
  *   format.
  * - Higher-level programs interfacing with KMS/GBM/EGL/Vulkan/etc: these users
  *   see modifiers as opaque tokens they can check for equality and intersect.
- *   These users musn't need to know to reason about the modifier value
+ *   These users mustn't need to know to reason about the modifier value
  *   (i.e. they are not expected to extract information out of the modifier).
  *
  * Vendors should document their modifier usage in as much detail as
@@ -540,7 +540,7 @@ extern "C" {
  * This is a tiled layout using 4Kb tiles in row-major layout.
  * Within the tile pixels are laid out in 16 256 byte units / sub-tiles which
  * are arranged in four groups (two wide, two high) with column-major layout.
- * Each group therefore consits out of four 256 byte units, which are also laid
+ * Each group therefore consists out of four 256 byte units, which are also laid
  * out as 2x2 column-major.
  * 256 byte units are made out of four 64 byte blocks of pixels, producing
  * either a square block or a 2:1 unit.
@@ -1103,7 +1103,7 @@ drm_fourcc_canonicalize_nvidia_format_mod(__u64 modifier)
  */
 
 /*
- * The top 4 bits (out of the 56 bits alloted for specifying vendor specific
+ * The top 4 bits (out of the 56 bits allotted for specifying vendor specific
  * modifiers) denote the category for modifiers. Currently we have three
  * categories of modifiers ie AFBC, MISC and AFRC. We can have a maximum of
  * sixteen different categories.
@@ -1419,7 +1419,7 @@ drm_fourcc_canonicalize_nvidia_format_mod(__u64 modifier)
  * Amlogic FBC Memory Saving mode
  *
  * Indicates the storage is packed when pixel size is multiple of word
- * boudaries, i.e. 8bit should be stored in this mode to save allocation
+ * boundaries, i.e. 8bit should be stored in this mode to save allocation
  * memory.
  *
  * This mode reduces body layout to 3072 bytes per 64x32 superblock with
@@ -1476,6 +1476,7 @@ drm_fourcc_canonicalize_nvidia_format_mod(__u64 modifier)
 #define AMD_FMT_MOD_TILE_VER_GFX10 2
 #define AMD_FMT_MOD_TILE_VER_GFX10_RBPLUS 3
 #define AMD_FMT_MOD_TILE_VER_GFX11 4
+#define AMD_FMT_MOD_TILE_VER_GFX12 5
 
 /*
  * 64K_S is the same for GFX9/GFX10/GFX10_RBPLUS and hence has GFX9 as canonical
@@ -1486,6 +1487,8 @@ drm_fourcc_canonicalize_nvidia_format_mod(__u64 modifier)
 /*
  * 64K_D for non-32 bpp is the same for GFX9/GFX10/GFX10_RBPLUS and hence has
  * GFX9 as canonical version.
+ *
+ * 64K_D_2D on GFX12 is identical to 64K_D on GFX11.
  */
 #define AMD_FMT_MOD_TILE_GFX9_64K_D 10
 #define AMD_FMT_MOD_TILE_GFX9_64K_S_X 25
@@ -1493,6 +1496,19 @@ drm_fourcc_canonicalize_nvidia_format_mod(__u64 modifier)
 #define AMD_FMT_MOD_TILE_GFX9_64K_R_X 27
 #define AMD_FMT_MOD_TILE_GFX11_256K_R_X 31
 
+/* Gfx12 swizzle modes:
+ *    0 - LINEAR
+ *    1 - 256B_2D  - 2D block dimensions
+ *    2 - 4KB_2D
+ *    3 - 64KB_2D
+ *    4 - 256KB_2D
+ *    5 - 4KB_3D   - 3D block dimensions
+ *    6 - 64KB_3D
+ *    7 - 256KB_3D
+ */
+#define AMD_FMT_MOD_TILE_GFX12_64K_2D 3
+#define AMD_FMT_MOD_TILE_GFX12_256K_2D 4
+
 #define AMD_FMT_MOD_DCC_BLOCK_64B 0
 #define AMD_FMT_MOD_DCC_BLOCK_128B 1
 #define AMD_FMT_MOD_DCC_BLOCK_256B 2
@@ -1524,6 +1540,9 @@ drm_fourcc_canonicalize_nvidia_format_mod(__u64 modifier)
 #define AMD_FMT_MOD_DCC_MAX_COMPRESSED_BLOCK_SHIFT 18
 #define AMD_FMT_MOD_DCC_MAX_COMPRESSED_BLOCK_MASK 0x3
 
+#define AMD_FMT_MOD_GFX12_DCC_MAX_COMPRESSED_BLOCK_SHIFT     3
+#define AMD_FMT_MOD_GFX12_DCC_MAX_COMPRESSED_BLOCK_MASK      0x3 /* 0:64B, 1:128B, 2:256B */
+
 /*
  * DCC supports embedding some clear colors directly in the DCC surface.
  * However, on older GPUs the rendering HW ignores the embedded clear color
diff --git a/lib/libdrm/include/drm/drm_mode.h b/lib/libdrm/include/drm/drm_mode.h
index 95630f170..d390011b8 100644
--- a/lib/libdrm/include/drm/drm_mode.h
+++ b/lib/libdrm/include/drm/drm_mode.h
@@ -36,10 +36,10 @@ extern "C" {
 /**
  * DOC: overview
  *
- * DRM exposes many UAPI and structure definition to have a consistent
- * and standardized interface with user.
+ * DRM exposes many UAPI and structure definitions to have a consistent
+ * and standardized interface with users.
  * Userspace can refer to these structure definitions and UAPI formats
- * to communicate to driver
+ * to communicate to drivers.
  */
 
 #define DRM_CONNECTOR_NAME_LEN	32
@@ -540,7 +540,7 @@ struct drm_mode_get_connector {
 /* the PROP_ATOMIC flag is used to hide properties from userspace that
  * is not aware of atomic properties.  This is mostly to work around
  * older userspace (DDX drivers) that read/write each prop they find,
- * witout being aware that this could be triggering a lengthy modeset.
+ * without being aware that this could be triggering a lengthy modeset.
  */
 #define DRM_MODE_PROP_ATOMIC        0x80000000
 
@@ -664,7 +664,7 @@ struct drm_mode_fb_cmd {
 };
 
 #define DRM_MODE_FB_INTERLACED	(1<<0) /* for interlaced framebuffers */
-#define DRM_MODE_FB_MODIFIERS	(1<<1) /* enables ->modifer[] */
+#define DRM_MODE_FB_MODIFIERS	(1<<1) /* enables ->modifier[] */
 
 /**
  * struct drm_mode_fb_cmd2 - Frame-buffer metadata.
@@ -858,6 +858,17 @@ struct drm_color_lut {
 };
 
 /**
+ * struct drm_plane_size_hint - Plane size hints
+ *
+ * The plane SIZE_HINTS property blob contains an
+ * array of struct drm_plane_size_hint.
+ */
+struct drm_plane_size_hint {
+	__u16 width;
+	__u16 height;
+};
+
+/**
  * struct hdr_metadata_infoframe - HDR Metadata Infoframe Data.
  *
  * HDR Metadata Infoframe as per CTA 861.G spec. This is expected
@@ -881,8 +892,8 @@ struct hdr_metadata_infoframe {
 	 * These are coded as unsigned 16-bit values in units of
 	 * 0.00002, where 0x0000 represents zero and 0xC350
 	 * represents 1.0000.
-	 * @display_primaries.x: X cordinate of color primary.
-	 * @display_primaries.y: Y cordinate of color primary.
+	 * @display_primaries.x: X coordinate of color primary.
+	 * @display_primaries.y: Y coordinate of color primary.
 	 */
 	struct {
 		__u16 x, y;
@@ -892,8 +903,8 @@ struct hdr_metadata_infoframe {
 	 * These are coded as unsigned 16-bit values in units of
 	 * 0.00002, where 0x0000 represents zero and 0xC350
 	 * represents 1.0000.
-	 * @white_point.x: X cordinate of whitepoint of color primary.
-	 * @white_point.y: Y cordinate of whitepoint of color primary.
+	 * @white_point.x: X coordinate of whitepoint of color primary.
+	 * @white_point.y: Y coordinate of whitepoint of color primary.
 	 */
 	struct {
 		__u16 x, y;
diff --git a/lib/libdrm/intel/Android.bp b/lib/libdrm/intel/Android.bp
new file mode 100644
index 000000000..22713acc8
--- /dev/null
+++ b/lib/libdrm/intel/Android.bp
@@ -0,0 +1,36 @@
+//
+// Copyright © 2011 Intel Corporation
+//
+// Permission is hereby granted, free of charge, to any person obtaining a
+// copy of this software and associated documentation files (the "Software"),
+// to deal in the Software without restriction, including without limitation
+// the rights to use, copy, modify, merge, publish, distribute, sublicense,
+// and/or sell copies of the Software, and to permit persons to whom the
+// Software is furnished to do so, subject to the following conditions:
+//
+// The above copyright notice and this permission notice (including the next
+// paragraph) shall be included in all copies or substantial portions of the
+// Software.
+//
+// THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+// IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+// FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
+// THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+// LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+// FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
+// IN THE SOFTWARE.
+//
+
+build = ["Android.sources.bp"]
+
+cc_library_shared {
+    name: "libdrm_intel",
+    defaults: [
+        "libdrm_defaults",
+        "libdrm_intel_sources",
+    ],
+    vendor: true,
+
+    // Removed dependency to libpciaccess: not used on Android
+    shared_libs: ["libdrm"],
+}
diff --git a/lib/libdrm/intel/Android.sources.bp b/lib/libdrm/intel/Android.sources.bp
new file mode 100644
index 000000000..459c070fa
--- /dev/null
+++ b/lib/libdrm/intel/Android.sources.bp
@@ -0,0 +1,12 @@
+// Autogenerated with Android.sources.bp.mk
+
+cc_defaults {
+    name: "libdrm_intel_sources",
+    srcs: [
+        "intel_bufmgr.c",
+        "intel_bufmgr_fake.c",
+        "intel_bufmgr_gem.c",
+        "intel_decode.c",
+        "mm.c",
+    ],
+}
diff --git a/lib/libdrm/intel/meson.build b/lib/libdrm/intel/meson.build
index 4af2a3573..2aa9c288d 100644
--- a/lib/libdrm/intel/meson.build
+++ b/lib/libdrm/intel/meson.build
@@ -32,7 +32,7 @@ libdrm_intel = library(
   dependencies : [dep_pciaccess, dep_threads, dep_rt, dep_valgrind, dep_atomic_ops],
   c_args : libdrm_c_args,
   gnu_symbol_visibility : 'hidden',
-  version : '1.0.0',
+  version : '1.@0@.0'.format(patch_ver),
   install : true,
 )
 
@@ -104,6 +104,6 @@ test(
   args : [
     '--lib', libdrm_intel,
     '--symbols-file', files('intel-symbols.txt'),
-    '--nm', prog_nm.path(),
+    '--nm', prog_nm.full_path(),
   ],
 )
diff --git a/lib/libdrm/meson.build b/lib/libdrm/meson.build
index 1a7dbbe42..27e40e75d 100644
--- a/lib/libdrm/meson.build
+++ b/lib/libdrm/meson.build
@@ -18,15 +18,22 @@
 # OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
 # SOFTWARE.
 
+# The versioning should always stay at 2.4.x. If bumping away from this,
+# you must ensure that all users of patch_ver are changed such that DSO versions
+# continuously increment (e.g. blindly bumping from 2.4.122 to 2.5.0 would
+# roll the libdrm DSO versioning from libdrm.so.2.122.0 back to libdrm.so.2.0.0
+# which would be bad)
 project(
   'libdrm',
   ['c'],
-  version : '2.4.120',
+  version : '2.4.123',
   license : 'MIT',
   meson_version : '>= 0.59',
   default_options : ['buildtype=debugoptimized', 'c_std=c11'],
 )
 
+patch_ver = meson.project_version().split('.')[2]
+
 if ['windows', 'darwin'].contains(host_machine.system())
   error('unsupported OS: @0@'.format(host_machine.system()))
 endif
@@ -46,6 +53,12 @@ cc = meson.get_compiler('c')
 
 android = cc.compiles('''int func() { return __ANDROID__; }''')
 
+# Solaris / Illumos
+if host_machine.system() == 'sunos'
+  add_global_arguments('-D__EXTENSIONS__', language : 'c')
+  add_global_arguments('-D_POSIX_C_SOURCE=3', language : 'c')
+endif
+
 symbols_check = find_program('symbols-check.py')
 prog_nm = find_program('nm')
 
@@ -154,7 +167,6 @@ if not cc.has_function('clock_gettime', prefix : '#define _GNU_SOURCE\n#include
 else
   dep_rt = []
 endif
-dep_m = cc.find_library('m', required : false)
 
 # The header is not required on Linux, and is in fact deprecated in glibc 2.30+
 if ['linux'].contains(host_machine.system())
@@ -231,11 +243,15 @@ if target_machine.endian() == 'big'
   config.set('HAVE_BIG_ENDIAN', 1)
 endif
 
+if android
+  config.set('BIONIC_IOCTL_NO_SIGNEDNESS_OVERLOAD', 1)
+endif
+
 config_file = configure_file(
   configuration : config,
   output : 'config.h',
 )
-add_project_arguments('-include', '@0@'.format(config_file), language : 'c')
+add_project_arguments('-include', meson.current_build_dir() / 'config.h', language : 'c')
 
 inc_root = include_directories('.')
 inc_drm = include_directories('include/drm')
@@ -251,14 +267,14 @@ libdrm_files = [files(
 if android
   libdrm_kw = {}
 else
-  libdrm_kw = {'version' : '2.4.0'}
+  libdrm_kw = { 'version' : '2.@0@.0'.format(patch_ver) }
 endif
 
 libdrm = library(
   'drm',
   libdrm_files,
   c_args : libdrm_c_args,
-  dependencies : [dep_valgrind, dep_rt, dep_m],
+  dependencies : [dep_valgrind, dep_rt],
   include_directories : inc_drm,
   install : true,
   kwargs : libdrm_kw,
diff --git a/lib/libdrm/nouveau/Android.bp b/lib/libdrm/nouveau/Android.bp
new file mode 100644
index 000000000..12c37e3dc
--- /dev/null
+++ b/lib/libdrm/nouveau/Android.bp
@@ -0,0 +1,11 @@
+build = ["Android.sources.bp"]
+
+cc_library_shared {
+    name: "libdrm_nouveau",
+    defaults: [
+        "libdrm_defaults",
+        "libdrm_nouveau_sources",
+    ],
+    vendor: true,
+    shared_libs: ["libdrm"],
+}
diff --git a/lib/libdrm/nouveau/Android.sources.bp b/lib/libdrm/nouveau/Android.sources.bp
new file mode 100644
index 000000000..5ecdb53c8
--- /dev/null
+++ b/lib/libdrm/nouveau/Android.sources.bp
@@ -0,0 +1,11 @@
+// Autogenerated with Android.sources.bp.mk
+
+cc_defaults {
+    name: "libdrm_nouveau_sources",
+    srcs: [
+        "nouveau.c",
+        "pushbuf.c",
+        "bufctx.c",
+        "abi16.c",
+    ],
+}
diff --git a/lib/libdrm/nouveau/meson.build b/lib/libdrm/nouveau/meson.build
index 71c8f5522..ec28dd2dc 100644
--- a/lib/libdrm/nouveau/meson.build
+++ b/lib/libdrm/nouveau/meson.build
@@ -27,7 +27,7 @@ libdrm_nouveau = library(
   include_directories : [inc_root, inc_drm],
   link_with : libdrm,
   dependencies : [dep_threads, dep_atomic_ops],
-  version : '2.0.0',
+  version : '2.@0@.0'.format(patch_ver),
   install : true,
 )
 
diff --git a/lib/libdrm/omap/Android.bp b/lib/libdrm/omap/Android.bp
new file mode 100644
index 000000000..05ca7d2db
--- /dev/null
+++ b/lib/libdrm/omap/Android.bp
@@ -0,0 +1,12 @@
+build = ["Android.sources.bp"]
+
+cc_library_shared {
+    name: "libdrm_omap",
+    defaults: [
+        "libdrm_defaults",
+        "libdrm_omap_sources",
+    ],
+    vendor: true,
+
+    shared_libs: ["libdrm"],
+}
diff --git a/lib/libdrm/omap/Android.sources.bp b/lib/libdrm/omap/Android.sources.bp
new file mode 100644
index 000000000..3c7da94a4
--- /dev/null
+++ b/lib/libdrm/omap/Android.sources.bp
@@ -0,0 +1,8 @@
+// Autogenerated with Android.sources.bp.mk
+
+cc_defaults {
+    name: "libdrm_omap_sources",
+    srcs: [
+	"omap_drm.c",
+    ],
+}
diff --git a/lib/libdrm/omap/meson.build b/lib/libdrm/omap/meson.build
index eebd1420f..8187825a6 100644
--- a/lib/libdrm/omap/meson.build
+++ b/lib/libdrm/omap/meson.build
@@ -26,7 +26,7 @@ libdrm_omap = library(
   gnu_symbol_visibility : 'hidden',
   link_with : libdrm,
   dependencies : [dep_threads, dep_atomic_ops],
-  version : '1.0.0',
+  version : '1.@0@.0'.format(patch_ver),
   install : true,
 )
 
@@ -56,6 +56,6 @@ test(
   args : [
     '--lib', libdrm_omap,
     '--symbols-file', files('omap-symbols.txt'),
-    '--nm', prog_nm.path(),
+    '--nm', prog_nm.full_path(),
   ],
 )
diff --git a/lib/libdrm/omap/omap_drm.c b/lib/libdrm/omap/omap_drm.c
index aa2736604..42d35ef77 100644
--- a/lib/libdrm/omap/omap_drm.c
+++ b/lib/libdrm/omap/omap_drm.c
@@ -27,7 +27,6 @@
  */
 
 #include <stdlib.h>
-#include <linux/stddef.h>
 #include <linux/types.h>
 #include <errno.h>
 #include <sys/mman.h>
diff --git a/lib/libdrm/radeon/Android.bp b/lib/libdrm/radeon/Android.bp
new file mode 100644
index 000000000..9d0a09ec7
--- /dev/null
+++ b/lib/libdrm/radeon/Android.bp
@@ -0,0 +1,11 @@
+build = ["Android.sources.bp"]
+
+cc_library_shared {
+    name: "libdrm_radeon",
+    defaults: [
+        "libdrm_defaults",
+        "libdrm_radeon_sources",
+    ],
+    vendor: true,
+    shared_libs: ["libdrm"],
+}
diff --git a/lib/libdrm/radeon/Android.sources.bp b/lib/libdrm/radeon/Android.sources.bp
new file mode 100644
index 000000000..820ac4d6d
--- /dev/null
+++ b/lib/libdrm/radeon/Android.sources.bp
@@ -0,0 +1,13 @@
+// Autogenerated with Android.sources.bp.mk
+
+cc_defaults {
+    name: "libdrm_radeon_sources",
+    srcs: [
+        "radeon_bo_gem.c",
+        "radeon_cs_gem.c",
+        "radeon_cs_space.c",
+        "radeon_bo.c",
+        "radeon_cs.c",
+        "radeon_surface.c",
+    ],
+}
diff --git a/lib/libdrm/radeon/meson.build b/lib/libdrm/radeon/meson.build
index 7aa9b705c..bcf3239c3 100644
--- a/lib/libdrm/radeon/meson.build
+++ b/lib/libdrm/radeon/meson.build
@@ -33,7 +33,7 @@ libdrm_radeon = library(
   include_directories : [inc_root, inc_drm],
   link_with : libdrm,
   dependencies : [dep_threads, dep_atomic_ops],
-  version : '1.0.1',
+  version : '1.@0@.0'.format(patch_ver),
   install : true,
 )
 
diff --git a/lib/libdrm/symbols-check.py b/lib/libdrm/symbols-check.py
index 2e7ba68d1..c63c0d112 100644
--- a/lib/libdrm/symbols-check.py
+++ b/lib/libdrm/symbols-check.py
@@ -7,6 +7,7 @@ import subprocess
 
 # This list contains symbols that _might_ be exported for some platforms
 PLATFORM_SYMBOLS = [
+    '_GLOBAL_OFFSET_TABLE_',
     '__bss_end__',
     '__bss_start__',
     '__bss_start',
@@ -16,6 +17,9 @@ PLATFORM_SYMBOLS = [
     '_end',
     '_fini',
     '_init',
+    '_fbss',
+    '_fdata',
+    '_ftext',
 ]
 
 
diff --git a/lib/libdrm/tegra/Android.bp b/lib/libdrm/tegra/Android.bp
new file mode 100644
index 000000000..33eaf6c50
--- /dev/null
+++ b/lib/libdrm/tegra/Android.bp
@@ -0,0 +1,14 @@
+cc_library_shared {
+    name: "libdrm_tegra",
+    vendor: true,
+    shared_libs: ["libdrm"],
+
+    srcs: ["tegra.c"],
+
+    cflags: [
+        "-DHAVE_LIBDRM_ATOMIC_PRIMITIVES=1",
+        "-Wall",
+        "-Werror",
+        "-Wno-unused-variable",
+    ],
+}
diff --git a/lib/libdrm/tegra/job.c b/lib/libdrm/tegra/job.c
index 75a344f1d..b9af49876 100644
--- a/lib/libdrm/tegra/job.c
+++ b/lib/libdrm/tegra/job.c
@@ -33,7 +33,7 @@
 #include <unistd.h>
 
 #include <sys/ioctl.h>
-#include <sys/poll.h>
+#include <poll.h>
 
 #include "private.h"
 
diff --git a/lib/libdrm/tegra/meson.build b/lib/libdrm/tegra/meson.build
index 5325ed747..dfec91d00 100644
--- a/lib/libdrm/tegra/meson.build
+++ b/lib/libdrm/tegra/meson.build
@@ -31,7 +31,7 @@ libdrm_tegra = library(
   dependencies : [dep_threads, dep_atomic_ops],
   c_args : libdrm_c_args,
   gnu_symbol_visibility : 'hidden',
-  version : '0.0.0',
+  version : '0.@0@.0'.format(patch_ver),
   install : true,
 )
 
@@ -59,6 +59,6 @@ test(
   args : [
     '--lib', libdrm_tegra,
     '--symbols-file', files('tegra-symbols.txt'),
-    '--nm', prog_nm.path(),
+    '--nm', prog_nm.full_path(),
   ],
 )
diff --git a/lib/libdrm/tests/Android.bp b/lib/libdrm/tests/Android.bp
new file mode 100644
index 000000000..cdc6c2cf3
--- /dev/null
+++ b/lib/libdrm/tests/Android.bp
@@ -0,0 +1,6 @@
+subdirs = ["*"]
+
+cc_library_headers {
+    name: "libdrm_test_headers",
+    export_include_dirs: ["."],
+}
diff --git a/lib/libdrm/tests/amdgpu/shader_code.h b/lib/libdrm/tests/amdgpu/shader_code.h
index 74d32bb58..164c61932 100644
--- a/lib/libdrm/tests/amdgpu/shader_code.h
+++ b/lib/libdrm/tests/amdgpu/shader_code.h
@@ -75,13 +75,13 @@ struct shader_test_cs_shader {
 struct shader_test_ps_shader {
 	const uint32_t *shader;
 	unsigned shader_size;
-	const uint32_t patchinfo_code_size;
+	uint32_t patchinfo_code_size;
 	const uint32_t *patchinfo_code;
 	const uint32_t *patchinfo_code_offset;
 	const struct reg_info *sh_reg;
-	const uint32_t num_sh_reg;
+	uint32_t num_sh_reg;
 	const struct reg_info *context_reg;
-	const uint32_t num_context_reg;
+	uint32_t num_context_reg;
 };
 
 struct shader_test_vs_shader {
@@ -111,7 +111,7 @@ static const struct shader_test_cs_shader shader_test_cs[AMDGPU_TEST_GFX_MAX][2]
 #define SHADER_PS_INFO(_ps, _n) \
 	{ps_##_ps##_shader_gfx##_n, sizeof(ps_##_ps##_shader_gfx##_n), \
 	ps_##_ps##_shader_patchinfo_code_size_gfx##_n, \
-	ps_##_ps##_shader_patchinfo_code_gfx##_n, \
+	&(ps_##_ps##_shader_patchinfo_code_gfx##_n)[0][0][0], \
 	ps_##_ps##_shader_patchinfo_offset_gfx##_n, \
 	ps_##_ps##_sh_registers_gfx##_n, ps_##_ps##_num_sh_registers_gfx##_n, \
 	ps_##_ps##_context_registers_gfx##_n, ps_##_ps##_num_context_registers_gfx##_n}
diff --git a/lib/libdrm/tests/amdgpu/shader_code_gfx10.h b/lib/libdrm/tests/amdgpu/shader_code_gfx10.h
index 4849bbc9b..1e7c8f968 100644
--- a/lib/libdrm/tests/amdgpu/shader_code_gfx10.h
+++ b/lib/libdrm/tests/amdgpu/shader_code_gfx10.h
@@ -41,7 +41,7 @@ static const uint32_t ps_const_shader_gfx10[] = {
     0xF8001C0F, 0x00000100, 0xBF810000
 };
 
-static const uint32_t ps_const_shader_patchinfo_code_size_gfx10 = 6;
+#define ps_const_shader_patchinfo_code_size_gfx10 6
 
 static const uint32_t ps_const_shader_patchinfo_code_gfx10[][10][6] = {
     {{ 0xBF800000, 0xBF800000, 0xBF800000, 0xBF800000, 0xF8001890, 0x00000000 },
@@ -61,7 +61,7 @@ static const uint32_t ps_const_shader_patchinfo_offset_gfx10[] = {
     0x00000004
 };
 
-static const uint32_t ps_const_num_sh_registers_gfx10 = 2;
+#define ps_const_num_sh_registers_gfx10 2
 
 static const struct reg_info ps_const_sh_registers_gfx10[] = {
 	{0x2C0A, 0x000C0000},//{ mmSPI_SHADER_PGM_RSRC1_PS, 0x000C0000 },
@@ -79,7 +79,7 @@ static const struct reg_info ps_const_context_registers_gfx10[] =
     {0xA1C5, 0x00000004}, //{ mmSPI_SHADER_COL_FORMAT,   0x00000004 /* SI_EXPORT_FMT_FP16_ABGR */ }
 };
 
-static const uint32_t ps_const_num_context_registers_gfx10 = 7;
+#define ps_const_num_context_registers_gfx10 7
 
 static const uint32_t ps_tex_shader_gfx10[] = {
     0xBEFC030C, 0xBE8E047E, 0xBEFE0A7E, 0xC8080000,
@@ -93,7 +93,7 @@ static const uint32_t ps_tex_shader_patchinfo_offset_gfx10[] = {
     0x0000000C
 };
 
-static const uint32_t ps_tex_shader_patchinfo_code_size_gfx10 = 6;
+#define ps_tex_shader_patchinfo_code_size_gfx10 6
 
 static const uint32_t ps_tex_shader_patchinfo_code_gfx10[][10][6] = {
     {{ 0xBF800000, 0xBF800000, 0xBF800000, 0xBF800000, 0xF8001890, 0x00000000 },
@@ -115,7 +115,7 @@ static const struct reg_info ps_tex_sh_registers_gfx10[] =
      {0x2C0B, 0x00000018 }, //{ mmSPI_SHADER_PGM_RSRC2_PS, 0x00000018 }
 };
 
-static const uint32_t ps_tex_num_sh_registers_gfx10 = 2;
+#define ps_tex_num_sh_registers_gfx10 2
 
 // Holds Context Register Information
 static const struct reg_info ps_tex_context_registers_gfx10[] =
@@ -129,7 +129,7 @@ static const struct reg_info ps_tex_context_registers_gfx10[] =
     {0xA1C5, 0x00000004}, //{ mmSPI_SHADER_COL_FORMAT,   0x00000004 /* SI_EXPORT_FMT_FP16_ABGR */ }
 };
 
-static const uint32_t ps_tex_num_context_registers_gfx10 = 7;
+#define ps_tex_num_context_registers_gfx10 7
 
 static const uint32_t vs_RectPosTexFast_shader_gfx10[] = {
     0x7E000B00, 0x060000F3, 0x7E020202, 0x7E040206,
@@ -148,7 +148,7 @@ static const struct reg_info vs_RectPosTexFast_sh_registers_gfx10[] =
     {0x2C4B, 0x00000018 }, //{ mmSPI_SHADER_PGM_RSRC2_VS, 0x00000018 }
 };
 
-static const uint32_t vs_RectPosTexFast_num_sh_registers_gfx10 = 2;
+#define vs_RectPosTexFast_num_sh_registers_gfx10 2
 
 // Holds Context Register Information
 static const struct reg_info vs_RectPosTexFast_context_registers_gfx10[] =
@@ -157,7 +157,7 @@ static const struct reg_info vs_RectPosTexFast_context_registers_gfx10[] =
     {0xA1C3, 0x00000000}, //{ mmSPI_SHADER_POS_FORMAT, 0x00000000 /* Always 0 for now */}
 };
 
-static const uint32_t vs_RectPosTexFast_num_context_registers_gfx10 = 2;
+#define vs_RectPosTexFast_num_context_registers_gfx10 2
 
 static const uint32_t preamblecache_gfx10[] = {
 	0xc0026900, 0x81, 0x80000000, 0x40004000, 0xc0026900, 0x8c, 0xaa99aaaa, 0x0,
@@ -196,7 +196,7 @@ static const uint32_t cached_cmd_gfx10[] = {
 	0xc0026900, 0x2b0, 0x0, 0x0, 0xc0016900, 0x2f8, 0x0
 };
 
-static const uint32_t sh_reg_base_gfx10 = 0x2C00;
-static const uint32_t context_reg_base_gfx10 = 0xA000;
+#define sh_reg_base_gfx10 0x2C00
+#define context_reg_base_gfx10 0xA000
 
 #endif
diff --git a/lib/libdrm/tests/amdgpu/shader_code_gfx11.h b/lib/libdrm/tests/amdgpu/shader_code_gfx11.h
index d9ee0a7c2..8a998ae80 100644
--- a/lib/libdrm/tests/amdgpu/shader_code_gfx11.h
+++ b/lib/libdrm/tests/amdgpu/shader_code_gfx11.h
@@ -101,7 +101,7 @@ static const uint32_t ps_const_shader_gfx11[] = {
     0xBF9F0000
 };
 
-static const uint32_t ps_const_shader_patchinfo_code_size_gfx11 = 6;
+#define ps_const_shader_patchinfo_code_size_gfx11 6
 
 static const uint32_t ps_const_shader_patchinfo_code_gfx11[][10][6] = {
 	{{ 0xBF800000, 0xBF800000, 0xBF800000, 0xBF800000, 0xF8000890, 0x00000000 },  // SI_EXPORT_FMT_ZERO
@@ -121,7 +121,7 @@ static const uint32_t ps_const_shader_patchinfo_offset_gfx11[] = {
 	0x00000006
 };
 
-static const uint32_t ps_const_num_sh_registers_gfx11 = 2;
+#define ps_const_num_sh_registers_gfx11 2
 
 static const struct reg_info ps_const_sh_registers_gfx11[] = {
 	{0x2C0A, 0x020C0000}, //{ mmSPI_SHADER_PGM_RSRC1_PS, 0x020C0000 },
@@ -138,7 +138,7 @@ static const struct reg_info ps_const_context_registers_gfx11[] = {
 	{0xA1C5, 0x00000004 }, //{ mmSPI_SHADER_COL_FORMAT,   0x00000004 /* SI_EXPORT_FMT_FP16_ABGR */ }
 };
 
-static const uint32_t ps_const_num_context_registers_gfx11 = 7;
+#define ps_const_num_context_registers_gfx11 7
 
 static const uint32_t ps_tex_shader_gfx11[] =
 {
@@ -174,7 +174,7 @@ static const uint32_t ps_tex_shader_patchinfo_offset_gfx11[] =
 };
 
 // Denotes the Patch Info Code Length
-static const uint32_t ps_tex_shader_patchinfo_code_size_gfx11 = 6;
+#define ps_tex_shader_patchinfo_code_size_gfx11 6
 
 static const uint32_t ps_tex_shader_patchinfo_code_gfx11[][10][6] =
 {
@@ -197,7 +197,7 @@ static const struct reg_info ps_tex_sh_registers_gfx11[] =
     {0x2C0B, 0x00000018 } //{ mmSPI_SHADER_PGM_RSRC2_PS, 0x00000018 }
 };
 
-static const uint32_t ps_tex_num_sh_registers_gfx11 = 2;
+#define ps_tex_num_sh_registers_gfx11 2
 
 // Holds Context Register Information
 static const struct reg_info ps_tex_context_registers_gfx11[] =
@@ -211,8 +211,7 @@ static const struct reg_info ps_tex_context_registers_gfx11[] =
     {0xA1C5, 0x00000004 } //{ mmSPI_SHADER_COL_FORMAT,   0x00000004 /* SI_EXPORT_FMT_FP16_ABGR */ }
 };
 
-static const uint32_t ps_tex_num_context_registers_gfx11 = 7;
-
+#define ps_tex_num_context_registers_gfx11 7
 
 static const uint32_t vs_RectPosTexFast_shader_gfx11[] =
 {
@@ -261,7 +260,7 @@ static const struct reg_info vs_RectPosTexFast_sh_registers_gfx11[] =
 	{0x2C8B, 0x0008001C}, //{ mmSPI_SHADER_PGM_RSRC2_GS, 0x0008001C }
 };
 
-static const uint32_t vs_RectPosTexFast_num_sh_registers_gfx11 = 2;
+#define vs_RectPosTexFast_num_sh_registers_gfx11 2
 
 // Holds Context Register Information
 static const struct reg_info vs_RectPosTexFast_context_registers_gfx11[] =
@@ -274,7 +273,7 @@ static const struct reg_info vs_RectPosTexFast_context_registers_gfx11[] =
 	{0xA2CE, 0x00000001}, //{ mmVGT_GS_MAX_VERT_OUT, 0x00000001 }
 };
 
-static const uint32_t vs_RectPosTexFast_num_context_registers_gfx11 = 6;
+#define vs_RectPosTexFast_num_context_registers_gfx11 6
 
 static const uint32_t preamblecache_gfx11[] = {
 	0xc0026900, 0x81, 0x80000000, 0x40004000, 0xc0026900, 0x8c, 0xaa99aaaa, 0x0,
@@ -314,7 +313,8 @@ static const uint32_t cached_cmd_gfx11[] = {
 	0xc0046900, 0x1d5, 0x0, 0x0, 0x0, 0x0, 0xc0016900, 0x104, 0x4a00005,
 	0xc0016900, 0x1f, 0xf2a0055, 0xc0017900, 0x266, 0x4
 };
-static const uint32_t sh_reg_base_gfx11 = 0x2C00;
-static const uint32_t context_reg_base_gfx11 = 0xA000;
+
+#define sh_reg_base_gfx11 0x2C00
+#define context_reg_base_gfx11 0xA000
 
 #endif
diff --git a/lib/libdrm/tests/amdgpu/shader_code_gfx9.h b/lib/libdrm/tests/amdgpu/shader_code_gfx9.h
index 3ad1ca8fb..1cb6582f6 100644
--- a/lib/libdrm/tests/amdgpu/shader_code_gfx9.h
+++ b/lib/libdrm/tests/amdgpu/shader_code_gfx9.h
@@ -51,7 +51,7 @@ static const uint32_t ps_const_shader_gfx9[] = {
 	0xC4001C0F, 0x00000100, 0xBF810000
 };
 
-static const uint32_t ps_const_shader_patchinfo_code_size_gfx9 = 6;
+#define ps_const_shader_patchinfo_code_size_gfx9 6
 
 static const uint32_t ps_const_shader_patchinfo_code_gfx9[][10][6] = {
     {{ 0xBF800000, 0xBF800000, 0xBF800000, 0xBF800000, 0xC4001890, 0x00000000 },
@@ -71,14 +71,14 @@ static const uint32_t ps_const_shader_patchinfo_offset_gfx9[] = {
 	0x00000004
 };
 
-static const uint32_t ps_const_num_sh_registers_gfx9 = 2;
+#define ps_const_num_sh_registers_gfx9 2
 
 static const struct reg_info ps_const_sh_registers_gfx9[] = {
 	{0x2C0A, 0x000C0040},//{ mmSPI_SHADER_PGM_RSRC1_PS, 0x000C0040 },
 	{0x2C0B, 0x00000008}, //{ mmSPI_SHADER_PGM_RSRC2_PS, 0x00000008 }
 };
 
-static const uint32_t ps_const_num_context_registers_gfx9 = 7;
+#define ps_const_num_context_registers_gfx9 7
 
 static const struct reg_info ps_const_context_registers_gfx9[] = {
     {0xA1B4, 0x00000002}, //{ mmSPI_PS_INPUT_ADDR,       0x00000002 },
@@ -102,7 +102,7 @@ static const uint32_t ps_tex_shader_patchinfo_offset_gfx9[] = {
     0x0000000B
 };
 
-static const uint32_t ps_tex_shader_patchinfo_code_size_gfx9 = 6;
+#define ps_tex_shader_patchinfo_code_size_gfx9 6
 
 static const uint32_t ps_tex_shader_patchinfo_code_gfx9[][10][6] = {
     {{ 0xBF800000, 0xBF800000, 0xBF800000, 0xBF800000, 0xC4001890, 0x00000000 },
@@ -118,13 +118,14 @@ static const uint32_t ps_tex_shader_patchinfo_code_gfx9[][10][6] = {
     }
 };
 
-static const uint32_t ps_tex_num_sh_registers_gfx9 = 2;
+#define ps_tex_num_sh_registers_gfx9 2
+
 static const struct reg_info ps_tex_sh_registers_gfx9[] = {
     {0x2C0A, 0x000C0081},//{ mmSPI_SHADER_PGM_RSRC1_PS, 0x000C0081 },
     {0x2C0B, 0x00000018}, //{ mmSPI_SHADER_PGM_RSRC2_PS, 0x00000018 }
 };
 
-static const uint32_t ps_tex_num_context_registers_gfx9 = 7;
+#define ps_tex_num_context_registers_gfx9 7
 
 static const struct reg_info ps_tex_context_registers_gfx9[] = {
     {0xA1B4, 0x00000002}, //{ mmSPI_PS_INPUT_ADDR,       0x00000002 },
@@ -153,7 +154,7 @@ static const struct reg_info vs_RectPosTexFast_sh_registers_gfx9[] =
     {0x2C4B, 0x00000018}, //{ mmSPI_SHADER_PGM_RSRC2_VS, 0x00000018 }
 };
 
-static const uint32_t vs_RectPosTexFast_num_sh_registers_gfx9 = 2;
+#define vs_RectPosTexFast_num_sh_registers_gfx9 2
 
 // Holds Context Register Information
 static const struct reg_info vs_RectPosTexFast_context_registers_gfx9[] =
@@ -162,7 +163,7 @@ static const struct reg_info vs_RectPosTexFast_context_registers_gfx9[] =
     {0xA1C3, 0x00000000}, //{ mmSPI_SHADER_POS_FORMAT, 0x00000000 /* Always 0 for now */}
 };
 
-static const uint32_t vs_RectPosTexFast_num_context_registers_gfx9 = 2;
+#define vs_RectPosTexFast_num_context_registers_gfx9 2
 
 static const uint32_t preamblecache_gfx9[] = {
 	0xc0026900, 0x81, 0x80000000, 0x40004000, 0xc0026900, 0x8c, 0xaa99aaaa, 0x0,
@@ -198,7 +199,7 @@ static const uint32_t cached_cmd_gfx9[] = {
 	0xc0026900, 0x2b0, 0x0, 0x0, 0xc0016900, 0x2f8, 0x0
 };
 
-static const uint32_t sh_reg_base_gfx9 = 0x2C00;
-static const uint32_t context_reg_base_gfx9 = 0xA000;
+#define sh_reg_base_gfx9 0x2C00
+#define context_reg_base_gfx9 0xA000
 
 #endif
diff --git a/lib/libdrm/tests/amdgpu/shader_test_util.c b/lib/libdrm/tests/amdgpu/shader_test_util.c
index 60148fb8f..8a19f59f3 100644
--- a/lib/libdrm/tests/amdgpu/shader_test_util.c
+++ b/lib/libdrm/tests/amdgpu/shader_test_util.c
@@ -4,6 +4,7 @@
 #include <sys/types.h>
 #include <sys/stat.h>
 #include <string.h>
+#include <assert.h>
 
 #include "CUnit/Basic.h"
 #include "amdgpu_test.h"
@@ -303,6 +304,9 @@ static void amdgpu_dispatch_init(struct shader_test_priv *test_priv)
 	case AMDGPU_TEST_GFX_V11:
 		amdgpu_dispatch_init_gfx11(test_priv);
 		break;
+	case AMDGPU_TEST_GFX_MAX:
+		assert(1 && "Not Support gfx, never go here");
+		break;
 	}
 }
 
@@ -338,6 +342,9 @@ static void amdgpu_dispatch_write_cumask(struct shader_test_priv *test_priv)
 		ptr[i++] = 0xffffffff;
 		ptr[i++] = 0xffffffff;
 		break;
+	case AMDGPU_TEST_GFX_MAX:
+		assert(1 && "Not Support gfx, never go here");
+		break;
 	}
 
 	test_priv->cmd_curr = i;
@@ -541,6 +548,9 @@ static void amdgpu_dispatch_write2hw(struct shader_test_priv *test_priv)
 	case AMDGPU_TEST_GFX_V11:
 		amdgpu_dispatch_write2hw_gfx11(test_priv);
 		break;
+	case AMDGPU_TEST_GFX_MAX:
+		assert(1 && "Not Support gfx, never go here");
+		break;
 	}
 }
 
@@ -1168,6 +1178,9 @@ static void amdgpu_draw_setup_and_write_drawblt_surf_info(struct shader_test_pri
 	case AMDGPU_TEST_GFX_V11:
 		amdgpu_draw_setup_and_write_drawblt_surf_info_gfx11(test_priv);
 		break;
+	case AMDGPU_TEST_GFX_MAX:
+		assert(1 && "Not Support gfx, never go here");
+		break;
 	}
 }
 
@@ -1298,6 +1311,9 @@ static void amdgpu_draw_setup_and_write_drawblt_state(struct shader_test_priv *t
 	case AMDGPU_TEST_GFX_V11:
 		amdgpu_draw_setup_and_write_drawblt_state_gfx11(test_priv);
 		break;
+	case AMDGPU_TEST_GFX_MAX:
+		assert(1 && "Not Support gfx, never go here");
+		break;
 	}
 }
 
@@ -1546,6 +1562,9 @@ static void amdgpu_draw_vs_RectPosTexFast_write2hw(struct shader_test_priv *test
 	case AMDGPU_TEST_GFX_V11:
 		amdgpu_draw_vs_RectPosTexFast_write2hw_gfx11(test_priv);
 		break;
+	case AMDGPU_TEST_GFX_MAX:
+		assert(1 && "Not Support gfx, never go here");
+		break;
 	}
 }
 
@@ -1679,6 +1698,9 @@ static void amdgpu_draw_ps_write2hw(struct shader_test_priv *test_priv)
 	case AMDGPU_TEST_GFX_V11:
 		amdgpu_draw_ps_write2hw_gfx11(test_priv);
 		break;
+	case AMDGPU_TEST_GFX_MAX:
+		assert(1 && "Not Support gfx, never go here");
+		break;
 	}
 }
 
@@ -1718,6 +1740,9 @@ static void amdgpu_draw_draw(struct shader_test_priv *test_priv)
 		ptr[i++] = 0x242;
 		ptr[i++] = 0x11;
 		break;
+	case AMDGPU_TEST_GFX_MAX:
+		assert(1 && "Not Support gfx, never go here");
+		break;
 	}
 
 	ptr[i++] = PACKET3(PACKET3_DRAW_INDEX_AUTO, 1);
@@ -2010,6 +2035,9 @@ static void amdgpu_memcpy_draw_test(struct shader_test_info *test_info)
 		ptr_cmd[i++] = 0x400;
 		i++;
 		break;
+	case AMDGPU_TEST_GFX_MAX:
+		assert(1 && "Not Support gfx, never go here");
+		break;
 	}
 
 	ptr_cmd[i++] = PACKET3(PACKET3_SET_SH_REG, 4);
diff --git a/lib/libdrm/tests/exynos/exynos_fimg2d_test.c b/lib/libdrm/tests/exynos/exynos_fimg2d_test.c
index d85e2f6b6..b1baa5032 100644
--- a/lib/libdrm/tests/exynos/exynos_fimg2d_test.c
+++ b/lib/libdrm/tests/exynos/exynos_fimg2d_test.c
@@ -31,7 +31,6 @@
 #include <unistd.h>
 
 #include <sys/mman.h>
-#include <linux/stddef.h>
 
 #include <xf86drm.h>
 #include <xf86drmMode.h>
diff --git a/lib/libdrm/tests/modetest/Android.bp b/lib/libdrm/tests/modetest/Android.bp
new file mode 100644
index 000000000..02688da26
--- /dev/null
+++ b/lib/libdrm/tests/modetest/Android.bp
@@ -0,0 +1,12 @@
+build = ["Android.sources.bp"]
+
+cc_binary {
+    name: "modetest",
+    defaults: [
+        "libdrm_defaults",
+        "modetest_sources",
+    ],
+
+    shared_libs: ["libdrm"],
+    static_libs: ["libdrm_util"],
+}
diff --git a/lib/libdrm/tests/modetest/Android.sources.bp b/lib/libdrm/tests/modetest/Android.sources.bp
new file mode 100644
index 000000000..c6aca2ef7
--- /dev/null
+++ b/lib/libdrm/tests/modetest/Android.sources.bp
@@ -0,0 +1,10 @@
+// Autogenerated with Android.sources.bp.mk
+
+cc_defaults {
+    name: "modetest_sources",
+    srcs: [
+        "buffers.c",
+        "cursor.c",
+        "modetest.c",
+    ],
+}
diff --git a/lib/libdrm/tests/proptest/Android.bp b/lib/libdrm/tests/proptest/Android.bp
new file mode 100644
index 000000000..379e08c11
--- /dev/null
+++ b/lib/libdrm/tests/proptest/Android.bp
@@ -0,0 +1,8 @@
+cc_binary {
+    name: "proptest",
+    defaults: ["libdrm_defaults"],
+    srcs: ["proptest.c"],
+
+    shared_libs: ["libdrm"],
+    static_libs: ["libdrm_util"],
+}
diff --git a/lib/libdrm/tests/util/Android.bp b/lib/libdrm/tests/util/Android.bp
new file mode 100644
index 000000000..36d18206d
--- /dev/null
+++ b/lib/libdrm/tests/util/Android.bp
@@ -0,0 +1,35 @@
+//
+// Copyright © 2015 NVIDIA Corporation
+//
+// Permission is hereby granted, free of charge, to any person obtaining a
+// copy of this software and associated documentation files (the "Software"),
+// to deal in the Software without restriction, including without limitation
+// the rights to use, copy, modify, merge, publish, distribute, sublicense,
+// and/or sell copies of the Software, and to permit persons to whom the
+// Software is furnished to do so, subject to the following conditions:
+//
+// The above copyright notice and this permission notice (including the next
+// paragraph) shall be included in all copies or substantial portions of the
+// Software.
+//
+// THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+// IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+// FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
+// THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+// LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+// FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
+// IN THE SOFTWARE.
+//
+
+build = ["Android.sources.bp"]
+
+cc_library_static {
+    name: "libdrm_util",
+    defaults: [
+        "libdrm_defaults",
+        "libdrm_util_sources",
+    ],
+    shared_libs: ["libdrm"],
+    header_libs: ["libdrm_test_headers"],
+    export_header_lib_headers: ["libdrm_test_headers"],
+}
diff --git a/lib/libdrm/tests/util/Android.sources.bp b/lib/libdrm/tests/util/Android.sources.bp
new file mode 100644
index 000000000..529e1124e
--- /dev/null
+++ b/lib/libdrm/tests/util/Android.sources.bp
@@ -0,0 +1,10 @@
+// Autogenerated with Android.sources.bp.mk
+
+cc_defaults {
+    name: "libdrm_util_sources",
+    srcs: [
+        "format.c",
+        "kms.c",
+        "pattern.c",
+    ],
+}
diff --git a/lib/libdrm/tests/util/kms.c b/lib/libdrm/tests/util/kms.c
index 34a841803..8bbc22751 100644
--- a/lib/libdrm/tests/util/kms.c
+++ b/lib/libdrm/tests/util/kms.c
@@ -126,6 +126,7 @@ static const char * const modules[] = {
 	"simpledrm",
 	"imx-lcdif",
 	"vkms",
+	"tidss",
 };
 
 int util_open(const char *device, const char *module)