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path: root/sys/arch/mips64/include
AgeCommit message (Expand)Author
2017-08-12Add a dummy (for now) <machine/reloc.h> for mips64 to fix build.Visa Hankala
2017-07-30Define MAXCPUS per mips64 port.Visa Hankala
2017-07-12remove CPU_LIDSUSPEND/machdep.lidsuspendMartin Natano
2017-06-29kill RCSID macros; discussed with millertTheo de Raadt
2017-06-11Fix TLB size computation on OCTEON II and III. The CPUs have utilizedVisa Hankala
2017-06-08Move loongson/octeon/sgi unmap_startup() under arch/mips64.Visa Hankala
2017-05-24Add an idle cycle implementation for R4600/R5000/RM7000 CPUs and theirVisa Hankala
2017-05-19Replace __cpu_cas() with atomic_cas_ulong().Visa Hankala
2017-05-15Make atomic.h ready to be included in userland.Martin Pieuchot
2017-05-10Hook up HPET as a timecounter.Visa Hankala
2017-04-20Get TCB address using the RDHWR instruction instead of __get_tcb().Visa Hankala
2017-04-20Make TCB address available to userspace via the UserLocal register.Visa Hankala
2017-04-20Hook up mutex(9) to witness(4).Visa Hankala
2017-04-13Provide mips64 with kernel-facing TCB_{GET,SET} macros that store itPhilip Guenther
2017-04-10Use __ASSEMBLER__ instead of __LANGUAGE_ASSEMBLY.Visa Hankala
2017-04-07Add prid for CN72xx/CN73xx.Visa Hankala
2017-03-02Add a new sysctl machdep.lidaction. The sysctl works as follows:Martin Natano
2017-02-08In exec_elf.c: expand ELFNAME(), ELFNAME2(), and ELFNAMEEND() exceptPhilip Guenther
2017-01-21Add _MIPS_ISA_MIPS32 and _MIPS_ISA_MIPS64 defines for clang.Visa Hankala
2017-01-03Remove #define __SWAP_BROKEN from mips64. The architecture nowVisa Hankala
2016-12-23Tweaks suggested by miod@Visa Hankala
2016-12-22Extend the size of user virtual address space from 2GB to 1TB on mips64Visa Hankala
2016-12-21Add a driver for OCTEON MMC host controller.Visa Hankala
2016-12-17Make Octeon model strings a bit more specific. While there,Visa Hankala
2016-12-16Provide the "machdep.lidsuspend" sysctl on Loongson.Frederic Cambus
2016-12-12Tweak IPI register definitions.Visa Hankala
2016-12-06Get PTE shift using PTE_LOG.Visa Hankala
2016-11-06Add interrupt handling routines for Loongson 3A.Visa Hankala
2016-10-09Do not use MIPS64r2 instructions on Loongson 2. Now, a generic loongsonVisa Hankala
2016-09-06Define PTE_* macros in one place. Use the lwu instruction for 32-bit PTEVisa Hankala
2016-09-03Increase the number of mbufs on most architectures. This is basedAlexander Bluhm
2016-08-16Remove RM7000/RM9000-specific performance counter code. It originatesVisa Hankala
2016-08-14Utilize the TLB Execute-Inhibit bit with non-executable mappings on CPUsVisa Hankala
2016-08-06Add PageGrain bits.Visa Hankala
2016-05-11Another attempt to make the mips64 pmap MP-safe. Now at leastVisa Hankala
2016-05-10SROP mitigation. sendsig() stores a (per-process ^ &sigcontext) cookieTheo de Raadt
2016-04-27G/C DDB_REGS.Martin Pieuchot
2016-04-24Keep pmap_update_{kernel,user}_page() inside pmap.c.Visa Hankala
2016-03-06Rename mips64's trap_frame into trapframe.Martin Pieuchot
2016-03-01guard macro args with parensmmcc
2016-02-01Zap stray pmap_kenter_cache() prototype.Visa Hankala
2016-02-01Move modify bit emulation into pmap.c to gather pmap C code in one place.Visa Hankala
2016-01-10Back out the MP pmap diff for rework. The code does not work onVisa Hankala
2016-01-05Some implementations of HitSyncDCache() call pmap_extract() for va->paVisa Hankala
2015-12-31Protect mips64 pmap and pvlist structs with a mutex to make pmapVisa Hankala
2015-12-25Make interrupt masking MP-aware. Linux IP27 and IP35 ports served as aVisa Hankala
2015-11-02Only define KERNBASE if defined(_KERNEL), for nothing in userland needs it,Miod Vallat
2015-09-27Don't forget to put the necessary MFC0_HAZARD in SAVE_CPU. For some reason IMiod Vallat
2015-09-26lint is dead and C99 may be old enough to drive a car: delete LONGLONGPhilip Guenther
2015-09-24It is no longer necessary to include CR_BERR in CR_INT_MASK if CPU_R8000.Miod Vallat
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