Age | Commit message (Collapse) | Author |
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This should restore the previous level of synchronisation between
textures and pixmaps, but *does not* guarantee that a texture will be
flushed before use. tfp should be fixed so that the ddx can submit the
batch if required to flush the pixmap.
A side-effect of this patch is to rename intel_batch_flush() to
intel_batch_submit() to reduce the confusion of executing a batch buffer
with that of emitting a MI_FLUSH.
Should fix the remaining rendering corruption involving tfp [inc compiz]:
Bug 25431 [i915 bisected] piglit/texturing_tfp regressed
http://bugs.freedesktop.org/show_bug.cgi?id=25431
Bug 25481 Wrong cursor format and cursor blink rate with compiz enabled
http://bugs.freedesktop.org/show_bug.cgi?id=25481
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
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There is only a single caller that wishes to forcibly append a flush
into the batch: intel_sync(). So move the logic there.
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
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Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
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During shutdown from a FatalError during batchbuffer submission, it is
possible for the batch_ptr to be NULL, so we must be careful not to
append a flush on this error path.
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
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Since drm may not actually set the appropriate errno after a failure, we
must use the return code instead when determining the cause of failure.
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
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I incorrectly changed the logic in 285f286 and caused the batch to
always be flushed when debugging, instead of merely inserting a MI_FLUSH
between operations.
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
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In order to detect when we require cache flushes we need to track which
domains the pixmap currently belongs to. So to do so we create a device
private structure to hold the extra information and hook it up.
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
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If DEBUG_FLUSH_CACHES is enabled then emit a MI_FLUSH after every
rendering operation. This is intended to 'fix' cases where we are
missing a required flush in the middle of a sequence of operations, such
as switching between 2D to 3D and render to sampler.
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
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Make the following options available via xorg.conf:
Section "Driver"
Option "DebugFlushBatches" "1" # Flush the batch buffer after every
# single operation;
Option "DebugFlushCaches" "1" # Include a MI_FLUSH at the end of every
# batch buffer to force data to be
# flushed out of cache and into memory
# before the completion of the batch.
Option "DebugWait" "1" # Wait for the completion of every batch buffer
# before continuing, i.e. perform synchronous
# rendering.
EndSection
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
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This is the beginning of the campaign to remove some of the absurd use of
Hungarian in the driver. Not that I don't like Hungarian, but I don't need
to know that pI830 is a pPointer.
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We've talked about doing this since the start of the project, putting it off
until "some convenient time". Just after removing a third of the driver seems
like a convenient time, when backporting's probably not happening much anyway.
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At this point, the only remaining feature regressions should be the lack of
overlay support (about to land), and the need to update the XVMC code to work
in the presence of KMS.
Acked-by: Keith Packard <keithp@keithp.com> (in principle)
Acked-by: Carl Worth <cworth@cworth.org> (in principle)
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This is replaced by intel_gpu_dump, and would no longer be used once UMS is
gone.
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This should save significant amounts of memory for glyph and other small
pixmap storage.
Bug #21387
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This removes yet another 'debugging' option that hasn't seen real use in a
long time, and wasn't supported under KMS in any case.
Signed-off-by: Keith Packard <keithp@keithp.com>
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CVS keywords, comments about how the source was once reformatted,
and the ad-hoc changelog comment in in i830_driver.c
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This pre-GEM code was all sorts of broken -- see intel_bufmgr_fake.c for
the hoops that must be jumped to use that kernel interface successfully.
Yet we continued to use it even with KMS/DRI2/UXA, which may account for
some hangs.
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We only have on acceleration architecture now, and you can always build it
if you're building the driver.
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UXA has completely replaced EXA at this point. UXA is the same rendering
core as EXA, but relying on kernel memory management or a fake bufmgr instead
of trying to manage memory in the X Server.
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While EXA/UXA aren't completely good replacements (see bugzilla for
performance and stability problems), we are pretty sure at this point that
it's the right way to go and that having multiple acceleration architectures
is getting in the way of producing a stable codebase.
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This was blocked on wide distribution of X Server 1.6 (now in the current or
next version of major distributions) and solutions for a couple of significant
architectural problems (vblank sync and frontbuffer rendering, which we now
have code or good plans for).
This includes disabling XVMC which is DRI1-only currently.
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Fixes a crash with fake bufmgr and UXA.
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This removes it from a callsite where it would have just resulted in a
fatalerror.
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It's been broken for years now, and KMS offers a much better chance of getting
this working sensibly without making a mess of the 2D driver.
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It never worked with any upstream linux kernel, and is quite heavily
deprecated. A new solution based around DRI2 will probably be
forthcoming. Pageflipping itself is next.
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I915_EMIT_IRQ is a read/write ioctl, not a write only. Found by OpenBSd's
kernel code which checks these things a long more strongly than Linux.
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This results in allocation overhead for small (8x8-128x128 or so) pixmaps with
DRI2, but we're interested in looking at tiling them in general in the near
future, anyway.
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Conflicts:
src/i830_dri.c
src/i830_driver.c
src/i830_memory.c
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This tracks whether the last command in each batch is an MI_FLUSH command
and avoids appending another MI_FLUSH in the non-GEM cases.
Signed-off-by: Keith Packard <keithp@keithp.com>
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When moving or clearing the extra buffer contents associated with DRI
windows, the XAA code needs to see which buffer is being manipulated in the
Setup functions to program the tiling values correctly. Calling
I830SelectBuffer and not then calling I830Setup... would result in mis-tiled
rendering.
Signed-off-by: Keith Packard <keithp@keithp.com>
Signed-off-by: Eric Anholt <eric@anholt.net>
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Implement DRI2CopyRegion and provide drm device filename to DRI2 module.
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This disables UXA and DRM modesetting pre-1.5, due to privates handling
issues.
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The previous location for pitch fixup would have only worked when depth was
used with the backbuffer, and no page flipping or other adventures occurred.
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We won't have the ring mapped.
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EXA and UXA have the same acceleration interface, but UXA doesn't provide
pixmap stride information as it doesn't manage pixmaps. Move all of that
into the driver structure so that the acceleration functions needn't
reference the EXA structure.
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This eliminates the cost of EXA migration management while providing full
pixmap allocation control to the driver. The goal is to make something
useful for UMA drivers.
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The batchbuffers are managed using libdrm and bufmgr_fake, and dispatched from
the ring from userland.
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This reduces the CPU overhead of memcpying them in every time, for a speedup
in aa24text of around 30%. This is based on work by Carl Worth which is
in the intel-batchbuffer branch.
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